Digital Circuits and Systems

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1 Spring 2015 Week 8 Module 46 Digital Circuits and Systems Verilog Modeling (Assignment Statements) Shankar Balachandran* Associate Professor, CSE Department Indian Institute of Technology Madras *Currently a Visiting Professor at IIT Bombay

2 Acknowledgements Stuart Sutherland s Material Understanding Verilog Blocking and Non-blocking Assignments Blocking vs Nonblocking Statements 2

3 Verilog Assignments Two types Continuous Procedural Continuous Outside of always statements, initial blocks etc Primarily, assign statements Left side should be declared as wires Wires should only one continuous assignment Done with = Example: assign sum = a ^ b; Procedural Inside always blocks and other procedural blocks Blocking vs Nonblocking Statements 3

4 Blocking Assignments Blocking The assignment must complete before the next line is executed Blocks the flow of the program Execution flow within the procedure is blocked until the assignment is complete Operator is = These examples will not work if you want to swap the bytes. word[15:8] = word[ 7:0]; word[ 7:0] = word[15:8]; //swap bytes in word??? word[ 7:0] = word[15:8]; word[15:8] = word[ 7:0]; //swap bytes in word???

5 Non-Blocking Assignments Evaluated and assigned in two steps: The right-hand side is evaluated immediately The assignment to the left-hand side is postponed until other evaluations in the current time step are completed Execution flow within the procedure continues until a timing control is encountered (flow is not blocked) Operator is <= Both the following will swap the upper and lower bytes word[15:8] <= word[ 7:0]; word[ 7:0] <= word[15:8]; word[ 7:0] <= word[15:8]; word[15:8] <= word[ 7:0];

6 Simulation Queues Each Verilog simulation time step is divided into three major queues Time 0: Q1 (in any order) : Evaluate RHS of all non-blocking assignments Evaluate RHS and change LHS of all blocking assignments Evaluate RHS and change LHS of all continuous assignments Evaluate inputs and change outputs of all primitives Q2 (in any order) : Change LHS of all non-blocking assignments Q3 (in any order) : Time 1:... Evaluate and print output from $monitor and $strobe Blocking vs Nonblocking Statements 6

7 Sequential Procedural Assignments The order of evaluation is determinate A sequential blocking assignment evaluates and assigns before continuing in the procedure A = 1; // evaluate and assign A immediately B = A + 1; // evaluate and assign; uses A = 1 A sequential non-blocking assignment evaluates, then continues on to the next timing control before assigning A <= 1; // evaluate A immediately; assign at of time step B <= A + 1; //evaluate; then assign at of time step; uses old value of A

8 Concurrent Procedural Assignments The order of evaluation is indeterminate Concurrent blocking assignments have unpredictable results A = A + 1; B = A + 1; // use previous A or current A?? Concurrent nonblocking assignments have predictable results A <= A + 1; B <= A + 1;//A and B get same value(old A+1)

9 Correct Procedural Assignment?? Which one to use for combinational buffer? out = in; out <= in; Which one to use for flipflop? q= d; q<= d; Blocking vs Nonblocking Statements 9

10 Sequential Procedural Assignment y1 = in; y2 = y1; Parallel Flops y1 <= in; y2 <= y1; Shift Register

11 Concurrent Procedural Assignment y1 = in;??? y2 = y1; y1 <= in; y2 <= y1; Shift Register

12 Procedural Assignments Combinational Logic Generally use blocking assignments Sequential Logic Generally use non-blocking assignments Exception: Do not use a non-blocking assignment if another statement in the procedure requires the new value in the same time step

13 Mixing Statements (1) always a = 3; a = 4; a = 5; b = a; #5; A = 5 and B = 5 in both cases always a = 3; a = 4; b = a; a = 5; #5; A = 5 and B = 4 in both cases always a = 3; a = 4; a = 5; b <= a; #5; always a = 3; a = 4; b <= a; a = 5; #5;

14 Mixing Statements (2) always a = 3; a = 4; b = a; a = 5; b = a; #5; always a = 3; a = 4; b <= a; a = 5; b <= a; #5; A = 5 and B = 5 in both cases

15 Mixing Statements (3) always Some non-determinism here a <= c; a <= d; a <= e; b = a; #5; always a <= c; a <= d; a <= e; b <= a; #5; A(t) = E(t) and B = E(t-1) in All Cases always a <= c; a <= d; b = a; a <= e; #5; always a <= c; a <= d; b <= a; a <= e; #5; Some nondeterminism here

16 Mixing Statements (4) always a <= c; a <= d; b = a; a <= e; b = a; #5; A(t) = E(t) and B = E(t-1) in Both Cases always a <= c; a <= d; b <= a; a <= e; b <= a; #5; always a <= c; a <= d; b = a; #5; a <= e; b = a; A(t) = D(t-1) and B = D(t-2) in Both Cases always a <= c; a <= d; b <= a; #5; a <= e; b <= a;

17 End of Week 8: Module 46 Thank You Blocking vs Nonblocking Statements 17

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