Basics of Digital Logic Design

Transcription

1 ignals, Logic Operations and Gates E 675.2: Introdction to ompter rchitectre asics of igital Logic esign Rather than referring to voltage levels of signals, we shall consider signals that are logically or (or asserted or de-asserted). Logic operation NOT N and OR or XOR or Presentation Gates Otpt is iff: Inpt is oth inpts are s t least one inpt is Inpts are not eqal Gojko abić Gates are simplest digital logic circits, and they implement basic logic operations (fnctions). Gates are designed sing few resistors and transistors. Gates are sed to bild more comple circits that implement more comple logic fnctions. 2 lassification of Logic Fnctions/ircits ombinational logic fnctions (circits): any nmber of inpts and otpts otpts y i depend only on crrent vales of inpts i Logic eqations may be sed to define a logic fnction. Eample: logic fnction with 4 inpts and 2 otpts y = ( + ( * )) + (( * 4 )* ) * sed for and, + sed for or y 2 = ( + ( * 4 )) + (( * )* ) For seqential fnctions (circits): otpts depend on crrent vales of inpts and some internal states. ny logic fnction (circit) can be realized sing only and, or and not operations (gates). nand and nor operations (gates) are niversal. g. babic Presentation 3 asic Laws of oolean lgebra Identity laws: + = * = Zero and one laws: + = * = ommtative laws: + = + * = * Inverse laws: + = * = ssociative laws: + ( + ) = ( + ) + * ( * ) = ( * ) * istribtive laws : * ( + ) = ( * ) + ( * ) + ( * ) = ( + ) * ( + ) emorgan s laws: ( + ) = * ( * ) = + g. babic Presentation 4

2 imple ircit esign: Eample Given logic eqations, it is easy to design a corresponding circit y = ( + ( * )) + (( * 4 )* ) = + ( * ) + ( * 4 * ) y 2 = ( + ( * 4 )) + (( * )* ) = + ( * 4 ) + ( * * ) Trth Tables nother way (in addition to logic eqations) to define certain fnctionality Problem: their sizes grow eponentially with nmber of inpts. inpts otpts y y 2 What are logic eqations corresponding to this table? y = + + y 2 = * * esign corresponding circit. g. babic Presentation 5 g. babic Presentation 6 Logic Eqations in m of Prodcts Form ystematic way to obtain logic eqations from a given trth table. inpts otpts Programmable Logic rray - PL PL strctred logic implementation y y 2 prodct term is inclded for each row where y i has vale prodct term incldes all inpt variables. t the end, all prodct terms are ored Inpts Prodct terms N gates OR gates Otpts y = * * + * * + * * + 3 * * y 2 = * * + * * + * * + * * + * * g. babic Presentation 7 g. babic Presentation 8

3 ircit Logic Eqation Trth Table For the given logic circit find its logic eqation and trth table. 2 3 y = * + * y Note that y colmn above is identical to y colmn lide 7. Ths, the given logic fnction may be defined with different logic eqations and then designed by different circits. g. babic Presentation 9 y Minimization pplying oolean Laws onsider one of previos logic eqations: y = * * + * * + * * + * * = * *( + ) + * *( + ) = * + * t if we start groping in some other way we may not end p with the minimal eqation. g. babic Presentation Minimization Using Karnogh Maps (/4) Provides more formal way to minimization Incldes 3 steps. Form Karnogh maps from the given trth table. There is one Karnogh map for each otpt variable. 2. Grop all s into as few grops as possible with grops as large as possible. 3. each grop makes one term of a minimal logic eqation for the given otpt variable. Forming Karnogh maps The key idea in the forming the map is that horizontally and vertically adjacent sqares correspond to inpt variables that differ in one variable only. Ths, a vale for the first colmn (row) can be arbitrary, bt labeling of adjacent colmns (rows) shold be sch that those vales differ in the vale of only one variable. Minimization Using Karnogh Maps (2/4) Groping (This step is critical) When two adjacent sqares contain s, they indicate the possibility of an algebraic simplification and they may be combined in one grop of two. imilarly, two adjacent pairs of s may be combined to form a grop of for, then two adjacent grops of for can be combined to form a grop of eight, and so on. In general, the nmber of sqares in any valid grop mst be eqal to 2 k. Note that one can be a member of more than one grop and keep in mind that yo shold end p with as few as possible grops which are as large as possible. Finding Prodct Terms The prodct term that corresponds to a given grop is the prodct of variables whose vales are constant in the grop. If the vale of inpt variable i is for the grop, then i is entered in the prodct, while if i has vale for the grop, then i is entered in the prodct. g. babic Presentation g. babic Presentation 2

4 Minimization Using Karnogh Maps (3/4) Eample : Given trth table, find minimal circit y 2 3 y = * + * g. babic Presentation 3 Minimization Using Karnogh Maps (4/4) Eample 2: Eample 3: 4 y = * + 4 Eample 4: y = * * + * * 4 + * * 4 y = * 4 + * * 4 + * * * 4 Presentation 4 ecoders 3-Inpt Fll ecoder fll decoder with n inpt has 2 n otpts. Let inpts be labeled In, In, In 2,..., In n-, and let otpts be labeled Ot, Ot,..., Ot 2 n-. Inpt Otpt fll decoder fnctions as follows: Only one of otpts has vale (it is active) while all other otpts have vale. The only otpt set to is one labeled with the decimal vale eqal to the (binary) vale on inpt lines. In general, a decoder with n inpts may have fewer than 2 n otpts. ometime those are called partial decoders. ecoders with only one otpt are common. 3 ecoder Ot Ot Ot2 Ot3 Ot4 Ot5 Ot6 Ot7 I2 I I O7 O6 O5 O4 O3 O2 O O g. babic Presentation 5 g. babic Presentation 6

5 Mltipleers basic mltipleer has only one otpt line z. There are two sets of inpt lines: data lines and select lines. implest asic Mltipleer implest m is one with 2 data inpt lines and select line. Let a nmber of data lines be N, labeled d, d, d 2,... d N-. There are m select lines, labeled s, s,..., s m-. m is sch that any of data lines can be referenced (selected) by a decimal vale on select lines. Ths, m has to satisfy the following ineqality: 2 m- < N 2 m. mltipleer fnctions as follows: Otpt z has the vale of the data inpt line labeled by a decimal vale eqal to a (binary) vale on select lines. ymbol M Trth Table esign (jst sing right thinking) g. babic Presentation 7 g. babic Presentation 8 3-ata Mltipleer Trth Table omple Mltipleer do d d2 s s z d d d d This inpt not allowed This inpt not allowed This inpt not allowed Instead N single data lines and one otpt line as in a basic m, a comple m has N sets of data lines and one set of otpt lines and each set has K lines. e l e c t No changes with select lines e le c t M N=2, K= esign m on left at basic m level M M M 3 3 g. babic Presentation 9 g. babic Presentation 2

6 R- Latch: implest eqential ircit R- Latch haracteristics nor R a b R- letch is a memory element that remembers which of two inpts has most recently had vale : Otpts a = & b = indicate that is crrently or was last Otpts a = & b = indicate that R is crrently or was last. Let s start with: = & R = a = & b = 2. Let s now change R to : = & R = a = & b =, i.e. no change 3. Let s now change to : = & R = a = & b = 4. Let s now change to : = & R = a = & b =, i.e. no change Ths, for steps 2 and 4 inpts are identical while otpts are different, i.e. we have a seqential circit. R a b g. babic Presentation 2 g. babic Presentation 22 R- Latch haracteristics (contined) R- Latch haracteristics (contined) nor R a nor R a b b 5. Let s consider case: = & R = a = & b = a = & b = indicate crrently = and R = 6a. Let s now change to : = & R = a = & b =, Identical to tep on lide 2 5. Let s again consider case: = & R = a = & b = 6b. Let s now change and R simltaneosly to : = & R = Unstable state Note: This scenario may be interesting, bt it is not that important. g. babic Presentation 23 g. babic Presentation 24

7 Gated R- Latch (Gated) -Latch R R a R inpt is write enable (not a clock) When =, a gated R- latch behaves as an ordinary R- latch. When =, changes in R and do not inflence otpts. Note that the case R = & = is still possible, and the nstable state can be reached easily. How? g. babic Presentation 25 b Two inpts: the data vale to be stored () the write enable signal () indicating when to read & store Two otpts: the vale of the internal state () and it's complement (often nsed) Note: The case R = & = is not possible. g. babic Presentation 26 _ -Latch Fnctioning Flip-Flop latch latch latch _ inpts and Otpts identical to that Of -latch. -latch fnctions as follows: when =, -latch state (and -otpt) is identical to - inpt, i.e. any change in the vale of -inpt is immediately followed by the change of -otpt. When =, -latch state is nchanged and it keeps the vale it had at the time when inpt changed from to. Two inpts: the data vale to be stored () the write enable signal () indicating when to read & store Two otpts: the vale of the internal state () and it's complement (often nsed) g. babic Presentation 27 g. babic Presentation 28

8 Flip-Flop Fnctioning Three tate -Latch latch latch E latch - fnctions as follows: When changes its vale from to, i.e. on the falling edge, -flip flop state (and otpt) gets the vale -inpt has at that moment, ring all other times, -flip flop state is nchanged and it keeps the vale it had at the time of the falling edge of -inpt. There is is critical period T cr arond the falling edge of dring wich vale on shold not change. T cr is split into two parts, the setp time before the edge, and the hold time after the edge. g. babic Presentation 29 E Three inpts: the data vale to be stored () the write enable signal () indicating when to read & store the read enable signal (E) indicating when internal state is provided on the otpt One otpt: the vale of the internal state ()?? g. babic Presentation 3 Three tate -Latch Fnctioning E toring (writing) is performed as in the case of the (ordinary) - latch) When E= (enable read), then the switch is closed, and has vale ( or ) that has been stored (written) into the -latch When E= (disable read), then the switch is open, and is in the high impendence state (the third possible vale on the otpt). Presentation 3 as a bilding block Ths, 32-bit register has: 33 inpts and 32 otpts There are two operations on a register: read and write Read operation: register content is always available on ot-ot3 Write operation: provide desired vales on in-in3 generate falling edge on the write line Recall critical period Tcr arond falling edge. 32-bit Register esign Write in in in2 in3 in3 g. babic Presentation ot ot ot2 ot3 ot3