Nishtha Bhatia Washington High School July 31 st, 2014

Size: px
Start display at page:

Download "Nishtha Bhatia Washington High School July 31 st, 2014"

Transcription

1 Nishtha Bhatia Washington High School July 31 st, 2014

2 MY PROJECTS Programming Photolithography o Incorporate image slider to Nanolab website homepage o MNL s current i-line PR OiR i is discontinued o Greater functionality than previous.gif o Qualify new resist, OiR i-line

3 FRONT-END DEVELOPMENT

4 OBJECTIVES Image slider that runs across homepage of nanolab.berkeley.edu Ease in uploading images Ability to link images to reports/pdfs/web pages Ability to display captions across images

5 IMPLEMENTATION Programmed with JavaScript jquery Created nine different layouts for image slider, each with different features, including: Image re-sizing Transitions Thumbnail display Nested Thumbnails Pause/Forward/Rewind Buttons

6 LAYOUTS CREATED

7 LAYOUTS CREATED

8 FINAL SLIDER - Demo berkeley.edu/

9 FINAL SLIDER - Code

10 OiR i-line PHOTORESIST

11 THE BASICS What is photolithography? Process of transferring geometric shapes on a mask to a thin film of photoresist Photoresist is on the surface of a substrate typically a silicon wafer Used in industry for integrated circuit manufacturing

12 PROJECT PURPOSE MNL s current i-line resist (OiR i) = discontinued To maintain i-line litho, new resist must be qualified > OiR photoresist END GOAL Find optimal conditions to consistently produce standard 1.2, 1.7, 2.1, and 2.8 µm films of resist + resolve at least 0.7 µm lines and spaces

13 EXPERIMENTAL SETUP - Tools Nanospec Prime Oven Svgcoat1 + Svgdev1 Gcaws6 UV bake LEO SEM

14 EXPERIMENTAL SETUP - Wafers We used three wafers of each thickness (1.2, 1.7, 2.1, and 2.8 µm) #1: used to measure photoresist thickness after hard bake No exposure #2: used to measure photoresist thickness after UV bake No exposure #3: uniformly exposed wafer Used for analysis with LEO scanning electron microscope

15 EXPERIMENTAL PROCEDURE 1. Primed wafers using recipe #2 90 C, 11 min, 780 torr 2. Coat bare wafers with svgcoat1 track: modified programs 1, 3, 5, and , 1.7, 2.1 µm -> manual dynamic dispense µm -> manual static dispense 3. Expose one wafer of each thickness on gcaws6 4. Develop all wafers in svgdev1 track (std. prog. 1) 5. Run one set of wafers through svgdev1 again for hard bake, & the other set of wafers were put into UV bake 6. Examine wafers with LEO SEM

16 NEW SPIN COAT PROGRAMS The faster the spin speed, the thinner the coat of photoresist spin coat technique Wafer ID Target Thickness (µm) Svgcoat1 process to modify Spin speed (rpm) (1, 1) (3, 1) (5, 1) (7, 4) 820 Table 1: Expected spin speeds to produce targeted photoresist thicknesses in the experiment

17 Film Thickness (µm) FILM THICKNESS VS. SPIN SPEED Projected Film Thickness vs. Spin Speed Expected Actual Spin Speed (rpm) Table 2: Spin speeds with expected and actual film thickness

18 COATED PR THICKNESSES 1.2, 1.7, 2.1 µm ID Top Left Flat Right Center Aver. Unif. 1.2 A % 1.2 B % 1.7 A % 1.7 B % Measurements taken on nanospec, like so: T L C R F 2.1 A % 2.1 B % Centripetal force makes PR spin radially outward Table 3: Pre-development photoresist thickness measurements (µm)

19 Optimal Focus & Exposure Conditions F & E values chosen after careful analysis of previous focus-exposure matrix experiments Wafer Exposure Focus 1.2 um 1.0 sec um 1.2 sec um 1.8 sec -10 Table 4: Focus & exposure values for 1.2, 1.7, and 2.1 wafers in experiment

20 PR THICKNESS LOST: POST DEV. All wafers = run through svgdev1 track Standard programs: (1, 1) - no hard bake [yet] TL due to selectivity~ 0.1 µm Wafer Top Left Flat Right Center Aver. 2.1 A Table 5: Post-development measurements

21 HARD BAKE + UV BAKE RESULTS Wafer Top Left Flat Right Center Aver Table 6 (left): Post Hard Bake Measurements TL ~ 0.06 µm Wafer Proc. Top Left Flat Right Center Aver. Table 7 (right): Post UV Bake Measurements TL ~ 0.08 µm 1.2 A A S

22 2.8 µm: CONTACT VS PROXIMITY Contact bake left ghost image of rings on wafer Had to change settings to carry out proximity bake rather than contact bake VS Contact Bake Proximity Bake

23 NEW PR COAT CONDITIONS Extreme improvement in accuracy noted when spin speed changed to 820 rpm rather than 500 rpm as previously conducted Wafer Top Left Flat Right Average Unif. 2.8 A % 2.8 B % Table 8: Pre-development measurements without new program (µm) Unoptimized Wafer Top Left Flat Right Center Aver. Unif. 2.8 A % 2.8 B % Table 9: Pre-development measurements with new program (µm) Optimized

24 OPTIMAL FOCUS & EXPOSURE 2.8 Wafer Exposure Focus Table 10 (left): Focus/exposure values for the 2.8 um wafer (µm) Table 11: Post-development measurements for the 2.8 um wafer (µm) Wafer Top Left Flat Right Center Average

25 POST HARD BAKE MEASUREMENTS Wafer Top Left Flat Right Center Aver. 2.8 A Table 12: Post hard bake measurements (µm) **NOTE: The UV bake resulted in excessive damage to the photoresist film; thus, not recommended to UV bake wafers of this thickness

26 LEO SEM IMAGES 1.2 um Minimum Resolved Feature 0.5 µm

27 LEO SEM IMAGES 1.7 um Minimum Resolved Feature 0.5 µm 4 : 1 aspect ratio

28 LEO SEM IMAGES 2.1 um Minimum Resolved Feature 0.6 µm 3.5 : 1 aspect ratio

29 LEO SEM IMAGES 2.8 um Minimum Resolved Feature 0.6 µm 4 : 1 aspect ratio

30 SUMMARY Best Conditions Wafer ID Svgcoat1 Process to be modified Svgdev1 Process Spin Speed (rpm) Target Thickness (µm) Measured Thickness Pre-dev (µm) Measured Thickness Post-dev (µm) Thickness after Hard- Bake Thickne ss after UV Bake Min Res Feat 1 (1,1) (1,1) (3,1) (1,1) (5,1) (1,1) (4,7) (1,1)

31 ACKNOWLEDGEMENTS Thank you Jeff Clarkson for mentoring me throughout my time in the Nanolab, and helping me execute my project every step of the way! Thank you Olek Proskurowski for guiding, mentoring and teaching me so much about web development! Thank you Hussain Alseddiq and Kim Chan for answering all my questions about my projects and helping me throughout them whenever problems arose! Thank you Cheryl Chang for teaching me all about photolithography and how to use so many tools in the lab! Thank you David Lo and Greg Mullins for maintaining much of the equipment used for this work! Thank you Marilyn Kushner and Adrienne Ruff for taking us to SemiCon! Thank you Bill Flounders for this amazing opportunity! Thank you to the entire staff for taking time out of their busy schedules to help me and for being so supportive!

32 MODIFIED PROGRAMS svgcoat1 1.2 ORIGINAL Program P E O A T S A 1 1 SPIN SPIN DSP SPIN SPIN END Modified Program P E O A T S A 1 3 SPIN ORIGINAL Program P E O A T S A 5 1 SPIN SPIN DSP SPIN SPIN END Modified Program P E O A T S A 5 3 SPIN ORIGINAL Program P E O A T S A 3 1 SPIN SPIN DSP SPIN SPIN END Modified Program P E O A T S A 3 3 SPIN Modified Program Coat P E O A T S A 7 1 SPIN SPIN SPIN END Oven P E O A T S A 4 1 STEP STEP STEP COOL END

NANOSPEC 4150 STANDARD OPERATING PROCEDURES

NANOSPEC 4150 STANDARD OPERATING PROCEDURES NANOSPEC 4150 STANDARD OPERATING PROCEDURES Version: 1.0 JAN 2016 UNIVERSITY OF TEXAS AT ARLINGTON Nanotechnology Research Center TABLE OF CONTENTS 1.0 INTRODUCTION.. 3 2.0 HARDWARE....... 3 3.0 OPERATING

More information

Investigation of the foot-exposure impact in hyper-na immersion lithography when using thin anti-reflective coating

Investigation of the foot-exposure impact in hyper-na immersion lithography when using thin anti-reflective coating Investigation of the foot-exposure impact in hyper-na immersion lithography when using thin anti-reflective coating Darron Jurajda b, Enrico Tenaglia a, Jonathan Jeauneau b, Danilo De Simone a, Zhimin

More information

Circuits. L3: Fabrication and Layout -1 ( ) B. Mazhari Dept. of EE, IIT Kanpur. B. Mazhari, IITK. G-Number

Circuits. L3: Fabrication and Layout -1 ( ) B. Mazhari Dept. of EE, IIT Kanpur. B. Mazhari, IITK. G-Number EE60: CMOS Analog Circuits L: Fabrication and Layout - (8.8.0) B. Mazhari Dept. of EE, IIT Kanpur Suppose we have a Silicon wafer which is P-type and we wish to create a region within it which is N-type

More information

Photoresist Qualification using Scatterometry CD

Photoresist Qualification using Scatterometry CD Photoresist Qualification using Scatterometry CD Roie Volkovich *a, Yosef Avrahamov a, Guy Cohen a, Patricia Fallon b, Wenyan Yin b, a KLA-Tencor Corporation Israel, Halavian St., P.O.Box 143, Migdal Haemek

More information

Reflectivity metrics for optimization of anti-reflection coatings on wafers with topography

Reflectivity metrics for optimization of anti-reflection coatings on wafers with topography Reflectivity metrics for optimization of anti-reflection coatings on wafers with topography Mark D. Smith, Trey Graves, John Biafore, and Stewart Robertson KLA-Tencor Corp, 8834 N. Capital of Texas Hwy,

More information

Industrial Example I Semiconductor Manufacturing Photolithography Can you tell me anything about this data!

Industrial Example I Semiconductor Manufacturing Photolithography Can you tell me anything about this data! Can you tell me anything about this data! 1 In Semiconductor Manufacturing the Photolithography process steps are very critical to ensure proper circuit and device performance. Without good CD (critical

More information

Optimization of Photolithography Process Using Simulation

Optimization of Photolithography Process Using Simulation Optimization of Photolithography Process Using Simulation Introduction The progress in semiconductor technology towards even smaller device geometries demands continuous refinements of photolithography

More information

Photoresist with Ultrasonic Atomization Allows for High-Aspect-Ratio Photolithography under Atmospheric Conditions

Photoresist with Ultrasonic Atomization Allows for High-Aspect-Ratio Photolithography under Atmospheric Conditions Photoresist with Ultrasonic Atomization Allows for High-Aspect-Ratio Photolithography under Atmospheric Conditions 1 CONTRIBUTING AUTHORS Robb Engle, Vice President of Engineering, Sono-Tek Corporation

More information

FABRICATION OF CMOS INTEGRATED CIRCUITS. Dr. Mohammed M. Farag

FABRICATION OF CMOS INTEGRATED CIRCUITS. Dr. Mohammed M. Farag FABRICATION OF CMOS INTEGRATED CIRCUITS Dr. Mohammed M. Farag Outline Overview of CMOS Fabrication Processes The CMOS Fabrication Process Flow Design Rules EE 432 VLSI Modeling and Design 2 CMOS Fabrication

More information

Coping with Variability in Semiconductor Manufacturing

Coping with Variability in Semiconductor Manufacturing 1 Coping with Variability in Semiconductor Manufacturing Costas J. Spanos Berkeley Computer Aided Manufacturing Department of EECS University of California, Berkeley 12/6/04 2 The Traditional Semiconductor

More information

ABM's High Resolution Mask Aligner Features:

ABM's High Resolution Mask Aligner Features: ABM's High Resolution Mask Aligner is a very versatile instrument with interchangeable light sources which allow Near-UV (405-365 nm) as well as Mid- and Deep-UV (254 nm, 220 nm) exposures in proximity

More information

Heidelberg MLA-150 Standard Operating Procedure

Heidelberg MLA-150 Standard Operating Procedure Heidelberg MLA-150 Standard Operating Procedure CORAL Name: Model: Location: Purpose: Author: MLA-150 Heidelberg MLA150 Maskless Aligner TRL Photo-Au Room Direct-Write Lithography Heidelberg Instruments

More information

LITHOGRAPHY CHALLENGES AND CONSIDERATIONS FOR EMERGING FAN-OUT WAFER LEVEL PACKAGING APPLICATIONS

LITHOGRAPHY CHALLENGES AND CONSIDERATIONS FOR EMERGING FAN-OUT WAFER LEVEL PACKAGING APPLICATIONS LITHOGRAPHY CHALLENGES AND CONSIDERATIONS FOR EMERGING FAN-OUT WAFER LEVEL PACKAGING APPLICATIONS Robert L. Hsieh, Detlef Fuchs, Warren W. Flack, and Manish Ranjan Ultratech Inc. San Jose, CA, USA mranjan@ultratech.com

More information

Schematic creation of MOS field effect transistor.

Schematic creation of MOS field effect transistor. Schematic creation of MOS field effect transistor. Gate electrode Drain electrode Source electrode Gate length Gate oxide A good reference is http://jas2.eng.buffalo.edu/applets/education/fab/nmos/nmos.html

More information

An integrated microfluidic device for two-dimensional combinatorial dilution

An integrated microfluidic device for two-dimensional combinatorial dilution An integrated microfluidic device for two-dimensional combinatorial dilution Supplementary Information Yun-Ho Jang a,b, Matthew J. Hancock a,b, Sang Bok Kim a,b, Šeila Selimović a,b, Woo Young Sim a,b,

More information

VEECO FPP Point Probe Operating Manual

VEECO FPP Point Probe Operating Manual VEECO FPP-5000 4-Point Probe Operating Manual Version: 1.0 May 2013 UNIVERSITY OF TEXAS AT ARLINGTON Nanofabrication Research and Teaching Facility TABLE OF CONTENTS 1. Introduction....2 1.1 Scope of Work....2

More information

Defect Repair for EUVL Mask Blanks

Defect Repair for EUVL Mask Blanks Defect Repair for EUVL Mask Blanks A.Barty, S.Hau-Riege, P.B.Mirkarimi, D.G.Stearns, H.Chapman, D.Sweeney Lawrence Livermore National Laboratory M.Clift Sandia National Laboratory E.Gullikson, M.Yi Lawrence

More information

Metrology for Characterization of Wafer Thickness Uniformity During 3D-IC Processing. SEMATECH Workshop on 3D Interconnect Metrology

Metrology for Characterization of Wafer Thickness Uniformity During 3D-IC Processing. SEMATECH Workshop on 3D Interconnect Metrology Metrology for Characterization of Wafer Thickness Uniformity During 3D-IC Processing SEMATECH Workshop on 3D Interconnect Metrology Chris Lee July 11, 2012 Outline Introduction Motivation For New Metrology

More information

Embedded UTCP interposers for miniature smart sensors

Embedded UTCP interposers for miniature smart sensors Embedded UTCP interposers for miniature smart sensors T. Sterken 1,2, M. Op de Beeck 2, Tom Torfs 2, F. Vermeiren 1,2, C. Van Hoof 2, J. Vanfleteren 1,2 1 CMST (affiliated with Ugent and IMEC), Technologiepark

More information

PYRAMID: A Hierarchical Approach to E-beam Proximity Effect Correction

PYRAMID: A Hierarchical Approach to E-beam Proximity Effect Correction PYRAMID: A Hierarchical Approach to E-beam Proximity Effect Correction Soo-Young Lee Auburn University leesooy@eng.auburn.edu Presentation Proximity Effect PYRAMID Approach Exposure Estimation Correction

More information

Carbon Nanotube Tunable Microbattery

Carbon Nanotube Tunable Microbattery Carbon Nanotube Tunable Microbattery Philippe Lacasse Georgia Tech Research Institute Electro-Optics Systems Lab February 9 th, 2008 GTRI_B-1 Introduction and Initial Plan Based on work by Madou & Wang

More information

PRODUCTS COMPETENCE IN THIN AND ULTRA-THIN WAFER PROCESSING AND HANDLING BASED ON TRANSFER ELECTROSTATIC CARRIER (T-ESC ) TECHNOLOGY

PRODUCTS COMPETENCE IN THIN AND ULTRA-THIN WAFER PROCESSING AND HANDLING BASED ON TRANSFER ELECTROSTATIC CARRIER (T-ESC ) TECHNOLOGY PRODUCTS COMPETENCE IN THIN AND ULTRA-THIN WAFER PROCESSING AND HANDLING BASED ON TRANSFER ELECTROSTATIC CARRIER (T-ESC ) TECHNOLOGY . CONTENTS Technology 04 Basics 04 T-ESC Solutions 04 Process Applications

More information

EE582 Physical Design Automation of VLSI Circuits and Systems

EE582 Physical Design Automation of VLSI Circuits and Systems EE582 Prof. Dae Hyun Kim School of Electrical Engineering and Computer Science Washington State University Preliminaries Table of Contents Semiconductor manufacturing Problems to solve Algorithm complexity

More information

TECHNICAL SPECIFICATIONS

TECHNICAL SPECIFICATIONS TECHNICAL SPECIFICATIONS FOR THE SUPPLY OF A MASK ALIGNER FOR SCUOLA SUPERIORE SANT ANNA ALLEGATO A LOTTO 4 PROCEDURA APERTA IN LOTTI PER LA FORNITURA DI APPARECCHIATURE SCIENTIFICHE PER IL PROGETTO PIC

More information

IPC-D-859. Design Standard for Thick Film Multilayer Hybrid Circuits ANSI/IPC-D-859. The Institute for. Interconnecting

IPC-D-859. Design Standard for Thick Film Multilayer Hybrid Circuits ANSI/IPC-D-859. The Institute for. Interconnecting The Institute for Interconnecting and Packaging Electronic Circuits Design Standard for Thick Film Multilayer Hybrid Circuits ANSI/ Original Publication December 1989 A standard developed by the Institute

More information

Direct Imaging Solutions for Advanced Fan-Out Wafer-Level and Panel-Level Packaging

Direct Imaging Solutions for Advanced Fan-Out Wafer-Level and Panel-Level Packaging Semicon Europe 2018 Direct Imaging Solutions for Advanced Fan-Out Wafer-Level and Panel-Level Packaging November 16, 2018 by Mark Goeke SCREEN SPE Germany GmbH 1 SCREEN Semiconductor s Target Market Target

More information

Three-dimensional imaging of 30-nm nanospheres using immersion interferometric lithography

Three-dimensional imaging of 30-nm nanospheres using immersion interferometric lithography Three-dimensional imaging of 30-nm nanospheres using immersion interferometric lithography Jianming Zhou *, Yongfa Fan, Bruce W. Smith Microelectronics Engineering Department, Rochester Institute of Technology,

More information

Lockheed Martin Nanosystems

Lockheed Martin Nanosystems Lockheed Martin Nanosystems National Nanotechnology Initiative at Ten: Nanotechnology Innovation Summit December 2010 Dr. Brent M. Segal Director & Chief Technologist, LM Nanosystems brent.m.segal@lmco.com

More information

The Overlapping Effects of Step Exposure by Laser Interferometric. Lithography System

The Overlapping Effects of Step Exposure by Laser Interferometric. Lithography System The Overlapping Effects of Step Exposure by Laser Interferometric Lithography System Hung-Lin Hsieh 1, Cheng-Wei Chien 1, Farn-Shiun Hwu 1,, Yi-cheng Huang 3, and *Jyh-Chen Chen 1 1 Dept. of Mechanical

More information

` EVG 620 MASK ALIGNMENT SYSTEM Bay 1 STANDARD OPERATING PROCEDURE

` EVG 620 MASK ALIGNMENT SYSTEM Bay 1 STANDARD OPERATING PROCEDURE ` EVG 620 MASK ALIGNMENT SYSTEM Bay 1 STANDARD OPERATING PROCEDURE Version: 1.0 April-2016 UNIVERSITY OF TEXAS AT ARLINGTON Nanofabrication Research Center (NRC) TABLE OF CONTENTS 1. Introduction...2 1.1

More information

Four-Point Probe System

Four-Point Probe System Manual version: 2.0.E Product code: T2001A2 Product version: 2.0 Software version: 1.1 enabling materials science ossila.com Contents 1. Safety... 3 1.1 Warning... 3 1.2 Caution... 3 2. Introduction...

More information

Sample study by 3D optical profiler Contour Elite K for KTH university.

Sample study by 3D optical profiler Contour Elite K for KTH university. Sample study by 3D optical profiler Contour Elite K for KTH university Samuel.lesko@bruker.com Objectives Objectives Main goals for the visit consist of evaluating 3D optical profiler: Confirm capability

More information

반도체공정 - 김원정. Lattice constant (Å)

반도체공정 - 김원정. Lattice constant (Å) 반도체물리 - 반도체공정 - 김원정 Semiconductors Lattice constant (Å) 1 PN junction Transistor 2 Integrated circuit Integrated circuit originally referred to a miniaturized electronic circuit consisting of semiconductor

More information

Operating Instructions

Operating Instructions Operating Instructions Measurement of Liquid Viscosity The viscosity is measured using the Brookfield Viscometer (see Figure 1a) (a) (b) Figure 1. (a) Top view of the Brookfield Viscometer. The viscosity

More information

Characterization of a Chemically Amplified Photoresist for Simulation using a Modified Poor Man s DRM Methodology

Characterization of a Chemically Amplified Photoresist for Simulation using a Modified Poor Man s DRM Methodology Characterization of a Chemically Amplified Photoresist for Simulation using a Modified Poor Man s DRM Methodology Nickhil Jakatdar 1, Xinhui Niu, Costas J. Spanos Dept. of Electrical Engineering and Computer

More information

SUSS MJB4. Manual Aligner For Research, Development and Operator Assisted Production October, 2009

SUSS MJB4. Manual Aligner For Research, Development and Operator Assisted Production October, 2009 SUSS MJB4 Manual Aligner For Research, Development and Operator Assisted Production October, 2009 Overview Product Portfolio Aligner MA/BA 8 MA200Compact LithoFab200 MJB4 MA300Plus MA/BA 6 MA150e LithoPack300

More information

Agenda Membership Status, Internal / External Usage Trends

Agenda Membership Status, Internal / External Usage Trends Professor Ming C. Wu Dr. Bill Flounders Faculty Director Executive Director Agenda Membership Status, Internal / External Usage Trends Staffing Status NanoLab High School Intern Program (3 min video) New

More information

Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC A. Macchiolo, J. Beyer, A. La Rosa, R. Nisius, N. Savic Max-Planck-Institut für Physik, Munich 8 th International Workshop on Semiconductor

More information

Thick capacitive meshes on polyimide substrates

Thick capacitive meshes on polyimide substrates Infrared Physics & Technology 45 (2004) 153 157 www.elsevier.com/locate/infrared Thick capacitive meshes on polyimide substrates Arne L uker a, Oren Sternberg b, Herbert Hein c, Joachim Schulz c, *, Karl-Dieter

More information

UBCx Phot1x: Silicon Photonics Design, Fabrication and Data Analysis

UBCx Phot1x: Silicon Photonics Design, Fabrication and Data Analysis UBCx Phot1x: Silicon Photonics Design, Fabrication and Data Analysis Course Syllabus Table of Contents Course Syllabus 1 Course Overview 1 Course Learning Objective 1 Course Philosophy 1 Course Details

More information

Lecture 4a. CMOS Fabrication, Layout and Simulation. R. Saleh Dept. of ECE University of British Columbia

Lecture 4a. CMOS Fabrication, Layout and Simulation. R. Saleh Dept. of ECE University of British Columbia Lecture 4a CMOS Fabrication, Layout and Simulation R. Saleh Dept. of ECE University of British Columbia res@ece.ubc.ca 1 Fabrication Fabrication is the process used to create devices and wires. Transistors

More information

On the quality of measured optical aberration coefficients using phase wheel monitor

On the quality of measured optical aberration coefficients using phase wheel monitor On the quality of measured optical aberration coefficients using phase wheel monitor Lena V. Zavyalova *, Aaron R. Robinson, Anatoly Bourov, Neal V. Lafferty, and Bruce W. Smith Center for Nanolithography

More information

EUV Lithography and Overlay Control

EUV Lithography and Overlay Control YMS Magazine DECEMBER 2017 EUV Lithography and Overlay Control Efi Megged, Mark Wylie and Cathy Perry-Sullivan L A-Tencor Corporation One of the key parameters in IC fabrication is overlay the accuracy

More information

Line Pattern Collapse

Line Pattern Collapse Line Pattern Collapse Modeling and Prediction in Semiconductor Processing Derek Bassett a, Michael Carcasi a, Wallace Printz a, Shinichiro Kawakami b, Yuichiro Miyata c a Tokyo Electron America, 2400 Grove

More information

ksa MOS Ultra-Scan Performance Test Data

ksa MOS Ultra-Scan Performance Test Data ksa MOS Ultra-Scan Performance Test Data Introduction: ksa MOS Ultra Scan 200mm Patterned Silicon Wafers The ksa MOS Ultra Scan is a flexible, highresolution scanning curvature and tilt-measurement system.

More information

Agenda. Membership Status, Usage UCB Dept Trends. Web Page Highlights. New Equipment / Capabilities. FY 16/17 Rates Overview

Agenda. Membership Status, Usage UCB Dept Trends. Web Page Highlights. New Equipment / Capabilities. FY 16/17 Rates Overview Professor Ming C. Wu Dr. Bill Flounders Faculty Director Executive Director Agenda Membership Status, Usage UCB Dept Trends Web Page Highlights New Equipment / Capabilities FY 16/17 Rates Overview Summary

More information

In-Situ Monitoring of Photoresist Thickness Contour

In-Situ Monitoring of Photoresist Thickness Contour In-Situ Monitoring of Photoresist Thickness Contour Weng Khuen Ho, Xiaodong Wu and Arthur Tay Department of Electrical and Computer Engineering National University of Singapore,1192 Singapore elehowk@nus.edu.sg

More information

PAGE 1/6 ISSUE SERIES Micro-SPDT PART NUMBER R516 X3X 10X R 516 _ 1 0 _

PAGE 1/6 ISSUE SERIES Micro-SPDT PART NUMBER R516 X3X 10X R 516 _ 1 0 _ PAGE 1/6 ISSUE 13-08-18 SERIES Micro-SPDT PART NUMBER R516 X3X 10X R516 series: the RAMSES concept merges with the SLIM LINE technology, breaking up the frequency limits of SMT switches : - FULL SMT TECHNOLOGY

More information

University of Pennsylvania. Fabrication of micro-polarizer array with polymer thin film

University of Pennsylvania. Fabrication of micro-polarizer array with polymer thin film SUNFEST Technical Report TR-CST01DEC05, Center for Sensor Technologies, Dept of Electrical and Systems Eng, Univ. of Pennsylvania, Philadelphia, PA 2005 University of Pennsylvania SUNFEST NSF REU Program

More information

Appendix A: Comparison of ray-tracing with Birandy and Sunrays programs

Appendix A: Comparison of ray-tracing with Birandy and Sunrays programs Comparison of ray-tracing with Birandy and Sunrays programs Appendix A: Comparison of ray-tracing with Birandy and Sunrays programs Comparison of ray-tracing programs Birandy and Sunrays In order to check

More information

Filmetrics F40 UV Thin Film Measurement System Standard Operating Procedure

Filmetrics F40 UV Thin Film Measurement System Standard Operating Procedure Filmetrics F40 UV Thin Film Measurement System Standard Operating Procedure NYU Tandon School of Engineering Nanofabrication Facility Contents 1 Startup 2 Baseline and reference check 2.1 Baseline setting

More information

ABSTRACT 1. INTRODUCTION

ABSTRACT 1. INTRODUCTION Copyright 2016 Society of Photo-Optical Instrumentation Engineers. One print or electronic copy may be made for personal use only. Systematic reproduction and distribution, duplication of any material

More information

LITHOGRAPHIC PERFORMANCE OF RECENT DUV PHOTORESISTS. Bob Streefkerk, Koen van Ingen Schenau and Corine Buijk. ASML Veldhoven, The Netherlands

LITHOGRAPHIC PERFORMANCE OF RECENT DUV PHOTORESISTS. Bob Streefkerk, Koen van Ingen Schenau and Corine Buijk. ASML Veldhoven, The Netherlands LITHOGRAPHIC PERFORMANCE OF RECENT DUV PHOTORESISTS Bob Streefkerk, Koen van Ingen Schenau and Corine Buijk. ASML Veldhoven, The Netherlands This paper was presented at the SPIE microlithography symposium

More information

Metrology Tools for Flexible Electronics and Display Substrates. Min Yang

Metrology Tools for Flexible Electronics and Display Substrates. Min Yang Metrology Tools for Flexible Electronics and Display Substrates Min Yang 1 Acknowledgement The speaker would like to sincerely thank the following collaborators for their contributions: Roger Posusta,

More information

Advanced microprocessor systems

Advanced microprocessor systems Advanced microprocessor systems Microprocessor Evolution First Transistor Discrete Transistors Bipolar FET Planar Transistors BJT FET 1971 1972 10,000 nm 10,000 nm 1978 1985 8086 29000 transistors 3000

More information

Optical Topography Measurement of Patterned Wafers

Optical Topography Measurement of Patterned Wafers Optical Topography Measurement of Patterned Wafers Xavier Colonna de Lega and Peter de Groot Zygo Corporation, Laurel Brook Road, Middlefield CT 6455, USA xcolonna@zygo.com Abstract. We model the measurement

More information

Effect of Pre-Cleaning on Texturization of c-si Wafers in a KOH/IPA Mixture. Gim Chen and Ismail Kashkoush

Effect of Pre-Cleaning on Texturization of c-si Wafers in a KOH/IPA Mixture. Gim Chen and Ismail Kashkoush Effect of Pre-Cleaning on Texturization of c-si Wafers in a KOH/IPA Mixture Gim Chen and Ismail Kashkoush Akrion Systems LLC, 6330 Hedgewood Drive, #150, Allentown, PA 18106, USA Experiments were performed

More information

Study of Air Bubble Induced Light Scattering Effect On Image Quality in 193 nm Immersion Lithography

Study of Air Bubble Induced Light Scattering Effect On Image Quality in 193 nm Immersion Lithography Study of Air Bubble Induced Light Scattering Effect On Image Quality in 193 nm Immersion Lithography Y. Fan, N. Lafferty, A. Bourov, L. Zavyalova, B. W. Smith Rochester Institute of Technology Microelectronic

More information

Lubrication of Curved Wafers During Chemical Mechanical Planarization

Lubrication of Curved Wafers During Chemical Mechanical Planarization Lubrication of Curved Wafers During Chemical Mechanical Planarization Joseph Lu, Vincent P. Manno* & Chris Rogers Department of Mechanical Engineering Tufts University Medford, MA May 2001 Outline Need

More information

Modeling of Surface Reflectance of Acid Textured Multicrystalline Silicon Wafer for Solar Cell Application

Modeling of Surface Reflectance of Acid Textured Multicrystalline Silicon Wafer for Solar Cell Application International Journal of Electronics and Computer Science Engineering 1065 Available Online at www.ijecse.org ISSN- 2277-1956 Modeling of Surface Reflectance of Acid Textured Multicrystalline Silicon Wafer

More information

TFT-LCD Technology Introduction

TFT-LCD Technology Introduction TFT-LCD Technology Introduction Thin film transistor liquid crystal display (TFT-LCD) is a flat panel display one of the most important fields, because of its many advantages, is the only display technology

More information

Design of Experiments for Coatings

Design of Experiments for Coatings 1 Rev 8/8/2006 Design of Experiments for Coatings Mark J. Anderson* and Patrick J. Whitcomb Stat-Ease, Inc., 2021 East Hennepin Ave, #480 Minneapolis, MN 55413 *Telephone: 612/378-9449 (Ext 13), Fax: 612/378-2152,

More information

NRF Ellipsometer SOP Revision /19/15 Page 1 of 14. Ellipsometer SOP

NRF Ellipsometer SOP Revision /19/15 Page 1 of 14. Ellipsometer SOP Page 1 of 14 Ellipsometer SOP The J. A. Woollam M88 is a spectroscopic ellipsometer used to measure film thickness and optical constants of transparent/semi-transparent thin films. It uses a Xenon arc

More information

NXQ8000 Series Mask Aligner

NXQ8000 Series Mask Aligner NXQ8000 Series Mask Aligner The NXQ8000 Production Mask Aligner and Front to Back Overlay Inspection System integrates the latest in Robotic Automation with state of the art next generation alignment stage

More information

Services provide by UST CO.,LTD

Services provide by UST CO.,LTD Universal Semiconductor Technology WWW.SEMI-UST.COM Services provide by UST CO.,LTD UST Co.,Ltd will put customer' need before us and promise that all UST staffs will do their best for maximization of

More information

Manufacturing Challenges for Lithography in the Textured Disc Paradigm. September 18 th, 2008 Babak Heidari

Manufacturing Challenges for Lithography in the Textured Disc Paradigm. September 18 th, 2008 Babak Heidari Manufacturing Challenges for Lithography in the Textured Disc Paradigm September 18 th, 2008 Babak Heidari Longitudinal Perpendicular Pattern media + HAMR 6,25 T/in 2 TDK: DTR 602 Gb/in 2 1 T/in 2 150

More information

Multi-site Probing for Wafer-Level Reliability

Multi-site Probing for Wafer-Level Reliability Multi-site Probing for Wafer-Level Reliability Louis Solis De Ancona 1 Sharad Prasad 2, David Pachura 2 1 Agilent Technologies 2 LSI Logic Corporation s Outline Introduction Multi-Site Probing Challenges

More information

Bringing Patterned Media to Production with Value Added Metrology

Bringing Patterned Media to Production with Value Added Metrology Bringing Patterned Media to Production with Value Added Dean Dawson, Andrew S. Lopez Diskcon /IDEMA Conference, Session 6 September 24th, 2009 Overview Introduction AFM Scan Modes New Nanotrench Pattern

More information

A New Method to Characterize Conformality of BARC Coatings Runhui Huang, Heping Wang, Anwei Qin Brewer Science, Inc., 2401 Brewer Dr.

A New Method to Characterize Conformality of BARC Coatings Runhui Huang, Heping Wang, Anwei Qin Brewer Science, Inc., 2401 Brewer Dr. A New Method to Characterize Conformality of BARC Coatings Runhui Huang, Heping Wang, Anwei Qin Brewer Science, Inc., 241 Brewer Dr., Rolla, MO 6541 Abstract In the semiconductor manufacturing industry,

More information

University of Minnesota Nano Fabrication Center Standard Operating Procedure

University of Minnesota Nano Fabrication Center Standard Operating Procedure Equipment Name: Film-Sense Coral Name: film-sense Revision Number: 1 Model: FS-1 Revisionist: T. Whipple Location: Bay 1 Date: 5/16/2017 1 Description The Film Sense FS-1 Multi-Wavelength Ellipsometer

More information

Correlated Model For Wafer Warpage Prediction of Arbitrarily Patterned Films

Correlated Model For Wafer Warpage Prediction of Arbitrarily Patterned Films 2018 IEEE 68th Electronic Components and Technology Conference Correlated Model For Wafer Warpage Prediction of Arbitrarily Patterned Films Gregory T. Ostrowicki gtostrowicki@ti.com Siva P. Gurum sgurrum@ti.com

More information

Fabrication of the photo-resist mask onto 3D nonplanar wafer for micro abrasive jet machining

Fabrication of the photo-resist mask onto 3D nonplanar wafer for micro abrasive jet machining Fabrication of the photo-resist mask onto 3D nonplanar wafer for micro abrasive jet machining 1 J. B. Byiringiro, 1a T. J. Ko, 2 H.C. Kim, 3 I.H. Lee Abstract This paper presents a novel fabrication technique

More information

Materials for and performance of multilayer lithography schemes

Materials for and performance of multilayer lithography schemes Materials for and performance of multilayer lithography schemes Marc Weimer, Yubao Wang, Charles J. Neef, James Claypool, Kevin Edwards, Zhimin Zhu Brewer Science, Inc., 2401 Brewer Dr., Rolla, MO, USA

More information

Introduction. Chapter Wafersort

Introduction. Chapter Wafersort Chapter 1 Introduction Higher yields, lower costs, and improved reliability are some of the demands that drive the production-line manufacture of integrated circuits. Shorter cycle times for chip design

More information

R I T Title: Nanometrics Nanospec AFT #1 Semiconductor & Microsystems Fabrication Laboratory Revision: B Rev Date: 03/28/2011

R I T Title: Nanometrics Nanospec AFT #1 Semiconductor & Microsystems Fabrication Laboratory Revision: B Rev Date: 03/28/2011 Approved by: Process Engineer / / / / Equipment Engineer 1 SCOPE The purpose of this document is to detail the use of the Nanometrics Nanospec AFT. All users are expected to have read and understood this

More information

UniLok Heat Shrinkable Rings

UniLok Heat Shrinkable Rings Minimum 5 Nominal 6 Supplied Recovered iameter Force (N) AHM0137-0031-0038-1.371 1.321 0.28 / 0.331 0.34 / 0.42 1.347 130 AHM0137-0031-0127-1.371 1.321 0.28 / 0.331 1.2 / 1.34 1.347 400 AHM0155-0041-0078-1.549

More information

Rimon IKENO, Takashi MARUYAMA, Tetsuya IIZUKA, Satoshi KOMATSU, Makoto IKEDA, and Kunihiro ASADA

Rimon IKENO, Takashi MARUYAMA, Tetsuya IIZUKA, Satoshi KOMATSU, Makoto IKEDA, and Kunihiro ASADA High-throughput Electron Beam Direct Writing of VIA Layers by Character Projection using Character Sets Based on One-dimensional VIA Arrays with Area-efficient efficient Stencil Design Rimon IKENO, Takashi

More information

Standard Operating Manual

Standard Operating Manual Standard Operating Manual Desktop Manual Coater Version 1.1 Page 1 of 10 Contents 1. Picture and Location 2. Process Capabilities 2.1 Cleanliness Standard 2.2 Substrate Size 2.3 Substrate Thickness 2.4

More information

HYPERSPECTRAL IMAGING THIN FILM APPLICATIONS. Dr. Wulf Grählert /

HYPERSPECTRAL IMAGING THIN FILM APPLICATIONS. Dr. Wulf Grählert / Dr. Wulf Grählert +49 351 / 83391 3406 wulf.graehlert@iws.fraunhofer.de Motivation Coating processes: thin film application process stability What s about Monitoring? Random sampling? Real time analysis?

More information

AIXTRON (formerly NanoInstruments) Carbon Nanotube Deposition System

AIXTRON (formerly NanoInstruments) Carbon Nanotube Deposition System STANDARD OPERATING PROCEDURE AIXTRON (formerly NanoInstruments) Carbon Nanotube Deposition System CORAL Name: CCNT Model Number: Black Magic Pro Location: 39-428a TRL What it does: Plasma Enhanced Chemical

More information

MLI INTRODUCTION GUIDE. copyright reserved 2012 MLI

MLI INTRODUCTION GUIDE. copyright reserved 2012 MLI MLI INTRODUCTION GUIDE Table of Contents MLI, the Company Introduction of MLI Why MLI MLI Test Equipments Pellicle Introduction Pellicle Film Transmission Pellicle Mounting Tool MLI Quality System 3 4

More information

Woollam M2000 Operation Manual

Woollam M2000 Operation Manual Woollam M2000 Operation Manual The Woollam M2000 is a spectroscopic ellipsometer used to characterize optically transparent films. The system has the Near IR upgrade that covers 700 wavelengths from 193nm

More information

Article 3D Topography Mask Aligner

Article 3D Topography Mask Aligner Article 3D Topography Mask Aligner Lithography Simulation Ulrich Hofmann, Nezih Ünal GenISys GmbH 82024 Taufkirchen Germany Ralph Zoberbier SUSS MicroTec Lithography GmbH 85748 Garching Germany Ton Nellissen

More information

Cantilever Based Ultra Fine Pitch Probing

Cantilever Based Ultra Fine Pitch Probing Cantilever Based Ultra Fine Pitch Probing Christian Leth Petersen Peter Folmer Nielsen Dirch Petersen SouthWest Test Workshop San Diego, June 2004 1 About CAPRES Danish MEMS probe & interfacing venture

More information

Title: Heidelberg DWL66+ Semiconductor & Microsystems Fabrication Laboratory Revision: B Rev Date: 05/03/2017

Title: Heidelberg DWL66+ Semiconductor & Microsystems Fabrication Laboratory Revision: B Rev Date: 05/03/2017 Approved by: Process Engineer / / / / Equipment Engineer 1 SCOPE The purpose of this document is to detail the use of the Heidelberg DWL66+. All users are expected to have read and understood this document.

More information

Using Superpowers for Hardware Reverse Engineering. Joe Grand Grand Idea Studio, Inc.

Using Superpowers for Hardware Reverse Engineering. Joe Grand Grand Idea Studio, Inc. Using Superpowers for Hardware Reverse Engineering Joe Grand (@joegrand) Grand Idea Studio, Inc. Superpowers* Aren't Just for Superheroes! Laser Acoustic X-Ray (2D/3D) Subset of work from my DARPA CFT

More information

Model-Based MPC Enables Curvilinear ILT using Either VSB or Multi-Beam Mask Writers

Model-Based MPC Enables Curvilinear ILT using Either VSB or Multi-Beam Mask Writers Model-Based MPC Enables Curvilinear ILT using Either VSB or Multi-Beam Mask Writers Leo (Linyong) Pang, Yutesu Takatsukasa, Daisuke Hara, Michael Pomerantsev, Bo Su, Aki Fujimura D2S Patented Technology

More information

FILMETRICS F20 STANDARD OPERATION PROCEDURE

FILMETRICS F20 STANDARD OPERATION PROCEDURE Arizona State University NanoFab FILMETRICS F20 STANDARD OPERATION PROCEDURE Rev C Table of Contents Contents Table of Contents...1 1. Purpose / Scope...2 2. Reference Documents...2 3. Equipment / Supplies

More information

INPAQ. Specification TEA10402V15A0. Product Name. ESD Guard TM TEA Series (Thin Film Air Gap) Size EIA Global RF/Component Solutions

INPAQ. Specification TEA10402V15A0. Product Name. ESD Guard TM TEA Series (Thin Film Air Gap) Size EIA Global RF/Component Solutions TEA10402V15A0 Specification Product Name Series Part No ESD Guard TM TEA Series (Thin Film Air Gap) TEA10402V15A0 Size EIA 0402 TEA10402V15A0 Engineering Specification 1. Scope TEA series is designed to

More information

Supporting information for: Real-Time Tunable Colors from Microfluidic Reconfigurable All-Dielectric Metasurfaces

Supporting information for: Real-Time Tunable Colors from Microfluidic Reconfigurable All-Dielectric Metasurfaces Supporting information for: Real-Time Tunable Colors from Microfluidic Reconfigurable All-Dielectric Metasurfaces Shang Sun #, Wenhong Yang #, Chen Zhang, Jixiang Jing, Yisheng Gao, Xiaoyi Yu, Qinghai

More information

FEI Helios NanoLab 600 TEM specimen prep recipe Nicholas G. Rudawski (352) (office) (805) (cell) Last updated: 07/16/18

FEI Helios NanoLab 600 TEM specimen prep recipe Nicholas G. Rudawski (352) (office) (805) (cell) Last updated: 07/16/18 FEI Helios NanoLab 600 TEM specimen prep recipe Nicholas G. Rudawski ngr@ufl.edu (352) 392 3077 (office) (805) 252-4916 (cell) Last updated: 07/16/18 This recipe is essentially a composite of several established

More information

EUV MASK MANUFACTURING: PATTERNING AND BLANK STATUS BRYAN S. KASPROWICZ, HENRY KAMBERIAN PHOTRONICS, INC.

EUV MASK MANUFACTURING: PATTERNING AND BLANK STATUS BRYAN S. KASPROWICZ, HENRY KAMBERIAN PHOTRONICS, INC. EUV MASK MANUFACTURING: PATTERNING AND BLANK STATUS BRYAN S. KASPROWICZ, HENRY KAMBERIAN PHOTRONICS, INC. OUTLINE Patterning Challenges Target Requirements Mask Manufacturing Modules Resist Process Selection

More information

Supporting Information for Critical Factors of the 3D Microstructural Formation. in Hybrid Conductive Adhesive Materials by X-ray Nano-tomography

Supporting Information for Critical Factors of the 3D Microstructural Formation. in Hybrid Conductive Adhesive Materials by X-ray Nano-tomography Electronic Supplementary Material (ESI) for Nanoscale. This journal is The Royal Society of Chemistry 2014 Supporting Information for Critical Factors of the 3D Microstructural Formation in Hybrid Conductive

More information

ARRAYS OF MICRO-PRISMS AND MICRO-MIRRORS FOR INFRARED LIGHT BASED ON As 2 S 3 -As 2 Se 3 PHOTORESISTS

ARRAYS OF MICRO-PRISMS AND MICRO-MIRRORS FOR INFRARED LIGHT BASED ON As 2 S 3 -As 2 Se 3 PHOTORESISTS Journal of Optoelectronics and Advanced Materials Vol. 7, No. 5, October 2005, p. 2275-2280 ARRAYS OF MICRO-PRISMS AND MICRO-MIRRORS FOR INFRARED LIGHT BASED ON As 2 S -As 2 Se PHOTORESISTS N. P. Eisenberg,

More information

Reflectivity Control at Substrate / Photoresist Interface by Inorganic Bottom Anti-Reflection Coating for Nanometerscaled

Reflectivity Control at Substrate / Photoresist Interface by Inorganic Bottom Anti-Reflection Coating for Nanometerscaled TRANSACTIONS ON ELECTRICAL AND ELECTRONIC MATERIALS Vol. 15, No. 3, pp. 159-163, June 25, 2014 Regular Paper pissn: 1229-7607 eissn: 2092-7592 DOI: http://dx.doi.org/10.4313/teem.2014.15.3.159 Reflectivity

More information

Comparison of Singulation Techniques

Comparison of Singulation Techniques Comparison of Singulation Techniques Electronic Packaging Society, Silicon Valley Chapter Sept. 28, 2017 ANNETTE TENG Sept 28, 2017 1 Definition of Singulation 9/28/2017 Annetteteng@promex-ind.com 2 www.cpmt.org/scv

More information

Compact Disc How it Works?

Compact Disc How it Works? Compact Disc How it Works? A Compact Disc (CD) is an optical disc used to store digital data. CD-ROMs and CD-Rs remain widely used technologies in the computer industry.cd-rom drives employ a near-infrared

More information

Product Specifications

Product Specifications Product Specifications The ksa RateRat Pro is a turnkey, real-time, in-situ optical reflectance probe designed for deposition monitoring of semi-absorbent thin films. The RateRat Pro measures deposition

More information

Equipment Standard Operating Procedure Kimberly Appel

Equipment Standard Operating Procedure Kimberly Appel Date Created: June 26, 2004 Date Modified: The Flexus 2320 Equipment Standard Operating Procedure Kimberly Appel 1. Purpose 1.1. The Flexus Thin Film Stress Measuring Apparatus (TFSMA) measures the changes

More information

INPAQ Global RF/Component Solutions

INPAQ Global RF/Component Solutions TVL 0402 01 SP0 Specification Product Name Series Part No Transient Voltage Suppressor TVS Series TVL 0402 01 SP0 Size EIA 0402 TVL 0402 01 SP0 Engineering Specification 1. Scope TVL 0402 01 SP0 is a TVS

More information