반도체공정 - 김원정. Lattice constant (Å)

Transcription

1 반도체물리 - 반도체공정 - 김원정 Semiconductors Lattice constant (Å) 1

2 PN junction Transistor 2

3 Integrated circuit Integrated circuit originally referred to a miniaturized electronic circuit consisting of semiconductor devices, as well as passive components bonded to a substrate or circuit board. 우짜면잘만들수있을까? Modern life and semiconductors 반도체없는제품찾는게빠르지않을까? 3

4 Modern life and semiconductors 자동차도반도체빼면시체다!! World leading semiconductor company 4

5 Semiconductors & Korea 미래의반도체시장의추이는? Moor s law 2 년에 2 배씩!! Linewidth limitation 16 nm(?) 5

6 From design to product Simulation & Design Circuit design Layout Mask Wafer process Ingot Single crystal Wafer environment Chemicals Equipment Supplier Fabrication Oxidation (passivation) Lithography Etching Implantation Thin film deposition Diffusion Metallization Protection layer coating Back-side process Software Hardware money Test Dicing Packaging Single crystal growth 6

7 Slicing and polishing Cleanroom 7

8 Cleanroom classification Cleanroom suit 8

9 Cleanroom airlock Air shower Cleanroom 9

10 Cleanroom control Cleanroom 에서 control 하는요소는? 1. 온도 2. 습도 3. 부유입자 4. 박테리아 5. 사람 6. 산소 Air flow control: positive pressure 7. 코끼리 Design Simulation & Design Circuit design Layout Mask Wafer process Ingot Single crystal Wafer environment Chemicals Equipment Supplier Fabrication Oxidation (passivation) Lithography Etching Implantation Thin film deposition Diffusion Metallization Protection layer coating Back-side process Software Hardware money Test Dicing Packaging 10

11 Components in IC NPN bipolar junction transistor n-type MOSFET Floating-gate avalanche injection memory device FAMOS DRAM with trench capacitor configuration. Design step 1. Feasibility study and die size estimate 2. Functional verification 3. Circuit/RTL design 4. Circuit/RTL simulation Logic simulation 5. Floorplanning 6. Design review 7. Layout 8. Layout verification 9. Static timing analysis 10. Layout review 11. Design For Test and Automatic test pattern generation 12. Design for manufacturability (IC) 13. Mask data preparation 11

12 Simulation CircuitLogix mixed-mode simulator. Simulation Quite Universal Circuit Simulator(QUCS) 12

13 Simulation Ansoft HFSS simulator Simulators Softwares Qucs SPICE Transistor models Verilog VHDL Yenka PLECS Livewire_(software) 13

14 Layout GDSII standard cell with three metal layers Layout view of a simple CMOS Operational Amplifier Photomask 14

15 Fabrication Simulation & Design Circuit design Layout Mask Wafer process Ingot Single crystal Wafer environment Chemicals Equipment Supplier Fabrication Oxidation (passivation) Lithography Etching Implantation Thin film deposition Diffusion Metallization Protection layer coating Back-side process Software Hardware money Test Dicing Packaging Yellow room 15

16 Photolithography Cleaning ion implantation Deposition wet chemical etching plasma etching. Photoresist removal Preparation Developing Photoresist application Exposure Photolithography 16

17 Photoresist Spin coating 17

18 Exposure(aligner or stepper) UV light 18

19 Developing and baking AZ 300 MIF Photoresist Developer Bathing Hot plate Photoresist removal Liquid stripper Plasma ashing AZ Remover 19

20 Ion implantation Etching 20

21 Wet Etching Plasma etching 21

22 Etchents Deposition New layer could be added on the wafers. Chemical vapor deposition (CVD) Physical vapor deposition (PVD) Molecular beam epitaxy (MBE) Etc. 22

23 Chemical vapor deposition (CVD) Hot-wall thermal CVD Plasma assisted CVD Physical vapor deposition (PVD) ELECTRON BEAM EVAPORATION THERMAL EVAPORATION SPUTTERING 23

24 Pulsed laser deposition(pld) PLD in Changwon National Univ. 24

25 Molecular beam epitaxy (MBE) Oxidation and Diffusion Rapid thermal anneal Furnace anneals Thermal oxidation 25

26 Furnace anneals Furnace Box Furnace Tube Furnace Thermal oxidation 26

27 Rapid thermal anneal(rta) Backside polishing 27

28 Wafer Dicing 28

29 Wire bonding Packaging 29