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1 Homework 1, Part ELEC3441: Computer Architecture Second Semester, Homework 1 (r1.2) r1.2 Page 1 of 7

2 A.1 Iron Law A.1.1 A.1.2 Part A: Problem Set #cycles CP I A = = = 3.6 #instructions Perf A = #cycles clock period = ( ) 1ns = 900ns Perf B = #cycles clock period = ( ) 1.25ns = 1050ns Perf B = 1.17 Perf A Processor A is 1.17 faster than processor B. A.1.3 Perf A = #cycles clock period = ( ) 1ns = 690ns Perf B = #cycles clock period = ( ) 1.25ns = 612.5ns Perf A Perf B = 1.13 Processor B is 1.13 faster than processor A. A.1.4 ALU instructions already take only 1 cycle and thus cannot be improved more. We can reduce either Load/Store or Branch/Jump speed to 1. Old Compiler: Improving L/S: Perf A = #cycles clock period = ( ) 1ns = 340ns Improving B/J: Perf A = #cycles clock period = ( ) 1ns = 810ns If we improve Load/Store, we see a speedup of 900/340 = New Compiler: Improving L/S: Perf A = #cycles clock period = ( ) 1ns = 550ns Improving B/J: Perf A = #cycles clock period = ( ) 1ns = 390ns If we improve Branch/Jump, we see a speedup of 690/390 = r1.2 Page 2 of 7

3 A.2 Bit Reversal Bit reversal is an operation neeeded in many programsm that reverses the order of bits in a word. For example, reversing the word 0x will result in 0x880000AA. The following C code shows a naive implementation of this function: for (i = 0; i < 32; i++) { r <<= 1; r = (v & 0x1); v >>= 1; } A.2.1 Base on the sample C code, implement the bit reversal function as RISC-V assembly code. Assume v is stored in register a0, r is stored in a1 and i in t0. li t0,32 li a1,0 loop: slli a1,a1,0x1 andi a3,a0,1 or a1,a3,a1 srli a0,a0,0x1 addi t0,t0,-1 bnez t0, loop ret A.2.2 andi t0, a0, 0xFF add t0, t0, a2 lb t0, 0(t0) slli t0, 24 srli a0, 8 andi t1, a0, 0xFF add t1, t1, a2 lb t1, 0(t1) slli t1, 16 srli a0, 8 andi t2, a0, 0xFF add t2, t2, a2 lb t2, 0(t2) slli t2, 8 srli a0, 8 andi t3, a0, 0xFF add t3, t3, a2 lb t3, 0(t3) or a1, t0, t1 or a1, a1, t2 or a1, a1, t3 ret r1.2 Page 3 of 7

4 A.2.3 Code from A.2.1: = 195 cycles Code from A.2.2: 22 cycles The look-up table solution is faster by 195/22 = A.2.4 Code from A.2.1: contains no memory instructions, so same as before 195 cycles Code from A.2.2: contains 4 memory instructions, 4 m + 18 cycles m m m Memory accesses can take up to 44 cycles and the look-up table solution will still be faster. A.3 One Instruction Set Computer A.3.1 (i) Any program will require many more SUBLEQ instructions to implement the same functionality as a RISC-V, since any operation not a load/store or subtraction will have to be implemented as a complex sequence of SUBLEQ instructions. (ii) Executing each instruction requires 3 memory accesses: 2 reads and 1 write. If we assume a magic memory with enough ports to fulfil both instruction and data loads in a single cycle without any resource conflicts (similar to a register file but larger), then CPI will not be affected much compared to RISC-V by memory. However, each instruction is also a branch, so in the pipelined case, CPI will be higher due to the larger effect of branch misprediction. (iii) Cycle time would be slightly lower for SUBLEQ as there are fewer different cases to handle, so there is no logic required for decoding or choosing which data path to use. SUBLEQ can win only on term (iii), and there only by a small amount. However the penalty for (i) is going to be huge, so that overall a SUBLEQ machine will be much slower than a RISC-V at performing the same functionality. r1.2 Page 4 of 7

5 c A.3.2 A.4 Compilation PC ri_addr ra_addr rb_addr wr_addr wr_data Magic Memory ri_data ra_data rb_data Compiler is essential to bridge the gap between programs written in high-level languages such as C and the processor. In this section, you will experiment with the basics of the GNU C compiler (gcc) that is ported to compile for the RISCV processor. A.4.1 Preliminaries You need to perform this exercise using the riscv-gnu-toolchain, which includes the GNU compilation toolchain with tools such as gcc, objdump, gas, etc. The tools are designed to produce RISCV instructions even when you run them on an Intel based machine a process that is called cross compilation. To conform to the GNU naming convention for cross compiler, you will find that the tools we are using has a rather long prefix in the name, such as: riscv64-unknown-elf-gcc riscv64-unknown-elf-objdump riscv64-unknown-elf-gas In Linux systems running a modern shell such as bash, you can simply press <TAB> to complete the file name. That will save you a lot of typing. The simplest way to access these tools is to log in to our own server for this course, which has all the tools already installed. To do so, follow instructions in?? and??. Alternatively, you may install the RISCV toolchain yourself if you are confident in Linux. You will need to clone the tools from Ask questions on Piazza for help. Copy the source file for this question on tux-1 as follows: b a - tux-1$ tar xzvf ~elec3441/elec3441hw1_a4_src.tar.gz The source files will be saved within a subdirectory named elec3441hw1 A4 src. r1.2 Page 5 of 7

6 A.4.2 Compile the file ArrayAccu.c to RISCV assembly code using: tux-1$ riscv64-unknown-elf-gcc -O1 -S ArrayAccu.c -o ArrayAccu.s The switch -S tells gcc to produce human readable assembly code instead of machine readable binaries. The switch -o tells gcc to store the output in the file ArrayAccu.s. Finally, the -O1 (capital letter Oh) tells the compiler to perform optimization. Different level of optimization can be specified with -O1, -O2, or no optimization by omitting the switch (or -O0). Look at the content of ArrayAccu.s and answer the following questions: 1. The program starts running with the C function main. In ArrayAccu.s, where is main is defined? 2. Search through ArrayAccu.s, where is main being called? 3. The ArrayAccu() function is called within main. Look at the code before the function is called, and the code inside ArrayAccu(), where are the input arguments and output argument stored? 4. Can you see how the return address ra being used? 1) main is defined by label main: which is made public to linker from the assembler directive.global main. 2) main is not called inside ArrayAccu.s. A call will be inserted by the linker when generating a full executable. 3) The input arguments (ptr, N) are stored in a1 and a0 for the function call but moved to a5 and a3 inside the function. The return value is stored in a0. 4) It is used with jr, which leads PC to the return address stored in ra. When -O0 is used, jr ra can be found at the end of the function. When -O2 is used, RET can be found which will do similar. A.4.3 Branches Compile the code branch1.c and branch2.c as follows: tux-1$ riscv64-unknown-elf-gcc -O1 -S branch1.c -o branch1.s tux-1$ riscv64-unknown-elf-gcc -O1 -S branch2.c -o branch2.s Answer the following questions: 1. Does the compiler implement the two branches differently? How are they different? 2. How many instructions are needed for the two branches? 3. Does changing the optimization flag to -O0, -O2 make any difference to the generated code? When -O1 or O2 is used for compilation, a and b are considered to be constants. The branch condition is known at compilation, and the branch instruction is removed. When the compilation optimizations are disabled, BLE and BGT are used for the two branches respectively. The difference here is trivial. However, this is not the original plan of the question. Since the ISA doesn t provide all the combinations of the branch instructions, we want to show how the compiler handles the branch that doesn t have native instruction support. When there is no native ISA support, a branch will be compiled to not native-branch-instruction and then the compiler will swap the two source operands of the instruction. 24 instructions are needed for -O0 while only 2 instructions for -O1 and -O2. r1.2 Page 6 of 7

7 A.4.4 Loops Compile the files loop1.c and loop2.c as before answer the following questions: 1. How does the compiler implement the following two different loops? 2. How many instructions are needed for the two loops? 3. Adjust the optimization level from -O0 to -O3, what difference can you observe at the highest optimization level? With -O0 to -O2, two loops are generated in the first case and only a single loop in the second. Consequently, loop1.s needs almost twice as many instructions as loop2.s. With -O3, the compiler completely unrolls the loops, resulting in the same code for both files. A.4.5 If-then-else vs. Switch Compile the file branch.c and case.c as before, then answer the following questions: 1. How does the compiler implement the following two code segment differently? 2. How does the generated code differ with -O1 -O2 and no optimization? 3. How does the compiler generate code for a + a? Why does it work? For branch.s, each if statement is expressed as load immediate to register a5 followed by BEQ to compare the variable and the immediate. When the statement is false, the program is branched to next if statement, otherwise the array operation is done followed by jump instruction which points to the end of main. For case.s, a sequence of BNE instructions are used. If the condition is met, the program jumps to the specified segment for array operation. Afterwards, it will jumps to the end of main. When -O1 and -O2 are used for compilation, the compiler determines the result for the first two branches statically and loads the answer (10 or 40) using load immediate. In the default case, first a + a is calculated using a shift left by 1 bit (this multiplies by 2 in binary), then adding a again to the result. A.4.6 Function Calls Compile the file funcall1.c and funcall2.c and compile them as before, then answer the following questions: 1. How does the compiler implement the following two code segment differently? 2. How does the generated code differ with -O1 -O2 and no optimization? 3. How is the floating point add implemented? The two function calls differ on the way of passing the arguments. One of them passes the arguments by reference and the other passes the arguments by value. With -O1 and -O2, the compiler performs inline optimization and replaces the function call with a direct load immediate of the (statically known) result. The floating point addition is implemented as a call to the software floating point library function adddf3 provided by gcc. r1.2 Page 7 of 7

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