Integrated Micro and Nano Photonic Systems for Peta scale Networking

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1 Integrated Micro and Nano Photonic Systems for Peta scale Networking Prof. S. J. Ben Yoo, UC Davis Campus CITRIS Director Tokyo, Japan April 10, 2006

2 OUTLINE Optical Label Switching Routers Optical CDMA Optical Arbitrary Waveform Generators Photonic Interconnect Nano Processors 2

Next Generation Heterogeneous Networking

LABEL Sensor Network Wireline O CDMA LAN

3 Next Generation Heterogeneous Networking Satellite Network Storage Area Network IPNE Wireline MPLS Optical Label Switching Network IPNE Core Router DATA LABEL DATA LABEL Sensor Network Wireline O CDMA LAN Legacy IP Network Reconfigurable Wireless Network 3

4 All Optical Label Switching Router Systems Integration at UC Davis Label Processing Module TI (LP TI) DEMUX Label reader Switch Controller w/ Forwarding Look up Table NC&M Switching Fabric 500 psec/div fiber delay CI CI CI OLS Edge Router OLE OLR OLE OLR OLE OLR UNAS 500 psec/div IP Router ATM Client Machine 4 Client Client networks...

Ingress Path Edge Router IP Client to IP Client with Cascaded Operation of OLSRs Egress Path Physical Layer Interface Encapsulation Label processing Unit Data bus traffic controller IP Client Network

5 Ingress Path Edge Router IP Client to IP Client with Cascaded Operation of OLSRs Egress Path Physical Layer Interface Encapsulation Label processing Unit Data bus traffic controller IP Client Network 1 Data Bus Data bus traffic controller PPP SONET Physical Layer Interface P1,P2, P3 AOLS Interface POS POS Interface L1, L2, L3 P1, P2, P3 Ingress Edge Router Optical Label Switching Network Label Payload L3 P3 Core Router 2 L1, L2 P1, P2 Payload Core Router 1 Label L2 P2 Core Router 3 Payload Label L1 P1 Egress Edge Router P1 POS IP Client Network 2 5

6 Testbed Demo of Secure Video over All Optical Network Multicast and Unicast Shown is by using Optical Router Scalable to 42Petabit/sec Switching capacity 6

7 477 km Optical Label Switching Field Trial (OFC2002, #TuY4) V.J. Hernandez, et al, "First Field Trial of Optical Label Switching and Packet Dropping on a 477km NTON/Sprint Link," LLNL Sprint ATL 7

8 All Optical Variable Buffers: Nano Photonic Crystals for Slow Light Pipelined Wavelength, Time, and Space Domain Contention Resolution Normal waveguide Slow waveguide 8

Chip Scale Optical Router Micro system S. J. B. Yoo, Ultra Low Latency Multi Protocol Optical Routers for the Next Generation Internet, U. S. Patent 6,925,257 B2 (2005). S. J. B. Yoo, Integrated Optical Router, U.

9 Chip Scale Optical Router Micro system S. J. B. Yoo, Ultra Low Latency Multi Protocol Optical Routers for the Next Generation Internet, U. S. Patent 6,925,257 B2 (2005). S. J. B. Yoo, Integrated Optical Router, U. S. Patent 6,768,827 (2004). S. J. B. Yoo, Ultra Low Latency Multi Protocol Optical Routers for the Next Generation Internet, U. S. Patent 6,519,062 (2000). S. J. B. Yoo, Wavelength Converter with Modulated Absorber, U. S. Patent 6,563,627 (2001). S. J. B. Yoo, Compact Optical Receiver with Optical Signal Processing Capabilities, U. S. Patent pending (2001). S. J. B. Yoo, G. K. Chang, High Throughput, Low Latency Next Generation Internet Using Optical Tag Switching, U. S. Patent 6,111,673.(1997) 9

10 Multi Tb/s optical routing system on a Chip (1.28 Tb/s example) Conventional System All Optical System on a Chip MAC MAC Buffer Memory MAC MAC Buffer Memory MAC MAC Buffer Buffer Memory MAC MAC Requires 16 Routers and 16 sets of 16 Transponders at OC 192 Size: 32 bays in standard 19 in. rack Power Consumption: ~200 kw Each Port Protocol Specific up to OC 192 One Semiconductor Chip Switching Fabric Size: 1 shelf in 1 bay in standard 19 in. rack Power Consumption: ~50 W Each Port Protocol Independent up to OC 768 Can achieve Packet /Burst /Circuit Switching Scalable to 42 Petabit/Sec Switching Capacity 10

11 OUTLINE Optical Label Switching Routers Optical CDMA Optical Arbitrary Waveform Generators Photonic Interconnect Nano Processors Higher Capacity Networking (~ 1 Tb/s LAN) More flexible bandwidth assignment Higher Level of Security 11

12 Optical CDMA Technology Weiner Heritage 85; Heritage Tutorial OFC 2006 OThT1 Input Output Input Output Lens SLPM Lens Lens SLPM Lens Grating Grating Grating Phase Phase Array Waveguides Substrate Encoded PULSE Array Waveguides Substrate INPUT PULSE OUTPUT PULSE Input Waveguide modulators Output Waveguide Input Waveguide modulators Output Waveguide J. Cao et al OFC 2006 OWL2 12

13 O CDMA Testbed Cong et al OFC 2006 OThT5 13

14 320 Gb/s O CDMA Network Testbed Demonstration 4 Users 8 Users 16 Users 32 Users 4 Users 8 Users 16 Users 32 Users Without FEC With FEC V. J. Hernandez, W. Cong, R. P. Scott, C. Yang, N. K. Fontaine, B. H. Kolner, J. P. Heritage, S. J. B. Yoo, "320 Gb/s capacity (32 users x 10 Gb/s) SPECTS O CDMA local area network testbed," post deadline paper OFC'06, Mar

15 O CDMA System on a Chip Differential MZI O CDMA RECEIVER O CDMA TRANSMITTER Mode locked Laser PXtal Reflectors Photo Diode Data Modulator 1 cm Encoder Decoder MUX Mode locked Laser Phase Shifter DEMUX Input Fiber Substrate Output Fiber 4 cm DEMUX MUX TE Cooler Electrical Contacts Silicon Micro bench 15

16 O CDMA Microsystem Integration OCDMA Encoder/ decoder Differential MachZehnder Colliding Pulse Modelocked Laser FP Absorber 16 waveguide

17 O CDMA Encoder Decoder Integration 2 mm 6 mm 17

18 InP O CDMA Microsystem Encoding/Decoding Experiments Array Waveguides Substrate Encoded PULSE INPUT PULSE OUTPUT PULSE SHG (mv) 18 Input Waveguide Pulse without coding 0.14 Experimental result Simulation Time (ps) modulators Output Waveguide SHG (mv) W5 encoding 0.14 Experimental result Simulation Time (ps) SHG (mv) SHG (mv) W5 en; W5* decoding 0.14 Experimental result Simulation Time (ps) W5 en; W6 * decoding 0.14 Experimental result 0.12 Simulation Time (ps)

19 8, 16, 32, and 64 ch InP O CDMA Encoder/Decoders 26mm 32x50 64x25 13mm 16x100 8x200 19

20 32 channel OCDMA encoder/decoder 32 channel 50 GHz spacing 12x6.3 mm 2 Testing WGs Phase shifters Delay lines SOA AWG InP chip 12 x 6.3 mm 2 20

21 64 channel OCDMA encoder/decoder 64 channel 25 GHz spacing 16.8x11.4 mm 2 Testing WGs Phase shifters Bond pads Monolithically Fabricated Chip Delay lines SOA AWG InP chip x 11.4 mm 2

22 10 Gb/s Colliding Pulse Medelocked Laser Transform Limited Operation passive active passive saturable absorber MQW Passive Active nm/div nm 1.4nm Time BW product = 0.32 ( transform limited) Hybrid ML SHG signal (mv) ps/div Minimal pulse width, time bandwidth product 0.32 sech 2 fit experiment 1.82 ps time (ps)

23 SIMULATION Intensity psec CPM laser with Injection Locking & Linear Chirp Correction Field Intensity phase (rads) Intensity Spectrum ps FWHM attainable phase (rads) EXPERIMENT Time (p.s.) Time (ps) 0 y = m4+m2*3/(sinh(1.7627/m1*... m1 m2 m3 m4 Chisq R Value W avelength (nm) Error NA NA Dash line: experimental Solid: sech 2 fit with 0.68 ps FWHM 3

24 MZI OCDMA Detection in Testbed MMI SOAs MMI δτ λ 2 λ δτ nm λ 1 λ 1 SOA SOA φ 1 SOA SOA SOA (cw probe) δτ SOA φ 2 λ 1 λ SOA 2 SOA SOA SOA (cw probe) φ 2 λ 1 λ 2 SOA SOA δτ φ 1 Trace 1 Trace 2 Trace 3 Trace 4 Trace 1 Trace 2 Trace 3 I1 (a) Modelocked Laser Trace 4 (b) 24

25 Integrated O CDMA Transceiver 13.5mm 14mm Mask Layout Fabricated Chip 25

26 26 HVPE planarized 16 channel InP Encoder (AWG PM AWG)

27 HVPE regrown AWGs and MZIs Fe doped InP SiO2 mask Waveguide core Nearly Perfect Planarization: independent of Crystal Orientations 27

Decoder MUX Mode locked Laser Phase Shifter DEMUX Input Fiber Substrate

28 O CDMA System on a Chip Differential MZI O CDMA RECEIVER O CDMA TRANSMITTER Mode locked Laser PXtal Reflectors Photo Diode Data Modulator 1 cm Encoder Decoder MUX Mode locked Laser Phase Shifter DEMUX Input Fiber Substrate Output Fiber 4 cm DEMUX MUX TE Cooler Electrical Contacts Silicon Micro bench 28

29 OPTICAL ARBITRARY WAVEFORM GENERATION Arrayed Waveguide Grating Amplitude and Phase Modulator Array Delay lines AWG1 AWG2 Phase modulators Bond pads 1 5 T r a n s m i s s i o n S p e c t r u m o f A W G P a i r Transmission (db) Optical Comb Source W a v e l e n g t h ( n m ) f 29

30 Highly Scalable O AWG Encoder/Decoder 320 chx40ghz Amplitude Modulator Phase Modulator Loss [db] mm x 17mm R=100um 32ch x 400GHz Wavelength [um] 30

31 Nano Photonic Interconnect Ref. IBM 31 Photo from: J. D. Joannopoulos, P. R. Villeneuve, and S. Fan, Nature, vol. 386, pp. 143 (1997)

32 Collaborative Applications on CITRIS net In the Future CITRIS Net, perhaps Optical Routers Optical Access Nodes Photonic Interconnected Nano Processors with Integrated Micro/Nano Photonics Inside Server Client CITRIS net Nodes PoP node DARK Fiber 32 Circuit Connection OC 48 or lower

33 10 Gb/s Colliding Pulse Medelocked Lasers with Active/Passive Integration P metal Regrown Fe doped InP Passive Active p InP MQW 1.15Q WG 1.15Q wave guiding core MQW 500nm n InP saturable absorber passive active passive 33

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