A Step Ahead in Phase Change Memory Technology

Size: px
Start display at page:

Download "A Step Ahead in Phase Change Memory Technology"

Transcription

1 A Step Ahead in Phase Change Memory Technology Roberto Bez Process R&D Agrate Brianza (Milan), Italy 2010 Micron Technology, Inc. 1

2 Outline Non Volatile Memories Status The Phase Change Memories An Outlook to the Next Steps 2010 Micron Technology, Inc. 2

3 Non Volatile Memory Market In the last years volume of NVM increased exponentially (with a clear cost reduction..) Total Volume (Eb) Price ($/Gb) Year 0.1 NAND Eb DRAM Eb NAND $/Gb DRAM $/Gb This triggered the use of NVM in a wide spectrum of applications Intel-Micron 64Gbit NAND 20nm NAND MLC technology 2010 Micron Technology, Inc. 3

4 Flash Cell Scaling Challenges Cell basic structure unchanged through the different generations Cell area scaling through: 1. Active device scaling (W/L) 2. Passive elements scaling Main scaling issues: Number of stored electrons Cell proximity interference Tunnel and interpoly dielectric thickness Isolation spacing and WL voltage increase Random Telegraph Noise Trapping/detrapping, SILC Retention after cycling y-pitch NAND L W x-pitch CG C ONO C FG FG C TUN C TUN 2010 Micron Technology, Inc. 4

5 Key Requirements of an Alternative NVM Readiness for beyond leading edge technology node Scalability Cost structure MLC capable 3D stackable Performance High Program and Read Throughput Low power Flexibility Reliability Non-volatility with long retention (e.g. > 10 years) Extended number of read cycles High program endurance 2010 Micron Technology, Inc. 5

6 Outline Non Volatile Memories Status The Phase Change Memories An Outlook to the Next Steps 2010 Micron Technology, Inc. 6

7 Key Messages Significant Innovation Takes Time 2010 Micron Technology, Inc. 7

8 NVM Technology Development Storage Element Memory Cell Memory Cell Array (Test Chip) 1 st Product Concept Demonstration Technology Validation Manufacturability Product Reliability 2010 Micron Technology, Inc. 8

9 Non-Volatile Memory History 1967 First Floating Gate Structure 1971 FAMOS 1977 EPROM 1980 EEPROM T EEPROM (Flash) 1988 NOR Flash 1989 NAND Flash 1995 MLC NOR 2005 MLC NAND 2010 Intel-Micron 64Gb MLC NAND in 25nm technology 2010 Micron Technology, Inc. 9

10 History of PCM Development S. Lai and T. Lowrey, IEDM nm F. Pellizzer et al., VLSI nm F. Pellizzer et al., VLSI nm G. Servalli, IEDM nm PCM cell M. Gill et al., ISSCC nm G. Casagrande et al., VLSI nm Bedeschi et al., ISSCC nm 128Mb (256Mb MLC) C. Villa et al., ISSCC nm 1Gb PCM array & chip Concept Demonstration Technology Validation Product Reliability Manufacturing 2010 Micron Technology, Inc. 10

11 Key Messages Significant Innovation Takes Time A NVM Concept/Technology Must Have a Wide Spectrum of Application 2010 Micron Technology, Inc. 11

12 Phase Change Memory Key Attributes Non Volatility Flexibility No Erase, Bit alterable, Continuous Attributes Non-Volatile Scaling PCM Yes sub-2x nm EEPROM Yes n.a. NOR Yes 3x nm NAND Yes 2x nm DRAM No 3x nm Writing Lower power consumption than RAM Granularity Erase Software Power Small/Byte No Easy ~Flash Small/Byte No Easy ~Flash Large Yes Moderate ~Flash Large Yes Hard ~Flash Small/Byte No Easy High Fast Writes Write Bandwidth MB/s KB/s MB/s 10+ MB/s 100+ MB/s Read bandwidth and writing throughput Read Latency Endurance ns ns ns us ns Unlimited execution in Place Extended endurance PCM provides an new set of features combining components of NVM with DRAM 2010 Micron Technology, Inc. 12

13 Selectors and PCM Array Architectures MOSFET BJT/Diode OTS Process Complexity No mask overhead for the selector Dedicated steps for the p-n-p junction integration Dedicated steps in the BEOL Cell Size Larger (~20F 2 ) Smaller (~5F 2 ) 3D cross-point (~4F 2 /n) Memory Array Organization Conventional Innovative Ground-breaking Application Embedded memory High density/ High Performance Very high density BL WL Schematic Cell Structure Cross-section GND WL n+ p-substrate n+ STI BL p+ n+ n-well p-substrate BL OTS OUM WL 2010 Micron Technology, Inc. 13

14 Embedded PCM (epcm) IMW 2010 IEDM Micron Technology, Inc. 14

15 Stand-Alone NVM TAM Expansion ($K) Wireless SSD }Cost, Reliability, & Performance Bulk NAND Industrial / CE } Cost, Cost & Cost!!! Source: isuppli Application Market Forecast Tool, June Micron Technology, Inc. 15

16 PCM Application Opportunities PCM feature can be exploited by all the memory system, especially the ones resulting from the convergence of consumer, computer and communication electronics Wireless System to store of XiP, semi-static data and files Bit alterability allows direct-write memory Solid State Storage Subsystem to store frequently accessed pages and elements easily managed when manipulated in place Caching with PCM will improve performance and reliability Computing Platforms taking advantage of non-volatility to reduce the power PCM offers endurance and write latency that are compelling for a number of novel solutions S.Eilert et al., PCM: a new memory enables new memory usage models, IMW, Micron Technology, Inc. 16

17 MLC Capability Write Strategies for 2 and 4-bit Multi-Level Phase-Change Memory IBM/Macronix, IEDM 2007 A Multi-Level-Cell Bipolar Selected Phase Change Memory Numonyx, ISSCC 2008 Drift-Tolerant Multileve Phase Change Memory IBM, IMW Micron Technology, Inc. 17

18 Key Messages Significant Innovation Takes Time A NVM Concept Must Have a Wide Spectrum of Application A New NVM Must Be Scalable 2010 Micron Technology, Inc. 18

19 Ultimate Scalability of PCM Y. C. Chen et al., IEDM 2006 P.Wong, EPCOS 2010 Device functionality demonstrated on 60 nm 2 active area Reset current <10uA Phase change mechanism appears scalable to at least ~5nm C. Lam, SRC NVM Forum Micron Technology, Inc. 19

20 Outline Non Volatile Memories Status The Phase Change Memories An Outlook to the Next Steps 2010 Micron Technology, Inc. 20

21 An Outlook to the Future Scaling the existing architecture, providing the smallest cell size, following the lithography roadmap Exploring new chalcogenide alloys which may open new application fields GeTe 40 DVD+RAM Te (at %) Ge or M (at %) GeSbTe(GST) Doped SbTe DVD+RW M-Sb 2 Te Sb 2 Te 3 Sb 2 Te Sb (at %) Exploiting a true cross-point array which will allow vertical stacking of more than one memory layer DerChang Kau et al., IEDM Micron Technology, Inc. 21

22 PCM Active Material Despite Ge 2 Sb 2 Te 5 has been demonstrated a good material for PCM fabrication, many other chalcogenide materials are available for use in solid state memories, exploiting the experience of optical disk research But other requirements must be satisfied: Ge or M (at %) GeSbTe(GST) Doped SbTe GeTe DVD+RAM DVD+RW M-Sb 2 Te Te (at %) Sb 2 Te 3 Sb 2 Te Sb (at %) Electronic switching capability with reasonable switching voltage Sufficiently low set resistance for reading performances Sufficiently low melting temperature for program performances Stability under million of cycles Higher crystallization temperature for better retention From optical disk experience Ge, Sb, Te, In, Si compounds are most suitable materials for employment in solid state devices 2010 Micron Technology, Inc. 22

23 GST Ternary Diagram Goal: improve the cell performances GeSbTe ternary compound system GeTe Sb 2 Te 3 pseudo-binary line M. Boniardi et al., IMW 2010 Sb rich region exploration is done to electrically study new compounds in the fast growth Sb 69 Te 31 direction 2010 Micron Technology, Inc. 23

24 Electrical Characteristics Decrease of the reset resistance with the increase in the Sb concentration Convergence of the set level to the minimum set 2010 Micron Technology, Inc. 24

25 Higher-Temperature Chalcogenide N-doped GeTe as Performance Booster for Embedded Phase-Change Memories CEA-LETI/ST, IEDM 2010 On Carbon doping to improve GeTe-based Phase-Change Memory data retention at high temperature CEA-LETI/ST, IMW 2010 Electrical Performances of Tellurium-rich Ge x -Te 1-x Phase Change Memory CEA-LETI/ST, IMW Micron Technology, Inc. 25

26 Further Key Materials Other key issue of the PCM cell engineering are: Role of thermal environment: thermal conductivity of the surrounding dielectrics Role of thermal interfaces between materials Role of electrical interface between materials 2010 Micron Technology, Inc. 26

27 PCM Self-Heating Cell Structure Planar structures Vertical self-heating structure with fully confined GST very conformal chalcogenide deposition required (e.g. ALD) 2010 Symp. On VLSI Tech. Samsung 2010 Micron Technology, Inc. 27

28 3D Integration Cross-Point Memory Crossbar memory attracts great interests simple structure and minimum cell size (4F 2 ) low cost suitable for 3D stacking cell size (4/n)F 2 array over circuitry better array efficiency The basic cell architecture requires a selector structure to be integrated in the BEOL Parasitic paths exist through neighbouring cells Programming (and also reading) can perturb the array V prog V prog /2 V prog /2 V prog /2 0 V V prog / Micron Technology, Inc. 28

29 A Wide Range of Material Choices Selector device Homojunctions polysi p/n junctions Heterojunctions p-cuo/n-inzno Schottky diode Ag/n-ZnO Chalcogenide Ovonic Threshold Switching (OTS) materials Mixed Ionic Electronic Conduction (MIEC) materials Storing device STTRAM RRAM or CBRAM PCM For the selector structure few concepts have been proposed so far, all in the path finding phase 2010 Micron Technology, Inc. 29

30 Cross-Point Switch Requirements Very high forward bias current greater than the switching current Low reverse bias current Prevent loss of signal by cross talk Leakage may set the block size Composition compatible with memory material Low temperature process Bipolar operation 2010 Micron Technology, Inc. 30

31 PCMS Memory Cell Cross-Bar Architecture Ovonic Threshold Switch, OTS, is a two-terminal switch Column Row Metal 1 Metal 2 Poly Si-Substrate Intel-Numonyx, IEDM 2009 Chalcogenide materials can be used both for the memory and for the selector (OTS) to form stackable cross point PCM (PCMS) True high density cross-bar Possible multilayer vertical stacking 2010 Micron Technology, Inc. 31

32 Conclusions The mainstream Non-Volatile Memory (Flash) is today approaching its scaling limitation Several other alternative concepts have been proposed but few of them are really appealing from a cost stand point Among those technology, PCM is today in a privileged position, having already demonstrated functionality and reliability at 90 nm and 45 nm nodes on large products Large room for chalcogenide material and cell engineering Crossbar 3D approach has been identified as a viable way to further reduce the cost/bit 2010 Micron Technology, Inc. 32

33 July 11

Will Phase Change Memory (PCM) Replace DRAM or NAND Flash?

Will Phase Change Memory (PCM) Replace DRAM or NAND Flash? Will Phase Change Memory (PCM) Replace DRAM or NAND Flash? Dr. Mostafa Abdulla High-Speed Engineering Sr. Manager, Micron Marc Greenberg Product Marketing Director, Cadence August 19, 2010 Flash Memory

More information

NAND Flash Memory: Basics, Key Scaling Challenges and Future Outlook. Pranav Kalavade Intel Corporation

NAND Flash Memory: Basics, Key Scaling Challenges and Future Outlook. Pranav Kalavade Intel Corporation NAND Flash Memory: Basics, Key Scaling Challenges and Future Outlook Pranav Kalavade Intel Corporation pranav.kalavade@intel.com October 2012 Outline Flash Memory Product Trends Flash Memory Device Primer

More information

From Silicon to Solutions: Getting the Right Memory Mix for the Application

From Silicon to Solutions: Getting the Right Memory Mix for the Application From Silicon to Solutions: Getting the Right Memory Mix for the Application Ed Doller Numonyx CTO Flash Memory Summit 2008 Legal Notices and Important Information Regarding this Presentation Numonyx may

More information

Phase Change Memory: Replacement or Transformational

Phase Change Memory: Replacement or Transformational Phase Change Memory: Replacement or Transformational Hsiang-Lan Lung Macronix International Co., Ltd IBM/Macronix PCM Joint Project LETI 4th Workshop on Inovative Memory Technologies 06/21/2012 PCM is

More information

Phase Change Memory and its positive influence on Flash Algorithms Rajagopal Vaideeswaran Principal Software Engineer Symantec

Phase Change Memory and its positive influence on Flash Algorithms Rajagopal Vaideeswaran Principal Software Engineer Symantec Phase Change Memory and its positive influence on Flash Algorithms Rajagopal Vaideeswaran Principal Software Engineer Symantec Agenda Why NAND / NOR? NAND and NOR Electronics Phase Change Memory (PCM)

More information

Recent Development and Progress in Nonvolatile Memory for Embedded Market

Recent Development and Progress in Nonvolatile Memory for Embedded Market Recent Development and Progress in Nonvolatile Memory for Embedded Market Saied Tehrani, Ph.D. Chief Technology Officer, Spansion Inc. July 11, 2012 1 Outline Market Trend for Nonvolatile Memory NOR Flash

More information

Advanced Flash Technology Status, Scaling Trends & Implications to Enterprise SSD Technology Enablement

Advanced Flash Technology Status, Scaling Trends & Implications to Enterprise SSD Technology Enablement Advanced Flash Technology Status, Scaling Trends & Implications to Enterprise SSD Technology Enablement Jung H. Yoon & Gary A. Tressler IBM Corporation Aug 21, 2012 Santa Clara, CA 1 Outline Si Technology

More information

NAND Flash Memory. Jinkyu Jeong Computer Systems Laboratory Sungkyunkwan University

NAND Flash Memory. Jinkyu Jeong Computer Systems Laboratory Sungkyunkwan University NAND Flash Memory Jinkyu Jeong (Jinkyu@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu ICE3028: Embedded Systems Design, Fall 2018, Jinkyu Jeong (jinkyu@skku.edu) Flash

More information

Test and Reliability of Emerging Non-Volatile Memories

Test and Reliability of Emerging Non-Volatile Memories Test and Reliability of Emerging Non-Volatile Memories Elena Ioana Vătăjelu, Lorena Anghel TIMA Laboratory, Grenoble, France Outline Emerging Non-Volatile Memories Defects and Fault Models Test Algorithms

More information

Numonyx Company Overview. Non-Volatile Memory Vision (R.Bez)

Numonyx Company Overview. Non-Volatile Memory Vision (R.Bez) Numonyx Company Overview Non-Volatile Memory Vision (R.Bez) Announce the intent to form New Global Memory Company May 22 nd, 2007- Francisco Partners, Intel and ST announce intent to form a new global

More information

Daniele Ielmini DEI - Politecnico di Milano, Milano, Italy Outline. Solid-state disk (SSD) Storage class memory (SCM)

Daniele Ielmini DEI - Politecnico di Milano, Milano, Italy Outline. Solid-state disk (SSD) Storage class memory (SCM) Beyond NVMs Daniele Ielmini DEI - Politecnico di Milano, Milano, Italy ielmini@elet.polimi.it Outline Storage applications Solid-state disk (SSD) Storage class memory (SCM) Logic applications: Crossbar

More information

Phase Change Memory An Architecture and Systems Perspective

Phase Change Memory An Architecture and Systems Perspective Phase Change Memory An Architecture and Systems Perspective Benjamin C. Lee Stanford University bcclee@stanford.edu Fall 2010, Assistant Professor @ Duke University Benjamin C. Lee 1 Memory Scaling density,

More information

Content courtesy of Wikipedia.org. David Harrison, CEO/Design Engineer for Model Sounds Inc.

Content courtesy of Wikipedia.org. David Harrison, CEO/Design Engineer for Model Sounds Inc. Content courtesy of Wikipedia.org David Harrison, CEO/Design Engineer for Model Sounds Inc. Common FLASH Memory SD cards + mini, micro versions serial interface slower Compact Flash - parallel interface

More information

Intel s s Memory Strategy for the Wireless Phone

Intel s s Memory Strategy for the Wireless Phone Intel s s Memory Strategy for the Wireless Phone Stefan Lai VP and Co-Director, CTM Intel Corporation Nikkei Microdevices Memory Symposium January 26 th, 2005 Agenda Evolution of Memory Requirements Evolution

More information

Optimize your system designs using Flash memory

Optimize your system designs using Flash memory Optimize your system designs using Flash memory Howard Cheng Sr. Segment Applications Manager Embedded Solutions Group, Micron 2012 Micron Technology, Inc. All rights reserved. Products are warranted only

More information

ΔΙΑΛΕΞΗ 5: FPGA Programming Technologies (aka: how to connect/disconnect wires/gates)

ΔΙΑΛΕΞΗ 5: FPGA Programming Technologies (aka: how to connect/disconnect wires/gates) ΗΜΥ 408 ΨΗΦΙΑΚΟΣ ΣΧΕΔΙΑΣΜΟΣ ΜΕ FPGAs Χειμερινό Εξάμηνο 2018 ΔΙΑΛΕΞΗ 5: FPGA Programming Technologies (aka: how to connect/disconnect wires/gates) (ack: Jurriaan Schmitz, Semiconductor Components) ΧΑΡΗΣ

More information

Unleashing MRAM as Persistent Memory

Unleashing MRAM as Persistent Memory Unleashing MRAM as Persistent Memory Andrew J. Walker PhD Spin Transfer Technologies Contents The Creaking Pyramid Challenges with the Memory Hierarchy What and Where is MRAM? State of the Art pmtj Unleashing

More information

Forthcoming Cross Point ReRAM. Amigo Tsutsui Sony Semiconductor Solutions Corp

Forthcoming Cross Point ReRAM. Amigo Tsutsui Sony Semiconductor Solutions Corp Forthcoming Cross Point ReRAM Amigo Tsutsui Sony Semiconductor Solutions Corp ReRAM: High Speed and Low Power PCM Two states of phase change material Based on thermal operation Amorphous: low resistance

More information

Embedded System Application

Embedded System Application Laboratory Embedded System Application 4190.303C 2010 Spring Semester ROMs, Non-volatile and Flash Memories ELPL Naehyuck Chang Dept. of EECS/CSE Seoul National University naehyuck@snu.ac.kr Revisit Previous

More information

Programming Characteristics on Three-Dimensional NAND Flash Structure Using Edge Fringing Field Effect

Programming Characteristics on Three-Dimensional NAND Flash Structure Using Edge Fringing Field Effect JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.14, NO.5, OCTOBER, 2014 http://dx.doi.org/10.5573/jsts.2014.14.5.537 Programming Characteristics on Three-Dimensional NAND Flash Structure Using Edge

More information

Advanced Information Storage 11

Advanced Information Storage 11 Advanced Information Storage 11 Atsufumi Hirohata Department of Electronics 16:00 11/November/2013 Monday (P/L 002) Quick Review over the Last Lecture Shingled write recording : * Bit patterned media (BPM)

More information

MTJ-Based Nonvolatile Logic-in-Memory Architecture

MTJ-Based Nonvolatile Logic-in-Memory Architecture 2011 Spintronics Workshop on LSI @ Kyoto, Japan, June 13, 2011 MTJ-Based Nonvolatile Logic-in-Memory Architecture Takahiro Hanyu Center for Spintronics Integrated Systems, Tohoku University, JAPAN Laboratory

More information

Magnetic core memory (1951) cm 2 ( bit)

Magnetic core memory (1951) cm 2 ( bit) Magnetic core memory (1951) 16 16 cm 2 (128 128 bit) Semiconductor Memory Classification Read-Write Memory Non-Volatile Read-Write Memory Read-Only Memory Random Access Non-Random Access EPROM E 2 PROM

More information

Monolithic 3D Flash NEW TECHNOLOGIES & DEVICE STRUCTURES

Monolithic 3D Flash NEW TECHNOLOGIES & DEVICE STRUCTURES Monolithic 3D Flash Andrew J. Walker Schiltron Corporation Abstract The specter of the end of the NAND Flash roadmap has resulted in renewed interest in monolithic 3D approaches that continue the drive

More information

High Performance and Highly Reliable SSD

High Performance and Highly Reliable SSD High Performance and Highly Reliable SSD -Proposal of the Fastest Storage with B4-Flash - Moriyoshi Nakashima GENUSION,Inc http://www.genusion.co.jp/ info@genusion.co.jp Santa Clara, CA 1 Big Data comes

More information

Samsung K9GAG08U0M-PCB0 16 Gbit Multi-Level Cell (MLC) 51 nm Process Technology NAND Flash Memory

Samsung K9GAG08U0M-PCB0 16 Gbit Multi-Level Cell (MLC) 51 nm Process Technology NAND Flash Memory Samsung K9GAG08U0M-PCB0 16 Gbit Multi-Level Cell (MLC) 51 nm Process Technology NAND Flash Memory Structural Analysis with Additional Layout Feature Analysis For comments, questions, or more information

More information

Designing with External Flash Memory on Renesas Platforms

Designing with External Flash Memory on Renesas Platforms Designing with External Flash Memory on Renesas Platforms Douglas Crane, Segment Manager Micron Technology Class ID: CL23A Renesas Electronics America Inc. Douglas Crane Doug is a 27 year veteran in the

More information

Flash TOSHIBA TOSHIBA

Flash TOSHIBA TOSHIBA Flash VOLATILE Mobile Application Low Power SDRAM Pseudo SRAM High Speed Application embedded edram PLEDM FBC memory Low Power Low Power SRAM QDR SRAM DDR SRAM Sigma RAM FeRAM High Speed MRAM OUM Universal

More information

Emerging NV Storage and Memory Technologies --Development, Manufacturing and

Emerging NV Storage and Memory Technologies --Development, Manufacturing and Emerging NV Storage and Memory Technologies --Development, Manufacturing and Applications-- Tom Coughlin, Coughlin Associates Ed Grochowski, Computer Storage Consultant 2014 Coughlin Associates 1 Outline

More information

Flash Memories. Ramin Roosta Dept. of Computer Engineering. EE 595 EDA / ASIC Design Lab

Flash Memories. Ramin Roosta Dept. of Computer Engineering. EE 595 EDA / ASIC Design Lab Flash Memories Ramin Roosta Dept. of Computer Engineering EE 595 EDA / ASIC Design Lab Content Non-volatile memories Flash applications Industry standards Architectures Main reliability issues New cells

More information

NAND Flash: Where we are, where are we going?

NAND Flash: Where we are, where are we going? NAND Flash: Where we are, where are we going? Pranav Kalavade Intel Corporation Outline Introduction 3D NAND Floating Gate 3D NAND Technology CMOS Under Array Cell Characteristics Summary Cell Size [um

More information

Mohsen Imani. University of California San Diego. System Energy Efficiency Lab seelab.ucsd.edu

Mohsen Imani. University of California San Diego. System Energy Efficiency Lab seelab.ucsd.edu Mohsen Imani University of California San Diego Winter 2016 Technology Trend for IoT http://www.flashmemorysummit.com/english/collaterals/proceedi ngs/2014/20140807_304c_hill.pdf 2 Motivation IoT significantly

More information

Performance & Reliability Driven Memory solution. MacronixInternational Co., Ltd.

Performance & Reliability Driven Memory solution. MacronixInternational Co., Ltd. Performance & Reliability Driven Memory solution MacronixInternational Co., Ltd. About Macronix A Leading Non-Volatile Memory Solutions Provider Founded in 1989 Headquarters Hsin-Chu, Taiwan Total5280

More information

The impact of 3D storage solutions on the next generation of memory systems

The impact of 3D storage solutions on the next generation of memory systems The impact of 3D storage solutions on the next generation of memory systems DevelopEX 2017 Airport City Israel Avi Klein Engineering Fellow, Memory Technology Group Western Digital Corp October 31, 2017

More information

Chapter 3 Semiconductor Memories. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan

Chapter 3 Semiconductor Memories. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Chapter 3 Semiconductor Memories Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Outline Introduction Random Access Memories Content Addressable Memories Read

More information

Introduction 1. GENERAL TRENDS. 1. The technology scale down DEEP SUBMICRON CMOS DESIGN

Introduction 1. GENERAL TRENDS. 1. The technology scale down DEEP SUBMICRON CMOS DESIGN 1 Introduction The evolution of integrated circuit (IC) fabrication techniques is a unique fact in the history of modern industry. The improvements in terms of speed, density and cost have kept constant

More information

Versatile RRAM Technology and Applications

Versatile RRAM Technology and Applications Versatile RRAM Technology and Applications Hagop Nazarian Co-Founder and VP of Engineering, Crossbar Inc. Santa Clara, CA 1 Agenda Overview of RRAM Technology RRAM for Embedded Memory Mass Storage Memory

More information

Technology and Manufacturing

Technology and Manufacturing Technology and Manufacturing Executive Vice President Field Trip 2006 - London, May 23rd Field Trip 2006 - London, May 23rd Technology Technology Development Centers and Main Programs CMOS Logic Platform

More information

How Good Is Your Memory? An Architect s Look Inside SSDs

How Good Is Your Memory? An Architect s Look Inside SSDs How Good Is Your Memory? An Architect s Look Inside SSDs Michael Abraham (mabraham@micron.com) Business Line Manager Micron Technology, Inc. August 2015 1 Early Storage Optimizations µc NAND Camera SmartMedia

More information

Memory Class Storage. Bill Gervasi Principal Systems Architect Santa Clara, CA August

Memory Class Storage. Bill Gervasi Principal Systems Architect Santa Clara, CA August Memory Class Storage Bill Gervasi Principal Systems Architect bilge@nantero.com August 2018 1 DRAM Treadmill DDR5-3200 DDR5-3600 DDR5-4400 DDR5-4000 DDR5-4800 DDR5-5200 DDR4-1600 DDR5-5600 DDR4-1866 DDR5-6000

More information

Lecture 14. Advanced Technologies on SRAM. Fundamentals of SRAM State-of-the-Art SRAM Performance FinFET-based SRAM Issues SRAM Alternatives

Lecture 14. Advanced Technologies on SRAM. Fundamentals of SRAM State-of-the-Art SRAM Performance FinFET-based SRAM Issues SRAM Alternatives Source: Intel the area ratio of SRAM over logic increases Lecture 14 Advanced Technologies on SRAM Fundamentals of SRAM State-of-the-Art SRAM Performance FinFET-based SRAM Issues SRAM Alternatives Reading:

More information

Flash Memory Overview: Technology & Market Trends. Allen Yu Phison Electronics Corp.

Flash Memory Overview: Technology & Market Trends. Allen Yu Phison Electronics Corp. Flash Memory Overview: Technology & Market Trends Allen Yu Phison Electronics Corp. 25,000 20,000 15,000 The NAND Market 40% CAGR 10,000 5,000 ($Million) - 2001 2002 2003 2004 2005 2006 2007 2008 2009

More information

Applications embedding 16MB Phase

Applications embedding 16MB Phase Truly Innovative 28nm FDSOI Technology for Automotive Microcontroller Applications embedding 16MB Phase Change Memory F.ARNAUD 1, P.ZULIANI 2, J.P.REYNARD 1, A. GANDOLFO 2, F.DISEGNI 2, P.MATTAVELLI 2,

More information

Embedded Memory Alternatives

Embedded Memory Alternatives EE241 - Spring 2005 Advanced Digital Integrated Circuits Lecture 26: Embedded Memory - Flash Slides Courtesy of Randy McKee, TI Embedded Memory Alternatives Courtesy Randy McKee, TI 2 1 3 4 2 5 SRAM 3

More information

High Density, High Reliability Carbon Nanotube NRAM. Thomas Rueckes CTO Nantero

High Density, High Reliability Carbon Nanotube NRAM. Thomas Rueckes CTO Nantero High Density, High Reliability Carbon Nanotube NRAM Thomas Rueckes CTO Nantero Nantero Overview Founded in 2001 to develop nonvolatile memory using carbon nanotubes (CNT) for high density standalone and

More information

Scalable High Performance Main Memory System Using PCM Technology

Scalable High Performance Main Memory System Using PCM Technology Scalable High Performance Main Memory System Using PCM Technology Moinuddin K. Qureshi Viji Srinivasan and Jude Rivers IBM T. J. Watson Research Center, Yorktown Heights, NY International Symposium on

More information

MLC 2.5 SATA III SSD

MLC 2.5 SATA III SSD MLC 2.5 SATA III SSD HERCULES-T Series Product Specification APRO RUGGED METAL 2.5 SATA III MLC SSD Version 01V0 Document No. 100-xR2SR-MTCTMB MAY 2017 APRO CO., LTD. Phone: +88628226-1539 Fax: +88628226-1389

More information

Markets for 3D-Xpoint Applications, Performance and Revenue

Markets for 3D-Xpoint Applications, Performance and Revenue Markets for 3D-Xpoint Applications, Performance and Revenue Mark Webb MKW Ventures Consulting, LLC Santa Clara, CA 1 Contents Persistent Memory Options What is 3D Xpoint The hype-reality challenge of xpoint

More information

Embedded 28-nm Charge-Trap NVM Technology

Embedded 28-nm Charge-Trap NVM Technology Embedded 28-nm Charge-Trap NVM Technology Igor Kouznetsov Santa Clara, CA 1 Outline Embedded NVM applications Charge-trap NVM at Cypress Scaling Key Flash macro specs 28-nm Flash memory reliability Conclusions

More information

CS311 Lecture 21: SRAM/DRAM/FLASH

CS311 Lecture 21: SRAM/DRAM/FLASH S 14 L21-1 2014 CS311 Lecture 21: SRAM/DRAM/FLASH DARM part based on ISCA 2002 tutorial DRAM: Architectures, Interfaces, and Systems by Bruce Jacob and David Wang Jangwoo Kim (POSTECH) Thomas Wenisch (University

More information

Advanced 1 Transistor DRAM Cells

Advanced 1 Transistor DRAM Cells Trench DRAM Cell Bitline Wordline n+ - Si SiO 2 Polysilicon p-si Depletion Zone Inversion at SiO 2 /Si Interface [IC1] Address Transistor Memory Capacitor SoC - Memory - 18 Advanced 1 Transistor DRAM Cells

More information

Future Memories. Jim Handy OBJECTIVE ANALYSIS

Future Memories. Jim Handy OBJECTIVE ANALYSIS Future Memories Jim Handy OBJECTIVE ANALYSIS Hitting a Brick Wall OBJECTIVE ANALYSIS www.objective-analysis.com Panelists Michael Miller VP Technology, Innovation & Systems Applications MoSys Christophe

More information

FLASH DATA RETENTION

FLASH DATA RETENTION FLASH DATA RETENTION Document #AN0011 Viking Rev. B Purpose of this Document This application note was prepared to help OEM system designers evaluate the performance of Viking solid state drive solutions

More information

RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations

RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations RRAM Crossbar Arrays for Storage Class Memory Applications : Throughput and Density Considerations A. Levisse 1, B. Giraud 2, J.-P. Noel 2, M. Moreau 3, J.-M. Portal 3 1 Embedded Systems Laboratory (ESL),

More information

COMPUTER ARCHITECTURE

COMPUTER ARCHITECTURE COMPUTER ARCHITECTURE 8 Memory Types & Technologies RA - 8 2018, Škraba, Rozman, FRI Memory types & technologies - objectives 8 Memory types & technologies - objectives: Basic understanding of: The speed

More information

The Evolving Semiconductor Technology Landscape and What it Means for Lithography. Scotten W. Jones President IC Knowledge LLC

The Evolving Semiconductor Technology Landscape and What it Means for Lithography. Scotten W. Jones President IC Knowledge LLC The Evolving Semiconductor Technology Landscape and What it Means for Lithography Scotten W. Jones President IC Knowledge LLC Outline NAND DRAM Logic Conclusion 2 NAND Linewidth Trend 2D to 3D For approximately

More information

Novel Nonvolatile Memory Hierarchies to Realize "Normally-Off Mobile Processors" ASP-DAC 2014

Novel Nonvolatile Memory Hierarchies to Realize Normally-Off Mobile Processors ASP-DAC 2014 Novel Nonvolatile Memory Hierarchies to Realize "Normally-Off Mobile Processors" ASP-DAC 2014 Shinobu Fujita, Kumiko Nomura, Hiroki Noguchi, Susumu Takeda, Keiko Abe Toshiba Corporation, R&D Center Advanced

More information

MRAM, XPoint, ReRAM PM Fuel to Propel Tomorrow s Computing Advances

MRAM, XPoint, ReRAM PM Fuel to Propel Tomorrow s Computing Advances MRAM, XPoint, ReRAM PM Fuel to Propel Tomorrow s Computing Advances Jim Handy Objective Analysis Tom Coughlin Coughlin Associates The Market is at a Nexus PM 2 Emerging Memory Technologies MRAM: Magnetic

More information

Phase Change Memory An Architecture and Systems Perspective

Phase Change Memory An Architecture and Systems Perspective Phase Change Memory An Architecture and Systems Perspective Benjamin Lee Electrical Engineering Stanford University Stanford EE382 2 December 2009 Benjamin Lee 1 :: PCM :: 2 Dec 09 Memory Scaling density,

More information

Lorem ipsum dolor sit amet, consectetur adipiscing elit. Increasing dependence of the functionality

Lorem ipsum dolor sit amet, consectetur adipiscing elit. Increasing dependence of the functionality Analysis on Resistive Random Access Memory (RRAM) 1S1R Array Zizhen Jiang I. Introduction Lorem ipsum dolor sit amet, consectetur adipiscing elit. Increasing dependence of the functionality and performance

More information

A Versatile Platform for Characterization of Solid-State Memory Channels

A Versatile Platform for Characterization of Solid-State Memory Channels A Versatile Platform for Characterization of Solid-State Memory Channels N. Papandreou, Th. Antonakopoulos,U.Egger,A.Palli, H. Pozidis and E. Eleftheriou IBM Research Zurich, CH-8803 Rüschlikon, Switzerland

More information

Recent Advancements in Spin-Torque Switching for High-Density MRAM

Recent Advancements in Spin-Torque Switching for High-Density MRAM Recent Advancements in Spin-Torque Switching for High-Density MRAM Jon Slaughter Everspin Technologies 7th International Symposium on Advanced Gate Stack Technology, September 30, 2010 Everspin Technologies,

More information

Very Large Scale Integration (VLSI)

Very Large Scale Integration (VLSI) Very Large Scale Integration (VLSI) Lecture 8 Dr. Ahmed H. Madian ah_madian@hotmail.com Content Array Subsystems Introduction General memory array architecture SRAM (6-T cell) CAM Read only memory Introduction

More information

Emerging IC Packaging Platforms for ICT Systems - MEPTEC, IMAPS and SEMI Bay Area Luncheon Presentation

Emerging IC Packaging Platforms for ICT Systems - MEPTEC, IMAPS and SEMI Bay Area Luncheon Presentation Emerging IC Packaging Platforms for ICT Systems - MEPTEC, IMAPS and SEMI Bay Area Luncheon Presentation Dr. Li Li Distinguished Engineer June 28, 2016 Outline Evolution of Internet The Promise of Internet

More information

A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement

A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement Guangyu Sun, Yongsoo Joo, Yibo Chen Dimin Niu, Yuan Xie Pennsylvania State University {gsun,

More information

The Many Flavors of NAND and More to Come

The Many Flavors of NAND and More to Come The Many Flavors of NAND and More to Come Brian Shirley VP Micron Memory Product Group 1 NAND Market Growth Drivers Top 10 Applications by Units Shipped 4000 # of Units per Application 3500 Millions of

More information

Onyx: A Prototype Phase-Change Memory Storage Array

Onyx: A Prototype Phase-Change Memory Storage Array Onyx: A Prototype Phase-Change Memory Storage Array Ameen Akel * Adrian Caulfield, Todor Mollov, Rajesh Gupta, Steven Swanson Non-Volatile Systems Laboratory, Department of Computer Science and Engineering

More information

Ushering in the 3D Memory Era with V- NAND

Ushering in the 3D Memory Era with V- NAND Ushering in the 3D Memory Era with V- NAND Aug. 2013 Jim Elliott (Vice President, Memory Marketing) E.S. Jung (EVP/GM, Semiconductor R&D Center) Flash Memory Summit 2013 Santa Clara, CA 1 Legal Disclaimer

More information

Introduction to CMOS VLSI Design. Semiconductor Memory Harris and Weste, Chapter October 2018

Introduction to CMOS VLSI Design. Semiconductor Memory Harris and Weste, Chapter October 2018 Introduction to CMOS VLSI Design Semiconductor Memory Harris and Weste, Chapter 12 25 October 2018 J. J. Nahas and P. M. Kogge Modified from slides by Jay Brockman 2008 [Including slides from Harris &

More information

Integrated Circuits & Systems

Integrated Circuits & Systems Federal University of Santa Catarina Center for Technology Computer Science & Electronics Engineering Integrated Circuits & Systems INE 5442 Lecture 23-1 guntzel@inf.ufsc.br Semiconductor Memory Classification

More information

Emerging NVM Memory Technologies

Emerging NVM Memory Technologies Emerging NVM Memory Technologies Yuan Xie Associate Professor The Pennsylvania State University Department of Computer Science & Engineering www.cse.psu.edu/~yuanxie yuanxie@cse.psu.edu Position Statement

More information

EMERGING NON VOLATILE MEMORY

EMERGING NON VOLATILE MEMORY EMERGING NON VOLATILE MEMORY Innovative components for neuromorphic architecture Leti, technology research institute Contact: leti.contact@cea.fr Neuromorphic architecture Brain-inspired computing has

More information

Design and Simulation of Low Power 6TSRAM and Control its Leakage Current Using Sleepy Keeper Approach in different Topology

Design and Simulation of Low Power 6TSRAM and Control its Leakage Current Using Sleepy Keeper Approach in different Topology Vol. 3, Issue. 3, May.-June. 2013 pp-1475-1481 ISSN: 2249-6645 Design and Simulation of Low Power 6TSRAM and Control its Leakage Current Using Sleepy Keeper Approach in different Topology Bikash Khandal,

More information

Power IC 용 ESD 보호기술. 구용서 ( Yong-Seo Koo ) Electronic Engineering Dankook University, Korea

Power IC 용 ESD 보호기술. 구용서 ( Yong-Seo Koo ) Electronic Engineering Dankook University, Korea Power IC 용 ESD 보호기술 구용서 ( Yong-Seo Koo ) Electronic Engineering Dankook University, Korea yskoo@dankook.ac.kr 031-8005-3625 Outline Introduction Basic Concept of ESD Protection Circuit ESD Technology Issue

More information

NAND Flash Memory. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University

NAND Flash Memory. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University NAND Flash Memory Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Flash Memory Memory Types EPROM FLASH High-density Low-cost High-speed Low-power

More information

NAND Flash Basics & Error Characteristics

NAND Flash Basics & Error Characteristics NAND Flash Basics & Error Characteristics Why Do We Need Smart Controllers? Thomas Parnell, Roman Pletka IBM Research - Zurich Santa Clara, CA 1 Agenda Part I. NAND Flash Basics Device Architecture (2D

More information

The Long-Term Future of Solid State Storage Jim Handy Objective Analysis

The Long-Term Future of Solid State Storage Jim Handy Objective Analysis The Long-Term Future of Solid State Storage Jim Handy Objective Analysis Agenda How did we get here? Why it s suboptimal How we move ahead Why now? DRAM speed scaling Changing role of NVM in computing

More information

Could We Make SSDs Self-Healing?

Could We Make SSDs Self-Healing? Could We Make SSDs Self-Healing? Tong Zhang Electrical, Computer and Systems Engineering Department Rensselaer Polytechnic Institute Google/Bing: tong rpi Santa Clara, CA 1 Introduction and Motivation

More information

When it comes to double-density Flash memory, some pairs are just better.

When it comes to double-density Flash memory, some pairs are just better. MirrorBit Flash When it comes to double-density Flash memory, some pairs are just better. AMD pairs high-performance with reliability in a single Flash memory cell, with revolutionary results. Introducing

More information

Semiconductor Memory Storage (popular types)

Semiconductor Memory Storage (popular types) Semiconductor Memory Storage (popular types) Volatile Semiconductor Memory Non-Volatile RAM DRAM SRAM Floating Gate Nitride Emerging ROM & Fuse Polymer NV Ram Ferro- Magnetic Phase Unified Mem electric

More information

Semiconductor Memory II Future Memory Trend

Semiconductor Memory II Future Memory Trend Semiconductor Memory II Future Memory Trend Seong-Ook Jung 2010. 4. 2. sjung@yonsei.ac.kr VLSI SYSTEM LAB, YONSEI University School of Electrical & Electronic Engineering Contents 1. Future memory trend

More information

3-Dimensional Monolithic Nonvolatile Memories and the Future of Solid-State Data Storage

3-Dimensional Monolithic Nonvolatile Memories and the Future of Solid-State Data Storage 3-Dimensional Monolithic Nonvolatile Memories and the Future of Solid-State Data Storage Dr. Michael A. Vyvoda Director, Technology Transfer and Operations 3D Technology Group SanDisk Corporation February

More information

Flash memory talk Felton Linux Group 27 August 2016 Jim Warner

Flash memory talk Felton Linux Group 27 August 2016 Jim Warner Flash memory talk Felton Linux Group 27 August 2016 Jim Warner Flash Memory Summit Annual trade show at Santa Clara Convention Center Where there is money, trade shows follow. August 8 11, 2016 Borrowing

More information

ReRAM Status and Forecast 2017

ReRAM Status and Forecast 2017 ReRAM Status and Forecast 2017 Mark Webb The Latency Spectrum and Gaps More Like Memory More Like Storage CPU/ SRAM DRAM Storage Class Memory GAP NAND SLC to TLC HDD TAPE 1ns 10ns 100ns 1us 10us 100us

More information

CMPEN 411 VLSI Digital Circuits Spring Lecture 22: Memery, ROM

CMPEN 411 VLSI Digital Circuits Spring Lecture 22: Memery, ROM CMPEN 411 VLSI Digital Circuits Spring 2011 Lecture 22: Memery, ROM [Adapted from Rabaey s Digital Integrated Circuits, Second Edition, 2003 J. Rabaey, A. Chandrakasan, B. Nikolic] Sp11 CMPEN 411 L22 S.1

More information

3D Xpoint Status and Forecast 2017

3D Xpoint Status and Forecast 2017 3D Xpoint Status and Forecast 2017 Mark Webb MKW 1 Ventures Consulting, LLC Memory Technologies Latency Density Cost HVM ready DRAM ***** *** *** ***** NAND * ***** ***** ***** MRAM ***** * * *** 3DXP

More information

Architecture for Carbon Nanotube Based Memory (NRAM)

Architecture for Carbon Nanotube Based Memory (NRAM) Architecture for Carbon Nanotube Based Memory () Bill Gervasi Principal Systems Architect 18 August 2018 Agenda 2 Carbon nanotube basics Making & breaking connections Resistive measurements Write endurance,

More information

Data Retention in MLC NAND Flash Memory: Characterization, Optimization, and Recovery

Data Retention in MLC NAND Flash Memory: Characterization, Optimization, and Recovery Data Retention in MLC NAND Flash Memory: Characterization, Optimization, and Recovery Yu Cai, Yixin Luo, Erich F. Haratsch*, Ken Mai, Onur Mutlu Carnegie Mellon University, *LSI Corporation 1 Many use

More information

envm in Automotive Modules MINATEC Workshop Grenoble, June 21, 2010 May Marco 28, 2009 OLIVO, ST Automotive Group

envm in Automotive Modules MINATEC Workshop Grenoble, June 21, 2010 May Marco 28, 2009 OLIVO, ST Automotive Group envm in Automotive Modules MINATEC Workshop Grenoble, June 21, 2010 May Marco 28, 2009 OLIVO, ST Automotive Group envm in automotive: Outline marketing requirements

More information

Exploring the Potential of Phase Change Memories as an Alternative to DRAM Technology

Exploring the Potential of Phase Change Memories as an Alternative to DRAM Technology Exploring the Potential of Phase Change Memories as an Alternative to DRAM Technology Venkataraman Krishnaswami, Venkatasubramanian Viswanathan Abstract Scalability poses a severe threat to the existing

More information

Memory technology and optimizations ( 2.3) Main Memory

Memory technology and optimizations ( 2.3) Main Memory Memory technology and optimizations ( 2.3) 47 Main Memory Performance of Main Memory: Latency: affects Cache Miss Penalty» Access Time: time between request and word arrival» Cycle Time: minimum time between

More information

Breaking the Memory Bottleneck in Computing Applications with Emerging Memory Technologies: a Design and Technology Perspective

Breaking the Memory Bottleneck in Computing Applications with Emerging Memory Technologies: a Design and Technology Perspective Breaking the Memory Bottleneck in Computing Applications with Emerging Memory Technologies: a Design and Technology Perspective M. HARRAND CEA-LIST, LABORATOIRE INFRASTRUCTURE ET ATELIER LOGICIEL SUR PUCE,

More information

16:30 18:00, June 20 (Monday), 2011 # (even student IDs) # (odd student IDs) Scope

16:30 18:00, June 20 (Monday), 2011 # (even student IDs) # (odd student IDs) Scope Final Exam 16:30 18:00, June 20 (Monday), 2011 #440102 (even student IDs) #440112 (odd student IDs) Scope Chap. 1 5 (except 3.7, 5.7) Chap. 6.1, 6.3, 6.4 Chap. 7.1 7.6 Closed-book exam 1 Storage Jin-Soo

More information

Middleware and Flash Translation Layer Co-Design for the Performance Boost of Solid-State Drives

Middleware and Flash Translation Layer Co-Design for the Performance Boost of Solid-State Drives Middleware and Flash Translation Layer Co-Design for the Performance Boost of Solid-State Drives Chao Sun 1, Asuka Arakawa 1, Ayumi Soga 1, Chihiro Matsui 1 and Ken Takeuchi 1 1 Chuo University Santa Clara,

More information

2.5 SATA III MLC SSD

2.5 SATA III MLC SSD 2.5 SATA III MLC SSD HERMES-F Series Product Specification APRO RUGGED METAL 2.5 SATA III MLC SSD Version 01V1 Document No. 100-xR2SF-JFTM April 2015 APRO CO., LTD. Phone: +88628226-1539 Fax: +88628226-1389

More information

Gigascale Integration Design Challenges & Opportunities. Shekhar Borkar Circuit Research, Intel Labs October 24, 2004

Gigascale Integration Design Challenges & Opportunities. Shekhar Borkar Circuit Research, Intel Labs October 24, 2004 Gigascale Integration Design Challenges & Opportunities Shekhar Borkar Circuit Research, Intel Labs October 24, 2004 Outline CMOS technology challenges Technology, circuit and μarchitecture solutions Integration

More information

CMOS Logic Circuit Design Link( リンク ): センター教官講義ノートの下 CMOS 論理回路設計

CMOS Logic Circuit Design   Link( リンク ): センター教官講義ノートの下 CMOS 論理回路設計 CMOS Logic Circuit Design http://www.rcns.hiroshima-u.ac.jp Link( リンク ): センター教官講義ノートの下 CMOS 論理回路設計 Memory Circuits (Part 1) Overview of Memory Types Memory with Address-Based Access Principle of Data Access

More information

SLC vs. MLC: An Analysis of Flash Memory

SLC vs. MLC: An Analysis of Flash Memory SLC vs. MLC: An Analysis of Flash Memory Examining the Quality of Memory: Understanding the Differences between Flash Grades Table of Contents Abstract... 3 Introduction... 4 Flash Memory Explained...

More information

VM Futures Panel: Are We Near the Beginning of a New Solid State Epoch, or Is That Just a Big Firebal in the Sky?

VM Futures Panel: Are We Near the Beginning of a New Solid State Epoch, or Is That Just a Big Firebal in the Sky? VM Futures Panel: Are We Near the Beginning of a New Solid State Epoch, or Is That Just a Big Fireball in the Sky? Moderator: Tom Coughlin, Coughlin Associates Panelists: Dave Eggleston, Intuitive Cognition

More information

Adding CEA-LETI Non Volatile Memories for new design exploration

Adding CEA-LETI Non Volatile Memories for new design exploration Adding CEA-LETI Non Volatile Memories for new design exploration Etienne NOWAK CEA-Leti Head of the Advanced Memory Device Laboratory etienne.nowak@cea.fr NON VOLATILE MEMORY (NVM) MARKET TRENDS Low/No

More information