XILINX ISE AND SPARTAN 3AN TUTORIAL
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1 XILINX ISE AND SPARTAN 3AN TUTORIAL SYNTETIZE AND SIMULATION This tutorial will show you how to create a simple Xilinx ISE project based on the Spartan-3 Board. It will be implemented a simple decoder circuit that uses the switches on the board as inputs and the eight LEDs as outputs. There are several parts in this tutorial. Part 1 shows the basics of creating a simulating a project in Xilinx ISE. Part 2 shows how to generate the bit file that will be used to program the SPARTAN 3AN/3A BOARD FPGA internal memory. Part 3 shows how to program the board. Select File à New Project
2 Select a project location and name. For this tutorial we will name the project decoder. Click Next and select the Spartan 3AN Starter Kit (or the Spartan 3A Kit)in the Evaluation Development Board category (check Preferred Language field: must be VHDL). Click Next and Finish. Right-click and select New Source.
3 Select VHDL Module and assign decoder name. You can now specify the inputs and outputs for the decoder. These will be inserted into an automatically generated template of the VHDL file. We have one 3-bit input ( sel ) and one 8- bit output ( y ):
4 Click Next. A summary window will be shown. Click Finish and decoder.vhd will be shown in the top-left sources and on the window editor. You are required to describe the behavior of the decoder using statements in the architecture body. In this example we will use conditional signal assignment statements; insert the code between begin and end.
5 Select again New Source Select VHDL Test Bench and assign the name decoder_tb. Selecting Next the Associate Source panel will be shown. Click Next and Finish. The decoder_tb.vhd is shown in the editor panel.
6 Look at the file produced. Insert the instructions after the comment -- insert stimulus here.
7 Modify also the clk sections of code as shown or remove all the clk sections and change the wait for clk_period*5; to wait for 50 ns.
8 Check that Implementation is selected in the Project Manager View panel that and double-click Syntetize-XST. Select Simulate in the Project Manager View. Some errors will be shown in the console. Correct them (add semicolon after sel statement) and save the project. The errors should disappear.
9 Select decoder_tb in the hierarchy window and expand ISim Simulator
10 Double-click Simulate Behavioral Model. Simulation window will show the result of simulation. PROJECT IMPLEMENTATION Again select New Source
11 select Implementation Constraint Files (you will have to check the Spartan 3AN specifications to find out UCF constraints for slide switches and leds) and assign the name decoder_ucf to the file, click next A summary window shows up, click finish.
12 Now we have to map our signals to the board input/output. From the board user guide HIGH, 1 SW3 (T9) SW2 (U8) Figure 2-1: SW1 (U10) SW0 (V8) Four Slide Switches LOW, 0 UG330_c2_01_ we get the map of the UCF constraint file for the Slide Switches and leds. NET "SW<0>" LOC = "V8" IOSTANDARD = LVCMOS33 ; NET "SW<1>" LOC = "U10" IOSTANDARD = LVCMOS33 ; NET "SW<2>" LOC = "U8" IOSTANDARD = LVCMOS33 ; NET "SW<3>" LOC = "T9" IOSTANDARD = LVCMOS33 ; Figure 2-2: UCF Constraints for Slide Switches LED7: (W21) LED6: (Y22) LED5: (V20) LED4: (V19) LED3: (U19) LED2: (U20) LED1: (T19) LED0: (R20) Figure 2-12: Eight Discrete LEDs UG334_c2_12_052407
13 NET "LED<7>" LOC = "W21" IOSTANDARD = LVCMOS33 SLEW = SLOW DRIVE = 8 ; NET "LED<6>" LOC = "Y22" IOSTANDARD = LVCMOS33 SLEW = SLOW DRIVE = 8 ; NET "LED<5>" LOC = "V20" IOSTANDARD = LVCMOS33 SLEW = SLOW DRIVE = 8 ; NET "LED<4>" LOC = "V19" IOSTANDARD = LVCMOS33 SLEW = SLOW DRIVE = 8 ; NET "LED<3>" LOC = "U19" IOSTANDARD = LVCMOS33 SLEW = SLOW DRIVE = 8 ; NET "LED<2>" LOC = "U20" IOSTANDARD = LVCMOS33 SLEW = SLOW DRIVE = 8 ; NET "LED<1>" LOC = "T19" IOSTANDARD = LVCMOS33 SLEW = SLOW DRIVE = 8 ; NET "LED<0>" LOC = "R20" IOSTANDARD = LVCMOS33 SLEW = SLOW DRIVE = 8 ; Figure 2-13: UCF Constraints for Eight Discrete LEDs Add our constraint file assigning the nets of our project Now we re ready to implement our project. Double-click generate programming file
14 PROGRAM THE DEVICE Double-click Configure Target Device A warning window appear. Click OK
15 The Impact window shows up. Double-click Boundary Scan to detect connected devices and then initialize the chain.
16 Two components are detected. The FPGA and The EEPROM. Click Yes to assign the files. The FPGA is firstly selected together with a browser. Select the decoder.bit file and click Open.
17 Click No in the next window and then Bypass (note that the decoder.bit file has been assigned to the FPGA) A summary window appear. Click OK. Finally we have to download the.bit file in the FPGA. Right-click the FPGA and select Program
18 A confirm window shows-up. Congratulation, you ve programmed your first FPGA.
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