Setting up the IBM 65nm libraries in Cadence 6.1
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1 Setting up the IBM 65nm libraries in Cadence 6.1 Preeti Mulage v1 (Jan, 2010)
2 1. Setting up Cadence 6.1 and Spectre MMSIM 7.1 a. You need to incorporate these lines in order to bring up the latest 6.1 version of Cadence. source /w/apps2/apps.29/cadence/ic614/setup b. Make sure that you are now obtaining all the libraries like analoglib, basic, cdsdeftechlib, etc from the new cadence database by including the following line in your cds.lib. INCLUDE /w/apps2/apps.29/cadence/ic614/linux/share/cdssetup/cds.lib c. In order to use the new version of Spectre, copy the following file into your workspace and source it /w/ee.00/yang/pmulage/setup.linux (obtained from Tamer Ali) 2. Hooking up the IBM 65nm libraries to Cadence a. Create a directory where you want to copy the setup files and invoke cadence from (referred to as ibm_65 in this document) b. Copy all the files from the following directory /w/library/ibm_tapo/65nm/cadence_setup into the ibm_65 directory created in Step a. Make sure you copy the hidden files in this folder too. You could also just modify your already existing cds.lib by adding the lines from the cds.lib in this directory to it. c. Launch cadence from this directory : virtuoso & ( not icfb anymore) d. A new tab named IBM_PDK should now be seen with the other menu options e. To create a new library, you can do CIW -> IBM_PDK -> Library -> Create
3 f. The window shown below pops up. Enter a library name in the name field and click on the Attach to an existing techfile button and click Ok g. Select cmos10sf as the Technology Library and click Ok h. Select the number of levels of metal as 6_02_00_00_LB and click ok. The library attached to the IBM 65nm library is now seen in the Library Manager window. 3. Running simulations in Spectre using IBM 65nm libraries a. Once you open the analog environment, if your environment is set correctly, the model files to be used for simulations should appear automatically in the Model Library Setup as shown below. With these files, the IBM 65nm models will be used. Note: There could be a chance that when you are running simulations, spectre is unable to netlist your design. In that case you should set the following variables as shown. setenv CDS_Netlisting_Mode Analog setenv CDS_LOAD_ENV CWDElseHome 4. Importing a.gds2 file into Cadence Virtuoso You can use the mapping file at the following path for the stream In. /w/library/ibm_tapo/65nm/pdk_install/ibm_pdk/cmos10sf/relibm/cdslib51/cmos10sf/cds2gds.map 5. Running DRC and LVS using Calibre a. Create a file (referred to as Calibre_setup here), and enter the following lines into it
4 setenv MGC_HOME /usr/apps/mentor/calibre2008.linux set path= ( $MGC_HOME/bin $MGC_HOME/shared/pdfdocs/ $path) setenv PATH ${PATH}:/usr/apps/cadence/SOC62.linux/tools/bin setenv LM_LICENSE_FILE 1784@lmserv.ee.ucla.edu:5281@lmserv.ee.ucla.edu:1717@lmserv.ee.ucla.edu Else, you could copy the file from /w/ee.00/yang/pmulage/cadence_setup/calibre_setup b. Source this file, and then launch Cadence. c. Once you open any layout in Virtuoso, there should be a new tab called IBM_PDK on the top along with the other menu options. To run a DRC, click on IBM_PDK -> Checking -> Calibre -> DRC d. In the small window that pops up, click on default runset. A new window pops up as shown below Make sure that the BEOL_STACK has 6_02_00_00_LB selected and the TECHDIR field has the path /w/library/ibm_tapo/65nm/pdk_install/ibm_pdk/cmos10sf/v ibm/calibre/
5 and click on Ok e. The Calibre Interactive nmdrc window pops up. Run DRC Check in the routine fashion. f. While running LVS, setting the STRESS field on the menu in the previous page to false works for me. 6. Corner Simulations a. In order to change corners in IBM65, values of the parameter fixed_cor_sw need to be changed in the design.scs model file according to the table below. Re-open icfb once this is done for the effect to show up. This is obtained from Page 201 of the CMOS10SF design manual from IBM.
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