10/1/2016. Everything So Far Has Been Combinational Logic. ECE 120: Introduction to Computing. Now Let s Look at Sequential Logic

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1 //26 University of Illinois at Urbana-Champaign ept. of Electrical and Computer Engineering ECE 2: Introduction to Computing toring a Bit: the Gated Latch Everything o Far Has Been Combinational Logic o far, we have talked only about combinational logic. Combinational logic allows us to solve the following type of problem: given a set of bits as input, how can we combine them to produce other sets of bits (Boolean expressions)? But where do the bits come from? ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 2 Now Let s Look at equential Logic A ual Inverter Loop erves a pecific urpose Today, we will start to look at sequential logic. equential logic stores bits as state, and its behavior depends on the state (the values of the stored bits), just like a C program can depend on the current values of variables. What is a -input NAN gate? An inverter / NOT. emember the gate structures? What does the circuit here do? It has no inputs! How can we analyze it? ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 3 ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 4

2 //26 tart olving by icking a Value for ome Variable Trace Logic Values to Find table tates First, write a truth table. Then pick a value. ay =. Which implies what about? =. Which implies what about? = (be sure to check!). We say that this state ( =, and =, as shown in the truth table) is stable because the values do not continue to change forever. What if we instead pick =? In that case, what is? And what does = imply for? Again, be sure to check stability. ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 5 ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 6 The ual-inverter Loop tores One Bit Use an Extra Input to et the Bit We say that this circuit is bistable because it has two stable states (bi- = two). Bits on a chip are typically stored using this kind of dual-inverter loop. But how do we set a value? Let s add an input. We will call it. What happens when is? The new input has no effect! (green is the previous truth table) What if =? =! And =. o ets the bit to. ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 7 ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 8

3 //26 Active Low Inputs are Named with Bar (NOT) What About esetting to? Why did we call the input? (Call it bar, by the way.) The action induced by, to (et) the bit, occurs when = ( is low). We say that the input is active low. And we name it instead of to indicate how the input should be used. o we can set =. But what if we want =? Keep flipping the power on and off until we get lucky? (Maybe not.) Any ideas? ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 9 ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide Use an Extra Input to eset the Bit An - Latch Consists of Two NAN Gates Another input? ure. We will call it. What happens when is? The new input has no effect! (green is the previous table) What if = and =? =! And =. o esets the bit to. This circuit has a name! It s an - latch ( bar, bar latch ). tore a bit by lowering to. tore a bit by lowering to. ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 2

4 //26 Avoid etting Both and to imultaneously What if we set both and to at the same time? = and =. But when we raise the inputs, we may leave the stored bit in either state. Or, worse, the loop may not settle into digital voltages (metastable). o NOT lower both at once! Extra Gates revent the Forbidden Input Combination We can add a couple more NAN gates to prevent setting both and to. Let s check the truth table. o stores ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 3 ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 4 We Can implify the esign to Copy to Extra Inputs Control Copying of to There s an easier way to implement such a circuit, though o stores WE Let s add more inputs to the new gates, too. Now our design only copies to when WE =. WE ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 5 ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 6

5 //26 The Circuit Can Also tore a Bit What happens when WE =? The circuit stores the last bit from (same truth table as before!). This circuit is called a gated latch. WE x x This esign is Called a Gated Latch WE ymbolically, a gated latch is drawn as shown here. Notice that has been replaced by, since they are always complements of one another. ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 7 ECE 2: Introduction to Computing 26 teven. Lumetta. All rights reserved. slide 8