An Efficient Code Update Scheme for DSP Applications in Mobile Embedded Systems

Transcription

1 An Effiient Code Updte Sheme for DSP Applitions in Moile Emedded Systems Weiji Li, Youto Zhng Computer Siene Deprtment,University of Pittsurgh,Pittsurgh, PA 526 Astrt DSP proessors usully provide dedited ddress genertion units (AGUs) to ssist ddress omputtion. By refully lloting vriles in the memory, DSP ompilers tke dvntge of AGUs nd generte effiient ode with ompt size nd improved performne. However, DSP pplitions running on moile emedded systems often need to e updted fter their initil releses. Studies showed tht smll hnges t the soure ode level my signifintly hnge the vrile lyout in the memory nd thus the inry ode, whih uses lrge energy overheds to moile emedded systems tht pth through wireless or stellite ommunition, nd often peuniry urden to the users. In this pper, we propose n updte-onsious ode updte sheme to effetively redue pth size. It first performs inrementl offset ssignment sed on reent vrile olesing heuristi, nd then summrizes the ode differene using two types of updte primitives. Our experimentl results showed tht using updteonsious ode updte n gretly improve ode similrity nd thus redue the updte sript sizes. Ctegories nd Sujet Desriptors D.3.4 [Proessors]: Code genertion, Compilers, Inrementl ompilers, Interpreters, Optimiztion; K.6,3 [Softwre Mngement]: Softwre mintenne Generl Terms Algorithms, Design, Experimenttion Keywords Inrementl olesing simple offset ssignment (IC- SOA), Inrementl olesing generl offset ssignment (ICGOA), ontext-wre sript, ontext-unwre sript. Introdution Moile emedded systems suh s PDAs nd ell phones widely integrte DSP proessors to support multimedi pplitions tht proess udio, video nd ommunition signls. DSP proessors strive to hieve low-ost, low-power, nd low-lteny proessing of digitl signls y integrting speilly designed nd optimized rhiteturl omponents. For exmple, dedited ddress genertion unit (AGU) n perform prllel ddress omputtion in register-indiret-utomti ddressing mode. With registerindiret-utomti ddressing, the memory ddress is stored in n ddress register (AR) whose vlue n e utomtilly updted Permission to mke digitl or hrd opies of ll or prt of this work for personl or lssroom use is grnted without fee provided tht opies re not mde or distriuted for profit or ommeril dvntge nd tht opies er this notie nd the full ittion on the first pge. To opy otherwise, to repulish, to post on servers or to redistriute to lists, requires prior speifi permission nd/or fee. LCTES, April 3 5, 2, Stokholm, Sweden. Copyright 2 ACM //4... $. within smll rnge efore or fter the memory ess. The ess inurs no extr ost. As omprison, the se-register-plus-offset ddressing requires two instrution words on 6-it DSP proessors e.g. AT&T DSP6xx [2]. By refully lloting vriles in the memory, DSP ompilers n generte effiient ode with ompt size nd improved performne. The prolem of ssigning vriles in memory ws formulted y Brtley [2] nd Lio et l. [3] s simple offset ssignment (SOA) when there is only one AR, nd generl offset ssignment (GOA) when there re multiple ARs. Mny heuristi lgorithms hve een proposed in the literture to redue the ode size nd improve the performne [4, 24,, 22, 3, 9, 5, 26, 6, 2]. To keep low exeution overhed nd etter performne, mny DSP pplitions re optimized nd then relesed in inry formt. DSP pplitions running on moile emedded systems often need to e updted fter their initil releses. Bug fixes re the most ommon need due to the inresing omplexity of modern emedded pplitions. Another need is to upgrde the urrent pplition with new fetures. For exmple, the mp servie on iphone urrently hs no voie instrutions [7], very useful funtionlity tht might e dded in the future. Although it is possile to pth or upgrde the ode y diretly onneting the moile system to server e.g. using USB le, there re situtions where using wireless or even more expensive stellite ommunition is the only hoie. For exmple, people my e trveling or working in wild field, nd thus do not hve wired ess to the server or the Internet. Updting ode through wireless ommunition tends to inur oth energy overhed nd peuniry urden. For exmple, it onsumes times more energy to ommunite one it thn to exeute one instrution under ertin settings [8]. As nother exmple, mny wireless dt plns hrge per KByte fee if the trffi is eyond the monthly quot. Sine moile emedded systems n e rehrged when users return to the home, the energy effiieny gol fouses more on reduing the mount of trnsmitted dt, even t the ost of exeuting slightly more instrutions. It is hllenging to hieve ost-effiient DSP ode updte through wireless ommunition. Although trnsmitting diffsed updte sript insted of the omplete new inry is n effetive pproh to redue the overll ommunition overhed [23,, 5], studies showed tht using existing updte olivious ompilers, smll hnge t the soure ode level my result in signifint inry hnges [8]. Severl shemes hve een proposed to hieve energy effiieny in updting sensor ode fter deployment [23, 8]. However, they re not diretly pplile to updting DSP ode. A ig differene etween wireless sensors nd moile systems is tht it is lmost impossile to rehrge sensor ttery while periodilly rehrging moile systems is very ommon. Preserving energy is muh more ritil in wireless sensor networks, e.g. running low qulity ode my drw more energy in 5

2 the long run. For the ompiltion sheme to minimize updte sript size in [8], Li et l. proposed n updte-onsious ompiltion pproh to redue updte sript size on systems tht perform seregister-plus-offset ddressing. This pproh tries to improve the register llotion similrity when generting the new version, so tht the updte sript is smll. Unfortuntely, for the emedded systems tht intensively ess memory through register-indiret ddressing nd use post-/pre- inrementl utomti AR updte, oth the register llotion hnges nd the dt llotion hnges n use instrution updtes. Thus, this sheme is not pplile to the DSP pplitions. In this pper, we propose n updte-onsious offset ssignment pproh for minimizing diff-sed sript sizes in updting DSP pplitions through wireless or stellite ommunition. In prtiulr, we oserved tht generting etter offset ssignment plys n importnt role in determining the ode size nd performne of DSP pplitions. In se study of different versions of rel DSPstone progrm, we found tht the offset ssignment might e signifintly different fter smll hnges t the soure ode level. We developed n inrementl vrile olesing heuristi to improve ode similrity efore nd fter the updte, nd then designed two types of sripts to summrize the ode differene using ontext-unwre nd ontext-wre primitives respetively. We implemented nd evluted the proposed inrementl offset ssignment sheme. In the experiments, we oserved tht inrementl ssignment with ontext-wre updte primitives gretly redues the updte sript size for medium sized hnges. The reminder of the pper is orgnized s follows. Setion 2 disusses the kground. The updte-onsious offset ssignment sheme nd updte sript genertion re elorted in Setion 3 nd 4 respetively. We extend the sheme to GOA in Setion 5. The experiments re disussed nd nlyzed in Setion 6. Setion 7 disusses the relted work nd Setion 8 onludes the pper. 2. Bkground 2. Auto ddressing on DSP proessors The ddress genertion unit (AGU) on DSP proessors ssists the ddress omputtion in prllel. For the most frequently used uto ddressing instrutions i.e. post- nd pre- ddress inrement/derement instrutions, no expliit ddressing instrution is needed when the ddress distne of two onseutive memory esses is smller thn two; otherwise n extr instrution is needed to updte the ddress register (s shown in Figure ). Extr ddressing instrutions inrese ode size nd slow down the exeution. Sine lloting vriles to different lotions in memory ffets the ddress distne of djent esses, different offset ssignment heuristis hve een proposed to minimize the numer of extr ddressing instrutions e.g.[3, 2, 4, 24,, 22, 3, 9, 5, 26, 6, 2]. The prolem of ssigning vriles in memory ws formulted s simple offset ssignment (SOA) when there is only one AR, nd generl offset ssignment (GOA) when there re multiple ARs. Offset distne st memory ess 2nd memory ess no no post no no pre 2 post pre > 2 ddr. updte instr. no > 2 no ddr. updte instr. Figure. ing modes etween two djent memory instrutions. 2.2 Offset ssignment with vrile olesing In this pper we propose our sheme sed on reently proposed effetive offset ssignment heuristi using vrile olesing [26, 2]. The olesing simple offset ssignment (CSOA) sheme [2] uilds up two uxiliry grphs: (i) n ess grph in whih eh vertex denotes vrile, nd the edge weight denotes the frequeny of djent esses of the two orresponding vriles; (ii) n interferene grph in whih eh vertex indites vrile, nd n edge etween two verties indites the live rnges of these two vriles overlp nd these nnot e lloted into the sme memory lotion. The offset ssignment prolem is modeled s finding the mximum weight pth over on the ess grph [3]. Sine mny vriles hve short live rnges, they n e lloted to the sme lotion in memory. CSOA itertively hooses n edge in the ess grph nd dds it to the mximum weight pth, or oleses two verties tht do not interfere with eh other. The deision is mde sed on the ost/enefit equtions of eh hoie. 3. Updte-Consious Offset Assignment 3. A motivtionl exmple Figure 2 illustrtes the motivtion to design n updte-onsious SOA. It requires two nd six words respetively with nd without vrile olesing. The one with vrile olesing requires no extr ddressing instrutions s the redution of memory usge inreses the likeliness of two djent memory esses eing lose enough to void expliit ddressing instrutions. After smll updte of the ode, i.e. the third instrution is hnged (Figure 2(d)), reompiling the ode using CSOA genertes very different vrile olesing result (Figure 2(h)). The memory lyout differene further trnsltes to seleting different ddressing instrutions t eh memory ess (Figure 3). Out of seven updted instrutions, four of them re due to the dt llotion hnge, i.e. olumn 5 in Figure 3. As omprison, keeping these vriles in their originl positions requires two instrutions to e updted, i.e. olumn 7 in Figure 3. = + 65; = << 4; f = + ; e = f << 4; d = - e; e d f d e 2 f 2 () () () (d) = + 65; = << 4; f = + 32; e = f << 4; d = - e; e d f d e f 2 (e) (f) (g) (h) Figure 2. A motivtionl exmple: () the originl C ode segment; () the originl interferene grph; () the originl ess grph; (d) the offset ssignment result using CSOA [2]; (e) the C ode fter simple updte; (f) the new interferene grph; (g) the new ess grph; (h) the new ssignment using CSOA. d e f f d e 6 3 6

3 Old Code New Code updte Aess Grph Interferene Grph Aess Grph ` Interferene Grph ` CSOA Updted Colesed Aess Grph Colesed Aess Grph CSOA Memory Lyout Memory Lyout ` Binry Binry ` Updte Sript Old Binry Updte Sript New Binry () Server side updte onsious offset ssignment () Updte the ode on moile devie Figure 4. An overview of Inrementl Colesing Offset Assignment (ICSOA) -sed ode updte sheme. Aess Originl Updte-Olivious Updte-Consious sequene ode ode updte ode updte ++ diff** diff diff 4 * ++ diff diff diff f 7 f ++ diff** 8 e diff** diff** - - e d *: This ess only exists in the old version. **: The instrution tht needs to e updted, due to dt llotion hnges. ++: An instrution with post-inrement ddressing. - -: An instrution with post-derement ddressing. The old version memory lyout is slot :, d, e, f; slot :, The memory lyout for GCC result is slot :,,, f; slot : d, e. The memory lyout for UCC result is slot :, d, e, f; slot :,. Figure 3. Updte sript omprison etween two versions using CSOA. 3.2 Inrementl olesing simple offset ssignment (ICSOA) To minimize the updte sript, we propose to perform updteonsious ode updtes through inrementl olesing SOA (IC- SOA) (Figure 4). When DSP pplition undergoes smll updte, the hnge does not gretly ffet the inry ode. On the server side, ICSOA reds in the old ess grph nd its interferene grph, nd strives to generte new memory lyout tht minimizes the updte sript. On the moile system side, only the updte sript needs to e downloded. With simple interprettion, the moile system regenertes the new inry nd/or the new memory lyout. The pseudo ode of ICSOA is shown in Algorithm. It first uilds the ess grphs efore nd fter the ode updte, performs the CSOA lgorithm, retrieves the olesed vrile ssignment in CAG, updtes the new ess grph AG 2, resolves possile onflits when pplying the old lyout to the new ode, nd lls CSOA gin to find the new offset ssignment. Funtion updte ess grph(). It omines the ess grph result of the old version (CAG ) nd the newly generted ess grph (AG 2), into new ess grph (AG NEW). We uild AG NEW sed on CAG, y dding new vrile nodes nd removing un- Algorithm Inrementl Colesing-Bsed SOA (ICSOA) Input: AS,AS 2: ess sequenes efore nd fter updte; IG,IG 2: interferene grphs efore nd fter updte; Output: the offset ssignment. : AG Build ess grph using AS ; 2: AG 2 Build ess grph using AS 2; 3: CAG CSOA(AG,IG ); 4: AG NEW updte ess grph(cag,ag 2); 5: resolve onflits(ag NEW, IG 2); 6: CAG 2 CSOA(AG NEW, IG 2); 7: Return offset ssignment sed on CAG 2; used nodes, so tht AG NEW not only represents the updted ess sequene ut lso keeps ll the olesing offset ssignment result from the old version. Using AG NEW insted of AG 2 s the offset ssignment input helps to improve the offset ssignment similrity with the previous version, nd redues the pth trnsmission overhed. However, when the ode hnge is reltively ig, the energy sved y improving ode similrity my e offset y the ode qulity loss. For this reson, when omining the grphs, updte ess grph() evlutes the numer of esses of eh old vrile in the new ode, nd extrts it from its olesed group if the vrile hs more new or updted esses thn the unhnged ones. The intuition is to extrt the vriles from their old olesing groups only if it n ring expliit enefits. A new node is introdued for eh extrted vrile. Empty group nodes will e removed from AG NEW. At the end, the funtion djusts the weights of impted ess edges ordingly to finish the updte. Funtion resolve onflits(). Due to ode updte, two vriles tht re olesed in the old ssignment my interfere with eh other. We identify this s onflit nd ll resolve onflits() to resolve it. The funtion first orders the vriles in eh olesing group, y the ftor Num lol itfs. Num lol s Here, Num lol itfs represents the numer of interferenes etween the vrile nd the other group memers, nd Num lol s represents the numer of djent esses with other group memers. The funtion then extrts the interfering vriles with higher ftor one y one until ll the interferenes in the group re resolved. By doing so, the vriles tht rete more interferenes ut hve less djent esses with others re extrted first from the olesing group. 7

4 For eh vrile hosen to e extrted from the olesing group, the funtion splits the live rnge (i.e. onflit rnge) into to two surnges, the originl prt nd the newly extended prt. We use the old vrile nme to represent the originl surnge, nd introdue pth vrile for the extended surnge. To ensure semnti orretness, we insert = or = to move the vlue etween the surnges. The insertion involves memory opy nd tends to inur lrge overhed. We will evlute its impt in the experiments. For the exmple in Figure 2, ICSOA omines the olesed offset ssignment (Figure 2(d)) nd the new ess grph (Figure 2(f)). Figure 5() shows the updted ess grph. As there is no onflit etween the ess grph nd interferene grph, ICSOA outputs the sme olesed ssignment (Figure 5()). In this exmple, the sript generted from ICSOA is 7% smller thn tht of reompiltion using CSOA. d e f 4 e d f d e f 4 ontext-unwre ontext-wre Primitive Formt nd Opertion Size (ytes) insert x xxxx dt... dt + numer numer of ytes to e inserted reple x xxxx dt... dt + numer opy x xxxx numer of ytes to e opied remove x xxxx insert _ess opy _slot insert _slot shift _slot numer of ytes to e repled numer of ytes to e removed x xxxx dt... dt +numer numer of ytes to e inserted x xxxx numer of dt slots to e opied x xxxx vrile... vrile +numer numer of dt slots to e inserted x xxxx strt_slot offset 3 numer of onseutive unhnged slots Figure 6. Code updte primitives. () () Figure 5. An exmple of ICSOA sheme: () AG NEW, the updted ess grph; () IG 2, the new interferene grph; () the finl offset ssignment. 4. Code Updte Sript After generting the new inry, our sheme summrizes its differene from the old inry in n updte sript tht onsists of sequene of updting primitives speifying how to generte the new ode on moile devies (Figure 6). The primitives n e tegorized to ontext-unwre or ontext-wre primitives, ording to whether it will pss the updted memory lyout to the remote devies. 4. Context-unwre sript The updte sript is generted y ompring the new nd old inries t the instrution level. To simplify the omprison, we link the unmodified ode loks in the old nd new ode, nd then use the ontext-unwre primitives to speify how to updte the hnged ode loks. 4.. Simple ontext-unwre primitives There re four simple primitives: insert, reple, opy nd remove. Both insert nd reple primitives hve one-yte opode nd n- yte dt or instrutions to e inserted/repled to the new ode. The opy nd remove primitives tke one yte eh nd speify the size of dt/instrutions tht need to e opied or removed. To regenerte the new inry, the sript interpreter on remote devies mintins two instrution pointers one points to the old ode nd the other points to the lst instrution tht hs een generted in the new ode. The insert primitive inserts the instrutions in its dt prt into the new ode, nd moves the pointer in the new ode to the end. The reple primitive does the sme thing to the new ode ut lso moves the pointer in the old ode for the sme distne. The opy primitive reds the instrutions from the old ode, nd moves oth pointers. () 4..2 Advned ontext-unwre primitives When inserting new memory ess etween two existing esses, we my need two updte primitives nd one insert primitive, s shown in Figure 7(d). Sine the updte primitives only modify the ddressing modes, ompt wy to express them is to inlude the memory ddress differene in the sript nd let the moile devies generte the orret ddressing modes for the relted instrutions. Thus we introdue n dvned ontext-unwre primitive insert ess. The insert ess primitive is similr to the insert primitive, exept tht its dt field is speified s follows: [opertion, δ diff] where δ diff represents the ddress differene etween the lotions essed y the urrent instrution nd the preeding instrution respetively. In the exmple (Figure 7()), the new ess is (loted in memory slot ), nd the preeding memory ess is (loted in memory slot ), so δ diff is -. Sine it is the dd opertion tht esses in the new instrution, the updte primitive is insert ess [ADD, ]. Rewriting the updte sript of the exmple, using the insert ess primitive, the sript size is redued y 5% (Figure 7(e)). To mintin the orret progrm semntis, the interpreter hs to know the memory lotions essed efore nd fter the inserted instrution, nd generte the orret ddressing modes for these instrutions. It is hieved y temporrily uffering eh ffeted instrution, nd updting its ddressing mode when the memory lotion to e essed in the next instrution is known. 4.2 Context-wre sript In our experiments, we oserved tht inry hnges t severl ples my e used y one memory lyout hnge. For exmple, ssuming vrile ppers in severl ples in the ode nd is reloted to new memory lotion, we my generte sript with multiple updte primitives eh of whih summrizes n instrution level hnge. Insted, if the sript interpreter on moile devies n 8

5 Old Colesed Vrile List Memory x2 x2 Old Binry: AR= x Instrution x4 x Sript:... opy_slot ; insert_vr x; opy_slot ;... Old Binry: AR= x New Colesed Vrile List Memory x2 x Instrution x4 x New Binry: AR= x x: LOAD R, *(+AR); x2: ADD R,; x4: STORE *(AR); x6: CMP R, ; x8: BNE x9; AR= x2 x: LOAD R, *(AR); x: LOAD R, *(+AR);... x2: ADD R,; x4: STORE instrution *(AR); ddress x x6: CMP from R, the ; old olesed vrile list, x8: BNE memory x9; ddress x2 from the new olesed vrile list, get updted to new ddress x AR=x AR= x2 AR= x2 no need for pre-inrement ddress... Figure 8. Context-wre ode retrievl (The left shows the server side, nd the right shows the moile devie side updtes). x x2 x4 = ; () ldr r, &; () lod *(r+); (2) store *(r); = + ; () ldr r, &; () lod *(r-); (5) dd *(r+); (2) store *(+r); () Memory lyout () Old Version () New Version Sript: opy ; updte [...]; insert [...]; updte [...]; Size: ytes (d) Sript w/ simple primitives Sript: opy 2; insert_ess [ADD,-]; opy ; Size: 5ytes (e) Sript w/ "insert_ess" Figure 7. An exmple showing the use of insert ess primitive: () dt llotion for oth versions; () the originl ode; () the modified ode; (d) updte sript using simple primitives; (e) updte sript using dvned primitives. deode DSP instrutions, nd identify ll its uses, then it is possile to send one relote primitive insted of individul instrution updte. We ll the inry instrutions tht re inserted, removed, or hnged due to the offset ssignment hnges s ing Mode Chnge (AMC) instrutions. The motivtion of developing ontextwre primitives is to redue the trnsmission of AMC instrutions, nd let the moile devies onstrut them y themselves. Compred to the insert ess primitive, ontext-wre primitives re designed to updte the ode in more thn one ple Context-wre primitives In order to updte the AMC instrutions utomtilly, the offset ssignment hnges (rther thn ffeted instrutions) need to e trnsmitted. Figure 6 lists the ontext-wre updte primitives tht we use to speify the memory lyout hnge. We only onsider the llotion of slr vriles in this pper. Eh memory lotion ontins one vrile or multiple olesed vriles ([2, 26]). opy slot. This primitive opies multiple memory slots from the old offset ssignment to the new ssignment. There re two pointers pointing to the new nd old ssignments respetively. They re updted to the next slot with this primitive. insert vr. This primitive dds list of vriles to the urrent memory slot in the old ssignment. The relted slot with the dded vriles is then opied to the new ssignment. The insertion n e used y dding new vrile, or y moving n existing vrile from nother lotion. The ltter impliitly hs the vrile removed from the old lotion, whih is omitted to keep the sript ompt. shift slot. This primitive represents the se tht multiple slots my e grouped nd shifted from the old ssignment to the new ssignment. The shift slot primitive speifies the numer of slots tht need to e shifted, the strting point of the shift, nd the shift offset Context-wre ode retrievl After reeiving the updte sript, eh sensor interprets the ontextwre primitives to generte the new memory lyout, nd then interprets the ontext-unwre primitives to onstrut si loks y inserting, removing, or updting ertin instrutions on top of the old inry version. The interpreter fixes the ddressing mode of eh instrution in si lok ording to the new memory lyout, nd then writes the ompleted lok into the flsh. However, it my require dditionl informtion to fix the ddressing modes on the moile devie side. As shown in Figure 8, CSOA oleses multiple vriles othnde, in one memory lotionx2, ode updte my re-lloteetox while keeping in the sme memory slot. This omplites the ode updte s some esses to x should e updted while others should not. Figure 8 illustrtes our solution to this prolem. We use n impliit pointer to trk the urrent memory slot when opying from the old lyout to the new lyout. insert vrx insertse into the urrent slot, i.e. x. Here vrile e is represented using its instrution ddress x. A reord n e found in the olesed vrile list inditing this mpping, nd will e updted to reflet to the re-llotion. To updte the ddressing mode in the new ode, query is sent to the olesed vrile list, from whih we know this instrution esses x insted of x2. Sine AR ontins x when entering the si lok, there is no need for pre-inrement. Similr deisions re mde for other instrutions in the si lok nd ensure the exiting AR ontinsx2. From this disussion, the ontext-wre interpreter needs the following informtion to fix the ddressing modes: 9

6 A olesed vrile list to distinguish eh of olesed vriles; nd The AR vlues when entering nd exiting eh si lok Auxiliry dt strutures To orretly updte the ode with memory lyout hnge, e.g. is ssigned to different memory lotion, we need to lote ll of s uses nd ensure the AR ontins the orret ddress when essing. Coneptully, this n e done y relotion tle. Unfortuntely trditionl relotion tle [] identifies ll the ples tht the inry ode esses the memory. Sine DSP ode relies hevily on offset ssignment nd esses the memory frequently, dopting trditionl relotion tle would generte tle liner to the size of the inry ode. Insted, in this pper we introdue the following two lightweight uxiliry dt strutures to enle relotle DSP ode. Colesed vrile list. The olesed vrile list is designed to differentite the olesed vriles in one memory lotion. If memory lotion ontins only one vrile, then we do not llote ny entry in the list. If multiple vriles re olesed nd stored in the sme memory lotion, we llote the entries s follows. Memory x2 x2 Instrution x4 x Figure 9. Colesed vrile list. Sine the olesed vriles hve their esses spred in the ode, we group onseutive definitions/uses tht ess the sme vrile nd llote one entry to eh group. This is done sed on the ode text without onsidering the ontrol flow, or the vrile live rnge et. For exmple, if the live rnges of two olesed vriles overlp due to liner lyout of ontrol strutures suh s rnhes, then we llote one entry for eh segment. As shown in Figure 9, eh entry ontins two fields: the memory slot ddress, nd the strting instrution ddress of eh ode text segment. For exmple, vrile nd e shre the sme memory lotion x2. The live rnges of nd e re [x,x4] nd [x,x] respetively. Figure 9 illustrtes its olesed vrile list. Given memory ess to x2, we n esily differentite whether it is essingore. The originl olesed vrile list is preloded on the moile devies efore deployment. The updtes to the olesed vrile list is trnsmitted with the ode updte sript. The olesed vrile list updte primitives will e disussed lter. AR in/out vlue list. As we disussed efore, we need the AR in nd out vlues for eh si lok in order to generte the orret ddressing modes on the moile devie side. We hoose to onstrut the list rther thn uilding the ontrol flow grph on demnd to redue the memory nd omplexity overheds. This tle ontins the strting, ending ddresses, the ddress register s entering, exiting vlues nd the suessive si lok(s) of eh si lok, s shown in Figure. Index Strting Ending AR In AR Out Suessive Bsi Bloks x x8 x x2 2 Figure. The AR in/out vlue list. The originl list is preloded on the moile devies efore deployment. The ontext-wre interpreter utomtilly genertes the new list while generting the new inry ode. The AR out vlue of si lok my ffet the ddressing mode of its suessive si loks. The sitution eomes more omplited if there re multiple predeessors (or suessors). Synhroniztion needs to e done mong these predeessors (or suessors), whih my sdingly ffet other instrutions in those si loks. To simplify the ode updte on moile devie side, the server expliitly sends out the AMC instrutions tht follow n inserted/updted/removed instrution, nd those tht re the lst instrution of si lok. 5. Generl Offset Assignment In this setion, we disuss our updte-onsious offset ssignment sheme in the presene of multiple ddress registers. 5. Colesing generl offset ssignment (CGOA) To ompile DSP pplition using k ddress registers, the CGOA sheme [2] first prtitions ll vriles into k different sets. Vriles in the sme set use the sme ddress register throughout the ode. After prtitioning the vriles, the ess grph nd interferene grph n e prtitioned ordingly. The CSOA sheme is then pplied to eh ess grph to generte the offset ssignment for tht ddress register. The overll offset ssignment is the omintion of individul ssignments. A rief disussion of vrile prtition is s follows. For eh vrile, CGOA omputes glol interferene numer tht is the numer of interferenes etween this vrile nd ll other vriles. CGOA sorts the vriles in deresing order of their glol interferene numers, nd proesses the vriles itertively. To deide whih set vrile should e inserted, CGOA lso omputes the lol interferene numer of this vrile, i.e. the numer of interferenes with ll the vriles in eh prtition. CGOA ssigns the vrile to the prtition with the lowest lol interferene numer. The ojetive of vrile prtition is to minimize the interferene mong vriles ssigned to the sme set, nd to inrese the hnes of vrile olesing in CSOA. 5.2 Inrementl olesing generl offset ssignment (ICGOA) Our inrementl vrile olesing sed generl offset ssignment (ICGOA) sheme works s follows. It first divides the vriles tht exist in the old ode into prtitions sed on their glol interferene numers in the old ode. It then sorts the new vriles ording to the deresing order of their glol interferene numers in the new ode. ICGOA ssigns new vriles to the prtitions ording to their lol interferene numers, similr to CGOA. After the vrile prtitioning, ICSOA is pplied to eh vrile set to generte the offset ssignment. 5.3 Updte sripts When generting the updte sript using only ontext-unwre primitives, there is no differene etween ICSOA nd ICGOA shemes. When using ontext-wre primitives, we need to enhne the uxiliry dt strutures to hndle eh vrile independently. Sine vriles in the olesed vrile list re sorted ording to their memory ddresses, nd those using the sme ddress register re grouped together, we only need to dd one-yte flg to terminte eh group. Tht is, we need extr k ytes for the rhiteture with k ddress registers. In ddition we dd informtion to the AR in/out vlue list to pture the entering/exiting vlues of

7 eh ddress register. The updte does not signifintly inrese the sript size s the uxiliry dt strutures re preloded, nd only the modified setions re trnsmitted. With enhned uxiliry dt strutures, ICGOA proesses eh ddress register independently similr to ICSOA s we disussed in preeding setions. 6. Experiments 6. Settings We hve implemented our proposed updte-onsious ICSOA/ICGOA lgorithms. We hose the Lne Compiler[] to onvert the soure ode (C ode) into intermedite representtions (IRs) from whih the ess sequene nd interferene grph re extrted. We seleted the DSPstone[4] enhmrk suite tht is widely used to mesure the performne of DSP ompilers. We dopted CSOA- Offsetstone[2] s the seline CSOA nd implemented ICSOA on top of it. We reted the ode updte enhmrks using three methods: i). ompre two offiil releses; ii). mnully insert ode hnges to the pplition; iii). utomtilly insert ode hnges to the pplition. Then we generted the new inry using either CSOA/CGOA or ICSOA/ICGOA, nd the updte sript using different sripting shemes. We evluted their effetiveness sed on ode qulity nd ode similrity. 6.2 Softwre updte overhed We mnully mde hnges to two funtions from DSPstone the enoding/deoding verifition funtion (verify.) nd the mtrix multiplition funtion (mtrix.). We modified these funtions nd, ording to the impt on the existing ode, tegorized the hnges into smll nd medium hnges, ording to the numer of ffeted instrutions (ses to 5 in Figure ). In ddition, one funtion my hve different versions in DSPstone, suh s the multiplition funtion mtrix. whih hs two versions, nd the ADPCM stndrd implementtion opt dpm. whih hs four versions. We seleted the min funtion in mtrix., s well s the speed ontrol funtion in opt dpm. s our enhmrks. The three mnully generted test ses re divided into medium nd lrge tegories (ses 6 to 8 in Figure ). We evluted the impt s the numer of vrile interferenes tht re dded y the ode updte, nd whether these new interferenes onflit with existing vrile prtitioning result. An interferene onflit hppens when two olesed vriles (in the old ssignment) hve overlpped live rnges nd thus nnot e olesed nymore. Figure 2 ompres the softwre updte overhed for CSOA nd ICSOA. We used three sript formts to do the omprison. Simple ontext-unwre sript tht uses only the first types of ontext-unwre primitives; Advned ontext-unwre sript tht uses ll types of ontextunwre primitives; Context-wre sript tht uses oth ontext-unwre nd ontextwre primitives. Using the sme sript genertor with ICSOA, the updte sript size n e redued y 32%. This is euse tht the updte-wre sheme follows the vrile oleses nd offset ssignment of the old ode. The generted ode hs etter ode similrity to the old version in terms of oth offset ssignment nd instrution ddressing mode. In Test-Cse, the ode updte is very smll suh tht the differene etween the old nd new offset ssignments is not ig. We did not see muh enefit using ICSOA over CSOA. When ompring different sript genertors, we oserved tht etween the two ontext-unwre shemes, the dvned ontext- Test Ctegory Funtion Desription Cse smll verify. Updte one si lok to rete the interferene etween two vriles tht re not olesed in the originl version. 2 medium verify. Updte one si lok to rete the interferene etween three vriles tht re olesed in the originl version. 3 medium verify. Expnd the live rnges of three vriles to ross si loks. 4 medium mtrix. Shrink the live rnge of the one vrile nd Expnd the live rnge of nother vrile within on si lok. Over ten interferenes re updted. 5 medium mtrix. Shrink the live rnges of the two vriles nd Expnd the live rnges of nother two vriles within on si lok. Over ten interferenes re updted. 6 medium mtrix. Move two itertions out of the loop. mtrix2. 7 medium speed ontrol 2 8 lrge speed ontrol 2 3 Seven temporry vriles re introdued to hold the vlue of the omprison results. Multiple glol vriles re omined into struture. The referene to the vriles re hnged due to this hnge. Figure. Experimentl enhmrks. unwre sript genertor produes smller sript due to its usge of the insert ess primitive. When there is no vrile ess insertion ut ontins removl or updte in the ode updte, the two sript genertors produe the sme sript i.e. Test-Cse 4 nd 5. The ontext-wre sript genertor produes smller sripts when the ode updte is medium. Insted of sending individul instrution differenes, it just sends out the dt llotion differenes, from whih eh node genertes the new inry y itself i.e. Test-Cse 4 nd 5. We see signifint sript size redution y using this sheme. Adopting ontext-wre sript tends to inur lrge omplexity i.e. Test-Cse nd 3 where we see smll sript size inrese due to the omplexity to speify the offset ssignment hnge. When the ode hs signifint hnges e.g. Test-Cse 8 introdues 32% ode hnges, the old nd new ode segments re mixed suh tht the enefit from keeping the old dt offset ssignment diminishes. GOA sript size omprison. When there re multiple ARs, Figure 3 ompres CGOA nd ICGOA shemes with the different sript genertors. When there re more ARs, reompiling the progrm results in lrge hnges in oth the vrile prtition nd offset ssignment. For Test-Cse 3, CGOA with ontext-wre sript hs lrger size thn tht with simple sript. This is euse tht the signifint vrile prtition hnge nd requires more primitives to speify the new offset lyout. In onlusion, ICSOA/ICGOA is preferred when there re medium hnges while reompiltion is preferred when the hnge is smll or ig. 6.3 Code qulity In this pper we evluted the stti ode qulity i.e. the numer of instrutions in the new inry produed y CSOA nd ICSOA shemes. An lterntive pproh is to evlute the dynmi ode qulity i.e. the runtime instrution ounts with given exeution

8 Sript Size (ytes) CSOA CU simple CSOA CU dvned CSOA CA ICSOA CU simple ICSOA CU dvned ICSOA CA Exeution Overhed (# of instrutions) CSOA ICSOA Test Cse Numer Test Cse Numer Figure 4. Code qulity omprison etween CSOA nd ICSOA. Figure 2. Sript size omprison etween CSOA nd ICSOA (Single ddress register). Sript Size (ytes) CGOA CU simple CGOA CU dvned CGOA CA ICGOA CU simple ICGOA CU dvned ICGOA CA Test Cse Numer Figure 3. Sript size omprison etween CGOA nd ICGOA (Doule ddress register). profiles. Although the ltter provides more urte evlution, s we disussed in the introdution setion, emedded moile systems n periodilly rehrge the ttery, so the exeution overhed is less ritil ompred to its the ommunition overhed. As shown in Figure 4, ICSOA produes out the similr numer of instrutions s CSOA. On verge, the inry generted y ICSOA is % lrger thn the inry generted y CSOA. And for the worst test se, i.e. Test-Cse 3, the inry generted y ICSOA is 23% lrger thn CSOA. Beuse the ICSOA sheme inrementlly does the dt llotion sed on the olesed ess grph of the old version, the old vrile olesing result is kept in the new version to improve ode similrity. As result, the ode generted y ICSOA is not s effiient. To etter understnd the ode qulity differene etween two pprohes, Figure 5 shows the rekdown of the exeution overhed. We seprted the new ode t the intermedite representtion (IR) level into the hnged nd unhnged prts. We then rete their mpping to the inry level ode segments. Due to the hnge to offset ssignment, the sme IR instrutions my e different in the old nd new ode. The hnge ould e tegorized into two types: () updting the ddressing mode of the relted inry instrutions, suh s the first memory ess in Test CSOA ICSOA Cse# T T2 T3 T4 T T2 T3 T Figure 5. Exeution overhed rekdown. Figure 3; (2) dding ddressing mode hnge instrutions. The first type updte does not hnge the instrution numer s no extr instrution is dded, ut for the seond type, one extr instrution is dded per hnge. To study the ode qulity, we divide the overhed into four tegories s follows. T-T3 shows how effiient the offset ssignment lgorithm is; nd T4 shows how the extr pth ffets the finl result. T: AR loding instrutions removed from the old ode; T2: AR loding instrutions inserted into the old ode; T3: AR loding instrutions inserted into the new ode; T4: ALU instrutions inserted into the new ode. Compring olumns T nd T2 of oth CSOA nd ICSOA in Figure 5, we found tht CSOA genertes less inry instrutions for the unhnged IR prt. It removes more AR loding instrutions, nd inserts less suh instrutions. For the new ode prt, CSOA genertes less AR loding instrutions. When performing omplete reompiltion, CSOA uses the new ess sequenes nd vrile interferenes of the whole funtion, nd thus n generte the etter offset ssignment. Column T4 shows the numer of ALU instrutions generted y ompiling the new ssemly ode. Sine ICSOA needs to dd pth vriles to remove the interferenes due to overlpped live rnges, it dds severl move instrutions in the ode, whih uses more T4 type instrutions. GOA performne omprison. For the test se 3 tht hs the lrgest ode qulity differene, we inresed the numer of ville ARs, nd found tht with more ville ARs, the ode qulity differene is redued, s shown in Figure 6. The extr instrution numer drops from 2% to 6% when the ddress register numer is inresed from to 4. This is euse with more ARs, the vriles re prtitioned into smller sets. The softwre updte tends to rete less new interferene nd needs fewer pth vriles. Fewer interferenes result in less overhed in ICSOA. 2

9 Extr Exeution Overhed (%) Register Numer Figure 6. Code qulity omprison with multiple ARs. 6.4 Rndom ode insertion We next inserted hnges rndomly into file (verify.) to study the roustness of our proposed sheme. The inserted ode involves the use of oth existing nd new vriles. The rtio of these two types is :, nd the sizes of the inserted/hnged ode rnge from 5% to 6% of the originl ode. Given n updte perentge, we rndomly generted 5 test ses nd reported the verge. The sript size omprison is shown in Figure 7. For ll three types of the sript genertion shemes, inrementl ompiltion sheme redues more of the updte sript size nd thus the softwre updte trnsmission overhed. However, the results show tht we hieved the mximum sript size redution when the updte perentge is etween % nd 4%. This is euse ICSOA enefits more when most of the updte is used y the dt llotion hnges rther thn new/updted instrution opertions. When the updte perentge is too ig, i.e. lrger thn 4%, most hnges re new or updted instrutions. When the updte perentge is too smll, i.e. smller thn 2%, the dt llotion tle is less likely to hnge even with reompiltion. Thus, the enefits from ICSOA re limited. Sript Size (ytes) CSOA CU simple CSOA CU dvned CSOA CA ICSOA CU simple ICSOA CU dvned ICSOA CA 5% % 2% 4% 6% New Aess % Figure 7. Sript size omprison etween reompile nd inrementl-ompile (sttered rndom new ode insertion). The ode qulity is ompred in Figure 8. Lrger ode updte perentge, i.e. over 4%, hs more live rnge extension of old vriles, whih produes more pth vriles nd instrutions. Thus, the ode produed y the reompiltion sheme hs lrger numer of T4 type instrutions; the ode generted y the ICSOA sheme hs worse exeution performne. From Figure 8 nd Figure 7, we onlude tht when the ode updte perentge is etween 2% nd 4%, using the updteonsious offset ssignment sheme n sve out 3% of the Exeution Overhed (# of instrutions) CSOA ICSOA 5% % 2% 4% 6% New Aess % Figure 8. Code qulity omprison etween reompile nd inrementl-ompile (sttered rndom new ode insertion). trnsmission overhed, ssuming tht ontext-unwre dvned sript is used, with out 2% extr instrution exeution. From the experimentl results, we n lso see tht the ontextunwre sheme works etter with the inrementl ompiltion sheme, nd the ontext-wre sheme works etter with the reompiltion sheme. This is euse tht the ontext-wre sheme trdes updting individul instrutions for setting up the uxiliry dt strutures nd letting the sensors to onstrut these updtes. Thus, when we reompile the new version, reltively lrge numer of instrutions re hnged due to the dt llotion differenes, so the ontext-wre sheme n gin more enefit y sving those updtes. On the other hnd, when we use the inrementl ompiltion tehnique, the sving is not gret enough to lne the spending in setting up the dt strutures, therefore, the ontextunwre sheme is more enefiil. 7. Relted work 7. Softwre pthing in resoure onstrined emedded systems Softwre pthing hs eome n integrl prt of softwre development, nd is prtiulrly importnt for systems tht pth their ode through wireless ommunition e.g. wireless sensor networks, nd moile emedded systems. There hve een efforts to design energy effiient post-deployment ode dissemintion in wireless sensor networks. Erly shemes foused more on the protool design nd usully disseminted the entire new ode [25, 6]. Reent shemes widely dopted the diffsed strtegy. Reijers et l. [23] proposed simple updte primitives to summrize the differene etween new nd old inries, nd disseminte the updte sript insted of the omplete new ode. Sine without hving the prior knowledge of ode struture, Jeong et l. dpted the rsyn lgorithm to generte hshes of fixed ode loks from whih the updte sript n e derived. Li et l. proposed updte-onsious register llotion nd dt llotion tehniques for pplitions using se-register-plus-offset ddressing mode [8]. Pthing ode t higher semnti levels tends to generte smller updte sript. Levis et l. showed tht the ode size is very short when they re represented using virtul mhine instrutions. Mrron et l. proposed to produe seprte ojet files for TinyOS omponents linked y the sensor [9]. Dunkels et l. further proposed dynmil linker for this system [5]. Koshy et l. proposed to reloted modules nd generte the inry using remote linker []. A drwk of relesing ode not in the inry formt is the inresed runtime overhed, whih might not e eptle for tightly resoure-onstrined emedded systems. 3

10 We need lgorithms tht support effiient inry ode updte s DSP ode is often highly optimized or even hnd tuned to ensure performne nd is relesed only in inry formt. The updteonsious offset ssignment lgorithm in this pper is, to the est of our knowledge, the first suh lgorithm for DSP proessors. 7.2 Offset ssignment prolem on DSP proessors Alloting vriles to memory on DSP proessors ws formulted s offset ssignment prolem y Brtley et l. [2] nd Lio et l. [3]. Lio et l. modeled the prolem s finding the mximum weight pth over (MWPC) of the ess grph [3]. Leupers et l. extended their work y proposing tie-reking heuristi in uilding ess grphs nd vrile prtition heuristi for GOA [4]. Atri et l. improved the heuristi with n inrementl SOA lgorithm []. Sudrsnm et l. presented their lgorithm [24] when the hrdwre supports uto ddressing rnge [-L,+L]. Ro et l. proposed to reorder vriles essed in opertions with ommuttive opernds [22]. Choi et l. oupled offset ssignment with ode sheduling to minimize ddressing instrutions [3]. Kndemir et l. proposed more ggressive intr- nd inter- sttement trnsformtion for reordering ess sequenes [9]. A geneti lgorithm (GA) sed lgorithm ws proposed y Leupers et l. [5] to hndle multiple registers with ddressing rnge [-L,+L]. Leupers onstruted the Offsetstone enhmrk suite [2] nd onduted empiril omprison of mjor ssignment heuristis [6]. A more omprehensive iliogrphy n lso e found t this wesite [2]. Zhung et l [26] nd Ottoni et l. [2] independently developed lgorithms to optimize offset ssignment sed on vrile olesing vriles tht re not live simultneously n e lloted in the sme memory lotion. They reported round 7% stk size redution for oth SOA nd GOA. Our sheme is orthogonl to existing offset ssignment heuristis nd explores the offset lgorithm spe from new diretion. 8. Conlusions In this pper we proposed n effiient ode updte sheme for hieving the est trdeoff etween minimized updte sript size, ompt inry size, nd the runtime performne. Our study showed tht, due to DSP ode eing losely oupled to dt lyout in memory, it is effetive to perform inrementl offset ssignment suh tht the ode similrity of the new nd old ode n e improved. Aknowledgment This work is supported in prt y NSF CNS-72595, NSF CA- REER CCF The uthors thnk nonymous reviewers for their onstrutive omments.the uthors thnk Dr. Jing Zheng for the erly disussion of the ide, nd nonymous reviewers for their onstrutive omments. Referenes [] S. Atri, J. Rmnujm, nd M. Kndemir, Improving Offset Assignment for Emedded Proessors, In Lnguges nd Compilers for High-Performne Computing, S. Midkiff et l. (eds.), LNCS, Springer, 2. [2] D.H. Brtley, Optimizing Stk Frme Aesses for Proessors with Restrited ing Modes, In Softwre: Prtie nd Experiene, 22(2):, 992. [3] Y. Choi, nd T. Kim, Assignment Comined with Sheduling in DSP Code Genertion, In Design Automtion Conferene, 22. [4] DSPStone Benhmrk Suite, [5] A. Dunkels, N. Finne, J. Eriksson, nd T. Voigt, Run-Time Dynmi Linking for Reprogrmming Wireless Sensor Networks, In ACM Interntionl Conferene on Emedded Networked Sensor Systems, pp. 5 28, 26. [6] J. W. Hui, nd D. Culler, The Dynmi Behvior of Dt Dissemintion Protool for Network Progrmming t Sle, In the 2nd ACM Conferene on Emedded Networked Sensor Systems, 24. [7] iphone mnul. [8] J. Jeong, nd D. Culler, Inrementl Network Progrmming for Wireless Sensors, In Interntionl Conferene on Sensor nd Ad Ho Communitions nd Networks, 24. [9] M. Kndemir, M. J. Irwin, G. Chen nd J. Rmnujm, Register Assignment for Reduing Code Size, In the 2th Interntionl Conferene on Compiler Constrution, 23. [] J. Koshy, nd R. Pndey, Remote Inrementl Linking for Energy- Effiient Reprogrmming of Sensor Networks, In Europen Workshop on Wireless Sensor Networks, pp , 25. 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Devds, Anlysis nd Evlution of Arithmeti Cpilities in Custom DSP Arhitetures, In Design Automtion Conferene, pp , 997. [25] Crossow Tehnology In. Mote In-Network Progrmming User Referene, 23. [26] X. Zhung, C. Lu, nd S. Pnde, Storge Assignment Optimiztions through Vrile Colesene for Emedded Proessors, In the Interntionl Conferene on Lnguges, Compilers, nd Tools for Emedded Systems, 23. 4