HFSS 14 Update for SI and RF Applications. Presenter: Senior Application Engineer Jeff Tharp, Ph.D.

Transcription

1 HFSS 14 Update for SI and RF Applications Presenter: Senior Application Engineer Jeff Tharp, Ph.D. 1

2 Overview Advanced Integrated Solver Technologies Finite Arrays with Domain Decomposition Hybrid solving FEBI IE Regions Physical Optics Solver in HFSS IE New Layout interface for HFSS: Solver on Demand in Designer Usability Enhancements CAD Integration in Workbench Improved Multiphysics flow 2

3 Advanced Solvers: Finite Arrays with DDM 3

4 Finite Arrays with Domain Decomposition Efficient solution for repeating geometries (array) with domain decomposition technique (DDM) ANSYS, Inc. September 6, 2011

5 Finite Arrays Solve large finite array designs Efficient setup and solution Define unit cell and array dimensions Efficient geometry creation and representation Efficient Domain Decomposition solution Leverages repeating nature of array geometries Only mesh unit cell Virtually repeat mesh throughout array Post process full S parameter Couplings included Edge effects included 3D field visualization Far field patterns for full array Memory efficient Enabled with the HFSS HPC product 5

6 Finite Arrays by Domain Decomposition Each element in array treated as solution domain One compute engine can solve multiple element/domain in series Distributes element sub-domains to networked processors and memory 6

7 Example: Skewed Waveguide Array 16X16 (256 elements and excitations) Skewed Rectangular Waveguide (WR90) Array 1.3M Matrix Size Using 8 cores 3 hrs. solution time 0.4GB Memory total Using 16 cores 2 hrs. solution time 0.8GB Memory total Additional Cores Faster solution time More memory. Unit cell shown with wireframe view of virtual array 7

8 Skewed Waveguide Array Patterns from 8X8 Array Dashed is idealized infinite array analysis Solid from finite array analysis Two simulations use identical mesh Note edge effects due to finite array size 8

9 Efficiency Example: 8X8 Array Patch Array Direct solver with 12 cores 5:05: GB RAM Finite Array DDM with 12 cores 00:44: GB 6.8X faster 33.8X less memory 9

10 HPC: Faster with additional cores Linux cluster 16X Dell PowerEdge R610 Dual six core Xeon X5760, 8GB per core Same 8X8 array of probe feed patch antennas 3M+ Matrix size, 64 excitations Study performed using 101, 51,26, 11, 6 and 3 engines.* 101 simulation time = 17 min., 20X faster than direct solver *Three engines used as baseline 7 speed factor speed factor Number of cores

11 Hybrid Solving: Finite Element Boundary Integral 11

12 Finite Element Boundary Integral Solving Larger Problems with Rigor Antenna Placement Study: UHF Antenna on Apache UH64 airframe Finite Elements with DDM Boundary Integral (3D Method of Moments) Hybrid Finite Element Boundary Integral (FE BI) 12

13 Hybrid Solving: Finite Element Boundary Integral Apache helicopter UHF antenna placement 900 MHz Solution volume 1,250 m 3 33,750 λ 3 Solution Specs 72 engines Matrix size = 47M 6 adaptive passes 300 GB RAM 5 hr 30 min Finite Elements with DDM 13

14 Hybrid Solving: Finite Element Boundary Integral Apache helicopter UHF antenna placement 900 MHz Solution surface 173 m λ 2 Solution Specs 12 core MP 680k unknowns 9 adaptive passes 83 GB RAM 5 hr 28 min Boundary Integral, 3D MoM with HFSS IE 14

15 Hybrid Solving: Finite Element Boundary Integral Apache helicopter Hybrid Finite Element Boundary Integral UHF antenna placement 900 MHz FEM solution volume 69 m λ 3 IE solution surface 236 m λ 2 Solution Specs 12 cores total using DDM with MP Matrix Size = 2.9M 6 adaptive passes 21 GB RAM 1hr3 min Compared to 72 core FEM solution 14X less memory 5.5 times faster 15

16 Hybrid Solving: IE Regions 16

17 FEBI and Physically Separate Domains Reflector with multiple FE BI domains Conducting reflector and feed horn each surrounded by air with FEBI applied to surface of air volumes Provides integral equation link between FEM domains But 3D MoM solution from integral equations could be applied directly to conducting surface only 1meter 10λ 1meter 20λ 1meter 30λ Frequency Memory Required Frequency Memory Required Frequency Memory Required 3 GHz 2GB 6 GHz 10GB 9GHz 30GB 17

18 HFSS Hybrid Solving IE Regions Parallelized IE regions solved in parallel. Analogous to FEM domains Rigorous Multiple reflection Automated 18

19 IE Dielectric Regions Solve large homogeneous blocks of dielectric with a boundary condition Replace enclosed arbitrary dielectrics Solve with multiple open or enclosed IE regions Conducting IE regions may be inside dielectric IE regions Antenna Air Ground Penetrating Radar Surface Soil Mine FEM Enclosed IE Conducting IE Different solution domains may be solved in parallel with DDM 19

20 HFSS IE Regions Example 20

21 Physical Optics 21

22 HFSS IE PO Asymptotic solver for extremely large problems In HFSS IE Solves electrically huge problems And provides first pass quick solution for IE Currents are approximated in illuminated regions Set to zero in shadow regions No ray tracing or multiple bounces Target applications: Large reflector antennas RCS of large objects such as a windmill Option in solution setup for HFSS IE. Sourced by incident wave excitations Plane waves or linked HFSS designs as a source 22

23 PO Examples Notice the shadowing of the gun barrel on the tank and the tank on the ground. 23

24 HFSS IE PO Example Offset reflector 50 λ 0 in diameter fed by a horn (far-field link) Simulated with 8 cores IE: 48.3min and 11.9GB PO: 23S and 286MB Note > 120x speedup 24

25 Solver on Demand 25

26 Solver on Demand: An ECAD Interface for HFSS Problem Description: 1. Converting package and printed circuit board layout data to 3D mechanical CAD models creates a large amount of unnecessary overhead in the geometry database 2. A key capability needed for wide spread use of HFSS as an extraction tool is to make it accessible to non experts Solution: 1. When HFSS is used for package and PCB extraction a 2D Electrical CAD layout editor is better suited for model creation and setup 2. The Designer Layout editor with Solver on Demand improves HFSS accessibility for non expert engineers who need to use HFSS for package and PCB extraction It provides an EMI solution for 2 layer pkg and board design with HFSS and PlanarEM 3. The Designer Layout editor with Solver on Demand significantly reduces the engineering time required to set up package and pcb models for extraction with HFSS 4. Cadence design flows allows a user to solve with HFSS from within the Cadence environment using Cadence Extracta and an IPC link 26

27 Designer RF with HFSS Solver on Demand HFSS Solver on Demand Intuitive PCB design entry for HFSS Chips, packages, channels, modules, Designer layouts simulated with HFSS Automated boundary and port setups Finite dielectrics and ground supported Wave and Lumped Gap Port Single ended and Differential Vertical and Horizontal Coaxial, CPW and Grounded CPW 27

28 HFSS for ECAD Two Design Flows for Electrical Design Mechanical CAD Connectors, Waveguides HFSS Electric CAD (layout) PCBs, Packages, On chip Passives HFSS Solver on Demand 28

29 HFSS for ECAD Highly automated for in layout design environment Primitives = traces, pads, bondwires, vias Net name definition Significantly reduce engineering time interacting with software Lightweight interface for geometrically complex structures Direct import of Cadence products using Cadence Extracta Allegro, APD, and SiP Direct HFSS solve from within the Cadence environment Virtuoso, Allegro, APD, and SiP 29

30 Cadence SPB Integration Cadence integration enables engineers to create an HFSS model that is ready to simulate directly from the Cadence user interface. Advanced settings can be pre defined in an XML based control file to simplify setup for non expert users. Other features: Critical net selection for extraction. Cut out and select critical geometry Manual or automatic extent definition. Port definition based on component pins or cutout edges. Definine wave ports at cutout extends Uses 3D information such as bondwire, ball and bump information from SiP to HFSS. Support for package, PCB and SiP flows. IPC interface enables real time feedback from HFSS to Cadence 30

31 HFSS within Cadence SPB & Virtuoso Dynamic ECAD Flow Create and Solve models with HFSS from within Cadence SPB & Virtuoso HFSS Solution Progress 31

32 HFSS ECAD Layout Editor HFSS Solver Technology is embedded in Designer as Solver on Demand Export 3D HFSS Model Solve in Designer using HFSS 32

33 HFSS Solve for PKG merged to PCB Lumped ports on package bumps 33

34 HFSS ECAD Layout Editor Adapt HFSS mesh at multiple frequencies: 34

35 HFSS ECAD Layout Editor Surface roughness and etch factor can be defined in the stackup editor: 35

36 Parameterized Padstacks Enables parametric investigation of via geometry, or optimization. Applied to global padstack definition. Therefore, project variables are used: 36

37 Parameterized Differential Vias 37

38 HFSS ECAD Layout Editor Parameterizable Etch Factor Automatic Causal Djordjevic Sarkar Dielectric Models Parameterizable Surface Roughness 38

39 Show Nets in HFSS for MCAD Show Nets identifies 3D conducting paths between terminals 39

40 Huray Surface Roughness: Modeled vs. Measured Surface Roughness Reference: P.G. Huray, O. Oluwafemi, J. Loyer, E. Bogatin, and X. Ye; "Impact of Copper Surface Texture on Loss: A Model That Works", DesignCon 2010, February 1 4, Nodule Radius; a = 0.5 um Hall-Huray Surface Ratio: low = 1, mid = 3, high = 6 40 Resonance Reference: P. Pathmanathan, C.M. Jones, S.G. Pytel, D.L. Edgar, P.G. Huray, Power Loss due to Periodic Structures in High Speed Packages and Printed Circuit Boards, European Microelectronics Packaging Conference IMAPS 2011, Brighton, England, September 12 15, 2011

41 Passivity Enforcement: Interpolating Sweeps Additional criteria to determine convergence Passivity violations used as new basis points Improves reliability of models in transient SPICE simulations 41

42 De embedding Lump Port (Calibration) Physical dimensions of lump port carries current intrinsic inductance Analytic inductance is de embedded from port S parameters Calibrating the test fixture of the measurement Implementation analogous to wave port de embedding 42

43 HFSS Transient Transient Network Analysis Separate Frequency and Time domain Edit Source settings Specify delay of TDR to synchronize rise times Handling of partial S due to passive ports Transient Scaling and delay of individual sources General Support for general frequency dependent materials 43

44 Usability Enhancements 44

45 General Enhancements Save Radiated field data only Reduced the amount of stored data Import list for Edit Sources Can include parametric variables ~10X Reduction Network Installation for clusters Improved reliability on Linux Non graphical solves without product links Solves are independent of Mainwin registry Installations on Windows Non graphical solves without product links New Registry Configurations Installation: Lowest precedence Defaults applicable to all users Machine: Defaults applicable to all users on a machine. User : Machine independent user specific default User and machine: Highest precedence Defaults specific to user + machine 45

46 3D Modeler Enhancements View customization. 64 bit user interface Post process larger simulations Z stretch Speed Improvements Faster geometry loading Improved solid modeler speed. Improvements for selecting complex objects. 46

47 CAD Integration on WB Improvements CAD integration in ANSYS Workbench provides direct link to 3 rd party CAD tools Such as ProEngineer, Catia, SpaceClaim Added support for parametric analysis and distributed solving of CAD parameter 47

48 Ansoft to ANSYS Geometry Transfer Geometry and material assignment transfer from Ansoft to ANSYS Consume geometry from multiple upstream CAD sources Source can be any of CAD, DesignModeler or Ansoft products Further geometry edits are possible in ANSYS Design Modeler Creates User Defined Model (UDM) for each geometry input. 48

49 Conclusions Advanced Integrated Solver Technologies Physical Optics Solver in HFSS IE New Layout interface for HFSS: Solver on Demand in Designer Improved Multiphysics flow Usability Enhancement 49

50 HFSS 14 Update for SI and RF Applications Presenter: Senior Application Engineer Jeff Tharp, Ph.D. 50

51 Save Radiated Field Data Only Reduced the amount of data stored on hard drive for large antenna problems Setting for Solution setup, discrete and fast sweeps ~10X Reduction 51

52 Import List Entry for Edit Sources Easy input for magnitude and phase from source list Can include parametric variables 52

53 Ansoft HPC Enhancements: Network Installation on clusters Improved reliability on Linux Non graphical batch solves without product links Solves are independent of Mainwin registry No hung mainwin services or corrupt mainwin registry Network installations on Windows for Non graphical batch solves without product links Need to install VC redistributables on nodes ANSYS Registry XML file 53

54 Registry Configuration Software settings can be defined at various levels (all operating systems): Installation: Lowest precedence Installation level defaults applicable to all users Machine: Machine specific defaults applicable to all users on a given machine. User : Machine independent user specific default User and machine: specific value Highest precedence Most specific value: Specific to user and machine Run: UpdateRegistry -help from the product installation directory for usage details. 54

55 IronPython To get started using IronPython (from any Desktop Product): Set the environment variable ANSOFT_ENABLE_COMMANDWINDOW_UI=1 From the user interface: Tools>Open Command Window 55

56 Physical Optics (PO) Recieve Handles object scattering using asymptotically derived currents. There is an edge effect but it does not yield the true diffracted fields. Scatterer Currents approximated as J 2nxH inc Source 56

57 HFSS Setup & Solve in Virtuoso 57

58 Port assignment by pad Select pad > RT Click > Create Port Port name is derived from pad name 58

59 Remove port definition Remove the port definition This does NOT delete the pad, just removes the port definition. 59

60 Virtuoso Integration HFSS within Virtuoso Lumped ports (vertical and horizontal) Simulation Setup & Solve Improve storage of database for use with other designs in the same CDN lib. Simplify layer stackup Clustering of via arrays Solver on Demand Virtuoso Layout 60

61 A Review: Domain Decomposition Distributed memory parallel solver technique Distributes mesh sub domains to network of processors Significantly increases simulation capacity Highly scalable to large numbers of processors Automatic generation of domains by mesh partitioning User friendly Load balance Hybrid iterative & direct solver Multi frontal direct solver for each subdomain Sub domains exchange information iteratively via Robin s transmission conditions (RTC) Distributes mesh sub-domains to networked processors and memory 61

62 Running Finite Array Use Master/Slave unit cell design to adapt the mesh Called Unit Cell for Adaptive Meshing in image Copy/Paste Design Called 8X8 Array in image Create a single pass setup in finite array design On Advanced tab use Setup Link to link mesh from unit cell design Doing adaptive meshing in finite array design will be time consuming and not as efficient 62

63 PO Solver in HFSS-IE 14 PEC Where: J PO = 2(n x H inc ) PO assumes the fields on all illuminated surface are the incident fields Effects of the scatterers are included by assuming the incident fields are scattered at each point on the body as if it were reflected from an infinite tangent plane at that point; J~2(n x H inc ) for PEC. For non illuminated surfaces the J are set to zero. 63

64 PO Solver in HFSS-IE 14 For objects that fit the approximations mentioned previously the simulation is Incredibly efficient in both time and memory However, No diffraction (edge, corner, tip, ) from edges, corners or tips No higher order interaction No scattered fields from the other objects, e.g. the reflected reflected terms. Sources must be exterior to the PO objects Incident plane waves Far field links from other simulations. Only good conductors no dielectrics. 64

65 Design Description Balanced Amplifier MMIC amplifiers in parallel Gain = 22dB Power = 30dBm P1dB = 11dBm F=10GHz 65

66 HFSS ECAD Layout Editor Combined layout editor for 2D and 3D views <ALT> left mouse (rotate) 66