Spansion Analog and Microcontroller Products

Transcription

1 Spansion Analog and Microcontroller Products The following document contains information on Spansion analog and microcontroller products. Although the document is marked with the name Fujitsu, the company that originally developed the specification, Spansion will continue to offer these products to new and existing customers. Continuity of Specifications There is no change to this document as a result of offering the device as a Spansion product. Any changes that have been made are the result of normal document improvements and are noted in the document revision summary, where supported. Future routine revisions will occur when appropriate, and changes will be noted in a revision summary. Continuity of Ordering Part Numbers Spansion continues to support existing part numbers beginning with MB. To order these products, please use only the Ordering Part Numbers listed in this document. For More Information Please contact your local sales office for additional information about Spansion memory, analog, and microcontroller products and solutions.

2 FUJITSU SEMICONDUCTOR DATA SHEET DS v0-E 32-bit ARM TM Cortex TM -M3 based Microcontroller MB9AF311K, MB9AF312K DESCRIPTION The are a highly integrated 32-bit microcontrollers dedicated for embedded controllers with high-performance and low cost. These series are based on the ARM Cortex-M3 Processor with on-chip Flash memory and SRAM, and has peripheral functions such as Motor Control Timers, ADCs and Communication Interfaces (USB, UART, CSIO, I 2 C, LIN). The products which are described in this data sheet are placed into TYPE5 product categories in "FM3 Famliy PERIPHERAL MANUAL". Note: ARM and Cortex are the trademarks of ARM Limited in the EU and other countries. Copyright 2012 FUJITSU SEMICONDUCTOR LIMITED All rights reserved

3 FEATURES 32-bit ARM Cortex-M3 Core Processor version: r2p1 Up to 40MHz Frequency Operation Integrated Nested Vectored Interrupt Controller (NVIC) : 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels 24-bit System timer (Sys Tick) : System timer for OS task management On-chip Memories [Flash memory] This Series are based on two independent on-chip Flash memories. MainFlash Up to 128Kbyte Read cycle : 0 wait-cycle Security function for code protection WorkFlash 32Kbyte Read cycle : 0 wait-cycle Security function is shared with code protection [SRAM] This Series contain a total of up to 16Kbyte on-chip SRAM memories. This is composed of two independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus or D-code bus of Cortex-M3 core. SRAM1 is connected to System bus. SRAM0 : 8 Kbyte SRAM1 : 8 Kbyte USB Interface USB interface is composed of Function and Host. [USB function] USB2.0 Full-Speed supported Max 6 EndPoint supported EndPoint 0 is control transfer EndPoint 1, 2 can be selected Bulk-transfer, Interrupt-transfer or Isochronous-transfer EndPoint 3 to 5 can be selected Bulk-transfer or Interrupt-transfer EndPoint 1 to 5 is comprised Double Buffer [USB host] USB2.0 Full/Low-speed supported Bulk-transfer, interrupt-transfer and Isochronous-transfer support USB Device connected/dis-connected automatically detect IN/OUT token handshake packet automatically Max 256-byte packet-length supported Wake-up function supported 2 DS v0-E

4 Multi-function Serial Interface (Max 4channels) 2 channels with 16-steps 9-bits FIFO (ch.0, ch.1), 2 channels without FIFO (ch.3, ch.5) Operation mode is selectable from the followings for each channel. (In ch.5, only UART and LIN are available.) UART CSIO LIN I 2 C [UART] Full-duplex double buffer Selection with or without parity supported Built-in dedicated baud rate generator External clock available as a serial clock Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4) Various error detect functions available (parity errors, framing errors, and overrun errors) [CSIO] Full-duplex double buffer Built-in dedicated baud rate generator Overrun error detect function available [LIN] LIN protocol Rev.2.1 supported Full-duplex double buffer Master/Slave mode supported LIN break field generate (can be changed 13 to 16-bit length) LIN break delimiter generate (can be changed 1 to 4-bit length) Various error detect functions available (parity errors, framing errors, and overrun errors) [I 2 C] Standard mode (Max 100kbps) / High-speed mode (Max 400kbps) supported DMA Controller (4channels) DMA Controller has an independent bus for CPU, so CPU and DMA Controller can process simultaneously. 8 independently configured and operated channels Transfer can be started by software or request from the built-in peripherals Transfer address area: 32-bit (4Gbyte) Transfer mode: Block transfer/burst transfer/demand transfer Transfer data type: byte/half-word/word Transfer block count: 1 to 16 Number of transfers: 1 to A/D Converter (Max 8channels) [12-bit A/D Converter] Successive Approximation Register type Built-in 2unit Conversion time: 1.0μs@5V Priority conversion available (priority at 2levels) Scanning conversion mode Built-in FIFO for conversion data storage (for SCAN conversion: 16steps, for Priority conversion: 4steps) DS v0-E 3

5 Base Timer (Max 8channels) Operation mode is selectable from the followings for each channel. 16-bit PWM timer 16-bit PPG timer 16/32-bit reload timer 16/32-bit PWC timer General Purpose I/O Port This series can use its pins as General Purpose I/O ports when they are not used for external bus or peripherals. Moreover, the port relocate function is built in. It can set which I/O port the peripheral function can be allocated. Capable of pull-up control per pin Capable of reading pin level directly Built-in the port relocate function Up 36 fast General Purpose I/O Ports Some pin is 5V tolerant I/O. See " PIN DESCRIPTION" to confirm the corresponding pins. Multi-function Timer The Multi-function timer is composed of the following blocks. 16-bit free-run timer 3ch. capture 4ch. Output compare 6ch. A/D activating compare 3ch. Waveform generator 3ch. 16-bit PPG timer 3ch. The following function can be used to achieve the motor control. PWM signal output function DC chopper waveform output function Dead time function capture function A/D convertor activate function DTIF (Motor emergency stop) interrupt function Real-time clock (RTC) The Real-time clock can count Year/Month/Day/Hour/Minute/Second/A day of the week from 01 to 99. Interrupt function with specifying date and time (Year/Month/Day/Hour/Minute/Second/A day of the week.) is available. This function is also available by specifying only Year, Month, Day, Hour or Minute. Timer interrupt function after set time or each set time. Capable of rewriting the time with continuing the time count. Leap year automatic count is available. 4 DS v0-E

6 Quadrature Position/Revolution Counter (QPRC) The Quadrature Position/Revolution Counter (QPRC) is used to measure the position of the position encoder. Moreover, it is possible to use up/down counter. The detection edge of the three external event input pins AIN, BIN and ZIN is configurable. 16-bit position counter 16-bit revolution counter Two 16-bit compare registers Dual Timer (32/16-bit Down Counter) The Dual Timer consists of two programmable 32/16-bit down counters. Operation mode is selectable from the followings for each channel. Free-running Periodic (=Reload) One-shot Watch Counter The Watch counter is used for wake up from Low Power Consumption mode. Interval timer: up to 64s Sub Clock : kHz External Interrupt Controller Unit Up to 6 external interrupt input pin Include one non-maskable interrupt (NMI) Watchdog Timer (2channels) A watchdog timer can generate interrupts or a reset when a time-out value is reached. This series consists of two different watchdogs, a "Hardware" watchdog and a "Software" watchdog. "Hardware" watchdog timer is clocked by low-speed internal CR oscillator. Therefore, Hardware" watchdog is active in any power saving mode except RTC and STOP and Deep stand-by RTC and Deep stand-by STOP. CRC (Cyclic Redundancy Check) Accelerator The CRC accelerator helps a verify data transmission or storage integrity. CCITT CRC16 and IEEE CRC32 are supported. CCITT CRC16 Generator Polynomial: 0x1021 IEEE CRC32 Generator Polynomial: 0x04C11DB7 DS v0-E 5

7 Clock and Reset [Clocks] Five clock sources (2 external oscillators, 2 internal CR oscillator, and Main PLL) that are dynamically selectable. Main Clock : 4MHz to 48MHz Sub Clock : kHz High-speed internal CR Clock : 4MHz Low-speed internal CR Clock : 100kHz Main PLL Clock [Resets] Reset requests from INITX pin Power on reset Software reset Watchdog timers reset Low-voltage detector reset Clock supervisor reset Clock Super Visor (CSV) Clocks generated by internal CR oscillators are used to supervise abnormality of the external clocks. External OSC clock failure (clock stop) is detected, reset is asserted. External OSC frequency anomaly is detected, interrupt or reset is asserted. Low-Voltage Detector (LVD) This Series include 2-stage monitoring of voltage on the VCC pins. When the voltage falls below the voltage has been set, Low-Voltage Detector generates an interrupt or reset. LVD1: error reporting via interrupt LVD2: auto-reset operation Low Power Consumption Mode Six Low Power Consumption modes supported. SLEEP TIMER RTC STOP Deep stand-by RTC Deep stand-by STOP Debug Serial Wire JTAG Debug Port (SWJ-DP) Power Supply Wide range voltage : VCC = 2.7V to 5.5V Power supply for USB I/O : USBVCC0 = 3.0V to 3.6V (when USB is used) = 2.7V to 5.5V (when GPIO is used) 6 DS v0-E

8 PRODUCT LINEUP Memory size Product name MB9AF311K MB9AF312K On-chip MainFlash 64Kbyte 128Kbyte Flash WorkFlash 32Kbyte 32Kbyte SRAM0 8Kbyte 8Kbyte On-chip SRAM1 8Kbyte 8Kbyte SRAM Total 16Kbyte 16Kbyte Function Product name MB9AF311K MB9AF312K Pin count 48/52 CPU Cortex-M3 Freq. 40MHz Power supply voltage range 2.7V to 5.5V (USBVCC:3.0V to 3.6V) USB2.0 (Function/Host) 1ch. (Max) DMAC 4ch. (Max) Multi-function Serial Interface (UART/CSIO/LIN/I 2 C) 4ch. (Max) with 16-steps 9-bits FIFO : ch.0, ch.1 without FIFO : ch.3, ch.5 (In ch.5, only UART and LIN are available.) Base Timer (PWC/ Reload timer/pwm/ppg) 8ch. (Max) A/D activation 3ch. compare capture 4ch. MF- Free-run Timer timer 3ch. 1 unit (Max) Output compare 6ch. Waveform generator 3ch. PPG 3ch. QPRC 1ch. (Max) Dual Timer 1 unit Real-time clock 1 unit Watch Counter 1 unit CRC Accelerator Yes Watchdog timer 1ch. (SW) + 1ch. (HW) External Interrupts 6pins (Max) + NMI 1 General Purpose I/O ports 36pins (Max) 12-bit A/D converter 8ch. (2 units) CSV (Clock Super Visor) Yes LVD (Low-Voltage Detector) 2ch. High-speed 4MHz (±2%) OSC Low-speed 100kHz (Typ) Debug Function SWJ-DP Note: All signals of the peripheral function in each product cannot be allocated by limiting the pins of package. It is necessary to use the port relocate function of the General I/O port according to your function use. DS v0-E 7

9 PACKAGES Product name MB9AF311K Package MB9AF312K LQFP: FPT-48P-M49 (0.5mm pitch) QFN: LCC-48P-M73 (0.5mm pitch) LQFP: FPT-52P-M02 (0.65mm pitch) : Supported Note : See " PACKAGE DIMENSIONS" for detailed information on each package. 8 DS v0-E

10 PIN ASSIGNMENT FPT-48P-M49 (TOP VIEW) VSS P81/UDP0 P80/UDM0 USBVCC P60/SIN5_0/TIOA2_2/INT15_1/IC00_0/WKUP3 P61/SOT5_0/TIOB2_2/UHCONX/DTTI0X_2 P0F/NMIX/CROUT_1/RTCCO_0/SUBOUT_0/WKUP0 P04/TDO/SWO P03/TMS/SWDIO P02/TDI P01/TCK/SWCLK P00/TRSTX VCC 1 36 P21/SIN0_0/INT06_1/WKUP2 P50/INT00_0/AIN0_2/SIN3_ P22/AN07/SOT0_0/TIOB7_1 P51/INT01_0/BIN0_2/SOT3_ P23/AN06/SCK0_0/TIOA7_1 P52/INT02_0/ZIN0_2/SCK3_ AVSS P39/DTTI0X_0/ADTG_ AVRH LQFP - 48 P3A/RTO00_0/TIOA0_1/RTCCO_2/SUBOUT_ AVCC P3B/RTO01_0/TIOA1_ P15/AN05/SOT0_1/IC03_2 P3C/RTO02_0/TIOA2_ P14/AN04/SIN0_1/INT03_1/IC02_2 P3D/RTO03_0/TIOA3_ P13/AN03/SCK1_1/IC01_2/RTCCO_1/SUBOUT_1 P3E/RTO04_0/TIOA4_ P12/AN02/SOT1_1/IC00_2 P3F/RTO05_0/TIOA5_ P11/AN01/SIN1_1/INT02_1/FRCK0_2/IC02_0/WKUP1 VSS P10/AN00 C VCC P46/X0A P47/X1A INITX P49/TIOB0_0 P4A/TIOB1_0 PE0/MD1 MD0 PE2/X0 PE3/X1 VSS <Note> The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. DS v0-E 9

11 LCC-48P-M73 (TOP VIEW) VSS P81/UDP0 P80/UDM0 USBVCC P60/SIN5_0/TIOA2_2/INT15_1/IC00_0/WKUP3 P61/SOT5_0/TIOB2_2/UHCONX/DTTI0X_2 P0F/NMIX/CROUT_1/RTCCO_0/SUBOUT_0/WKUP0 P04/TDO/SWO P03/TMS/SWDIO P02/TDI P01/TCK/SWCLK P00/TRSTX VCC 1 36 P21/SIN0_0/INT06_1/WKUP2 P50/INT00_0/AIN0_2/SIN3_ P22/AN07/SOT0_0/TIOB7_1 P51/INT01_0/BIN0_2/SOT3_ P23/AN06/SCK0_0/TIOA7_1 P52/INT02_0/ZIN0_2/SCK3_ AVSS P39/DTTI0X_0/ADTG_ AVRH QFN - 48 P3A/RTO00_0/TIOA0_1/RTCCO_2/SUBOUT_ AVCC P3B/RTO01_0/TIOA1_ P15/AN05/SOT0_1/IC03_2 P3C/RTO02_0/TIOA2_ P14/AN04/SIN0_1/INT03_1/IC02_2 P3D/RTO03_0/TIOA3_ P13/AN03/SCK1_1/IC01_2/RTCCO_1/SUBOUT_1 P3E/RTO04_0/TIOA4_ P12/AN02/SOT1_1/IC00_2 P3F/RTO05_0/TIOA5_ P11/AN01/SIN1_1/INT02_1/FRCK0_2/IC02_0/WKUP1 VSS P10/AN00 C VCC P46/X0A P47/X1A INITX P49/TIOB0_0 P4A/TIOB1_0 PE0/MD1 MD0 PE2/X0 PE3/X1 VSS <Note> The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. 10 DS v0-E

12 FPT-52P-M02 (TOP VIEW) VSS P81/UDP0 P80/UDM0 USBVCC P60/SIN5_0/TIOA2_2/INT15_1/IC00_0/WKUP3 P61/SOT5_0/TIOB2_2/UHCONX/DTTI0X_2 P0F/NMIX/CROUT_1/RTCCO_0/SUBOUT_0/WKUP0 P04/TDO/SWO P03/TMS/SWDIO P02/TDI P01/TCK/SWCLK P00/TRSTX NC VCC 1 39 P21/SIN0_0/INT06_1/WKUP2 P50/INT00_0/AIN0_2/SIN3_ P22/AN07/SOT0_0/TIOB7_1 P51/INT01_0/BIN0_2/SOT3_ P23/AN06/SCK0_0/TIOA7_1 P52/INT02_0/ZIN0_2/SCK3_ NC NC 5 35 AVSS P39/DTTI0X_0/ADTG_ AVRH LQFP - 52 P3A/RTO00_0/TIOA0_1/RTCCO_2/SUBOUT_ AVCC P3B/RTO01_0/TIOA1_ P15/AN05/SOT0_1/IC03_2 P3C/RTO02_0/TIOA2_ P14/AN04/SIN0_1/INT03_1/IC02_2 P3D/RTO03_0/TIOA3_ P13/AN03/SCK1_1/IC01_2/RTCCO_1/SUBOUT_1 P3E/RTO04_0/TIOA4_ P12/AN02/SOT1_1/IC00_2 P3F/RTO05_0/TIOA5_ P11/AN01/SIN1_1/INT02_1/FRCK0_2/IC02_0/WKUP1 VSS P10/AN00 C VCC P46/X0A P47/X1A INITX P49/TIOB0_0 P4A/TIOB1_0 NC PE0/MD1 MD0 PE2/X0 PE3/X1 VSS <Note> The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. DS v0-E 11

13 PIN DESCRIPTION The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Pin No I/O circuit LQFP-48 Pin Name LQFP-52 type QFN VCC - P INT00_0 AIN0_2 I * SIN3_1 P INT01_0 BIN0_2 I * SOT3_1 P INT02_0 ZIN0_2 I * SCK3_1-5 NC - P DTTI0X_0 E ADTG_2 P3A RTO00_0 6 7 TIOA0_1 G RTCCO_2 SUBOUT_2 P3B 7 8 RTO01_0 G TIOA1_1 P3C 8 9 RTO02_0 G TIOA2_1 P3D 9 10 RTO03_0 G TIOA3_1 P3E RTO04_0 G TIOA4_1 P3F RTO05_0 G TIOA5_ VSS - Pin type H H H I I I I I I I 12 DS v0-E

14 Pin No I/O circuit LQFP-48 Pin Name LQFP-52 type QFN C VCC P46 X0A D P47 X1A D Pin type INITX B C P49 TIOB0_0 E I P4A TIOB1_0 E I - 21 NC PE0 MD1 C P MD0 J D PE2 X0 A A PE3 X1 A B VSS P10 AN00 F K P11 AN01 SIN1_1 INT02_1 F F FRCK0_2 IC02_0 WKUP P12 AN02 SOT1_1 F K IC00_ P13 AN03 SCK1_1 IC01_2 F K RTCCO_1 SUBOUT_ P14 AN04 SIN0_1 F L INT03_1 IC02_2 M N DS v0-E 13

15 Pin No LQFP-48 LQFP-52 QFN-48 Pin Name I/O circuit type P15 AN05 SOT0_1 F IC03_ AVCC AVRH AVSS NC - P AN06 SCK0_0 F TIOA7_1 P AN07 SOT0_0 F TIOB7_1 P SIN0_0 INT06_1 E WKUP2-40 NC P00 TRSTX E P TCK E SWCLK P02 TDI E P TMS E SWDIO P TDO E SWO P0F NMIX CROUT_1 RTCCO_0 E SUBOUT_0 WKUP0 P61 SOT5_ TIOB2_2 E UHCONX DTTI0X_2 Pin type K K K G E E E E E J I 14 DS v0-E

16 Pin No LQFP-48 LQFP-52 QFN Pin Name P60 SIN5_0 TIOA2_2 INT15_1 IC00_0 WKUP3 I/O circuit type USBVCC P80 UDM0 H P81 UDP0 H VSS - *: 5V tolerant I/O I * Pin type G O O DS v0-E 15

17 SIGNAL DESCRIPTION The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Pin No Module Pin name Function LQFP-48 QFN-48 LQFP-52 ADC ADTG_2 A/D converter external trigger input pin 5 6 AN AN AN AN03 A/D converter analog input pin AN04 ANxx describes ADC ch.xx AN AN AN Base Timer TIOA0_1 Base timer ch.0 TIOA pin TIOB0_0 Base timer ch.0 TIOB pin Base Timer TIOA1_1 Base timer ch.1 TIOA pin TIOB1_0 Base timer ch.1 TIOB pin Base Timer TIOA2_1 8 9 Base timer ch.2 TIOA pin 2 TIOA2_ TIOB2_2 Base timer ch.2 TIOB pin Base Timer 3 TIOA3_1 Base timer ch.3 TIOA pin 9 10 Base Timer 4 TIOA4_1 Base timer ch.4 TIOA pin Base Timer 5 TIOA5_1 Base timer ch.5 TIOA pin Base Timer TIOA7_1 Base timer ch.7 TIOA pin TIOB7_1 Base timer ch.7 TIOB pin Debugger SWCLK Serial wire debug interface clock input pin SWDIO Serial wire debug interface data input/output pin SWO Serial wire viewer output pin TCK J-TAG test clock input pin TDI J-TAG test data input pin TDO J-TAG debug data output pin TMS J-TAG test mode input/output pin TRSTX J-TAG test reset pin External INT00_0 External interrupt request 00 input pin 2 2 Interrupt INT01_0 External interrupt request 01 input pin 3 3 INT02_0 4 4 External interrupt request 02 input pin INT02_ INT03_1 External interrupt request 03 input pin INT06_1 External interrupt request 06 input pin INT15_1 External interrupt request 15 input pin NMIX Non-Maskable Interrupt input pin DS v0-E

18 Pin No Module Pin name Function LQFP-48 QFN-48 LQFP-52 GPIO P P P General-purpose I/O port 0 P P P0F P P P General-purpose I/O port 1 P P P P P22 General-purpose I/O port P P P3A 6 7 P3B 7 8 P3C General-purpose I/O port P3D 9 10 P3E P3F P P General-purpose I/O port 4 P P4A P P51 General-purpose I/O port P P General-purpose I/O port 6 P P General-purpose I/O port 8 P PE PE2 General-purpose I/O port E PE DS v0-E 17

19 Pin No. Module Pin name Function LQFP-48 QFN-48 LQFP-52 Multi- SIN0_0 Multi-function serial interface ch.0 input function SIN0_1 pin Serial 0 Multifunction Serial 1 SOT0_0 (SDA0_0) SOT0_1 (SDA0_1) SCK0_0 (SCL0_0) SIN1_1 SOT1_1 (SDA1_1) SCK1_1 (SCL1_1) Multi-function serial interface ch.0 output pin. This pin operates as SOT0 when it is used in a UART/CSIO/LIN (operation modes 0 to 3) and as SDA0 when it is used in an I 2 C (operation mode 4). Multi-function serial interface ch.0 clock I/O pin. This pin operates as SCK0 when it is used in a CSIO (operation modes 2) and as SCL0 when it is used in an I 2 C (operation mode 4). Multi-function serial interface ch.1 input pin Multi-function serial interface ch.1 output pin. This pin operates as SOT1 when it is used in a UART/CSIO/LIN (operation modes 0 to 3) and as SDA1 when it is used in an I 2 C (operation mode 4). Multi-function serial interface ch.1 clock I/O pin. This pin operates as SCK1 when it is used in a CSIO (operation modes 2) and as SCL1 when it is used in an I 2 C (operation mode 4) DS v0-E

20 Pin No. Module Pin name Function LQFP-48 QFN-48 LQFP-52 Multi- Multi-function serial interface ch.3 input SIN3_1 function pin 2 2 Serial 3 Multi-function serial interface ch.3 output pin. 0 to 3) and as SDA3 when it is used in an I 2 C (operation mode 4). SOT3_1 This pin operates as SOT3 when it is used (SDA3_1) in a UART/CSIO/LIN (operation modes 3 3 Multifunction Serial 5 SCK3_1 (SCL3_1) SIN5_0 SOT5_0 Multi-function serial interface ch.3 clock I/O pin. This pin operates as SCK3 when it is used in a CSIO (operation modes 2) and as SCL3 when it is used in an I 2 C (operation mode 4). Multi-function serial interface ch.5 input pin Multi-function serial interface ch.5 output pin. This pin operates as SOT5 when it is used in a UART/LIN (operation modes 0, 1, 3) DS v0-E 19

21 Pin No Module Pin name Function LQFP-48 QFN-48 LQFP-52 Multi- DTTI0X_0 signal controlling wave form 5 6 function generator outputs RTO00 to RTO05 of Timer DTTI0X_2 multi-function timer bit free-run timer ch.0 external clock FRCK0_2 input pin IC00_ IC00_ bit input capture ch.0 input pin of IC01_ multi-function timer 0. IC02_0 ICxx describes channel number IC02_ IC03_ Wave form generator output pin of used in PPG0 output modes. RTO00_0 multi-function timer 0. (PPG00_0) This pin operates as PPG00 when it is 6 7 RTO01_0 (PPG00_0) RTO02_0 (PPG02_0) RTO03_0 (PPG02_0) RTO04_0 (PPG04_0) RTO05_0 (PPG04_0) Wave form generator output pin of multi-function timer 0. This pin operates as PPG00 when it is used in PPG0 output modes. Wave form generator output pin of multi-function timer 0. This pin operates as PPG02 when it is used in PPG0 output modes. Wave form generator output pin of multi-function timer 0. This pin operates as PPG02 when it is used in PPG0 output modes. Wave form generator output pin of multi-function timer 0. This pin operates as PPG04 when it is used in PPG0 output modes. Wave form generator output pin of multi-function timer 0. This pin operates as PPG04 when it is used in PPG0 output modes DS v0-E

22 Pin No Module Pin name Function LQFP-48 QFN-48 LQFP-52 Quadrature Position/ AIN0_2 QPRC ch.0 AIN input pin 2 2 Revolution Counter 0 BIN0_2 ZIN0_2 QPRC ch.0 BIN input pin QPRC ch.0 ZIN input pin Real-time RTCCO_ clock 0.5 seconds pulse output pin of Real-time RTCCO_ clock RTCCO_2 6 7 SUBOUT_ SUBOUT_1 Sub clock output pin SUBOUT_2 6 7 Low Power Consumption Mode USB WKUP0 Deep stand-by mode return signal input pin WKUP1 Deep stand-by mode return signal input pin WKUP2 Deep stand-by mode return signal input pin WKUP3 Deep stand-by mode return signal input pin UDM0 USB ch.0 function/host D pin UDP0 USB ch.0 function/host D + pin UHCONX USB external pull-up control pin DS v0-E 21

23 Pin No Module Pin name Function LQFP-48 QFN-48 LQFP-52 RESET External Reset pin. INITX A reset is valid when INITX="L" Mode Mode 0 pin. MD0 During normal operation, MD0="L" must be input. During serial programming to Flash memory, MD0="H" must be input MD1 Mode 1 pin. During serial programming to Flash memory, MD1="L" must be input. POWER VCC Power supply Pin 1 1 VCC Power supply Pin USBVCC 3.3V Power supply port for USB I/O GND VSS GND Pin VSS GND Pin VSS GND Pin CLOCK X0 Main clock (oscillation) input pin X0A Sub clock (oscillation) input pin X1 Main clock (oscillation) I/O pin X1A Sub clock (oscillation) I/O pin CROUT_1 CR-osc clock output port ADC POWER ADC GND C pin NC pin AVCC A/D converter analog power pin AVRH A/D converter analog reference voltage input pin AVSS A/D converter GND pin C Power stabilization capacity pin NC NC NC NC NC pin. NC pin should be kept open. NC pin. NC pin should be kept open. NC pin. NC pin should be kept open. NC pin. NC pin should be kept open DS v0-E

24 I/O CIRCUIT TYPE Type Circuit Remarks A It is possible to select the main oscillation / GPIO function X1 P-ch P-ch Digital output When the main oscillation is selected. Oscillation feedback resistor : Approximately 1MΩ With Standby mode control R N-ch Digital output Pull-up resistor control Digital input Standby mode Control When the GPIO is selected. CMOS level output. CMOS level hysteresis input With pull-up resistor control With standby mode control Pull-up resistor : Approximately 50kΩ I OH = -4mA, I OL = 4mA Clock input Standby mode Control Digital input Standby mode Control R X0 P-ch P-ch Digital output N-ch Digital output Pull-up resistor control B Pull-up resistor CMOS level hysteresis input Pull-up resistor : Approximately 50kΩ Digital input DS v0-E 23

25 Type Circuit Remarks C Open drain output Digital input CMOS level hysteresis input N-ch Digital output D It is possible to select the sub oscillation / GPIO function X1A P-ch P-ch Digital output When the sub oscillation is selected. Oscillation feedback resistor : Approximately 5MΩ With Standby mode control R N-ch Digital output Pull-up resistor control Digital input Standby mode Control Clock input When the GPIO is selected. CMOS level output. CMOS level hysteresis input With pull-up resistor control With standby mode control Pull-up resistor : Approximately 50kΩ I OH = -4mA, I OL = 4mA Standby mode Control Digital input Standby mode Control R X0A P-ch P-ch Digital output N-ch Digital output Pull-up resistor control 24 DS v0-E

26 Type Circuit Remarks E CMOS level output CMOS level hysteresis input With pull-up resistor control P-ch P-ch Digital output With standby mode control Pull-up resistor : Approximately 50kΩ I OH = -4mA, I OL = 4mA R N-ch Digital output Pull-up resistor control Digital input Standby mode Control F P-ch P-ch N-ch Digital output Digital output CMOS level output CMOS level hysteresis input With input control Analog input With pull-up resistor control With standby mode control Pull-up resistor : Approximately 50kΩ I OH = -4mA, I OL = 4mA R Pull-up resistor control Digital input Standby mode Control Analog input control DS v0-E 25

27 Type Circuit Remarks G CMOS level output CMOS level hysteresis input With pull-up resistor control With standby mode control P-ch P-ch Digital output Pull-up resistor : Approximately 50kΩ I OH = -12mA, I OL = 12mA R N-ch Digital output Pull-up resistor control Digital input Standby mode Control H GPIO Digital output It is possible to select the USB I/O / GPIO function. UDP/P81 UDM/P80 Differential GPIO Digital input/output direction GPIO Digital input GPIO Digital input circuit control UDP output USB Full-speed/Low-speed control UDP input Differential input USB/GPIO select UDM input UDM output When the USB I/O is selected. Full-speed, Low-speed control When the GPIO is selected. CMOS level output CMOS level hysteresis input With standby mode control I OH = -20.5mA, I OL = 18.5mA USB Digital input/output direction GPIO Digital input GPIO Digital input/output direction GPIO Digital input GPIO Digital input circuit control 26 DS v0-E

28 Type Circuit Remarks I CMOS level output CMOS level hysteresis input 5V tolerant With pull-up resistor P-ch P-ch Digital output control With standby mode control Pull-up resistor : Approximately 50kΩ I OH = -4mA, I OL = 4mA N-ch Digital output Available to control of PZR registers. R Pull-up resistor control Digital input Standby mode Control J CMOS level hysteresis input Mode input DS v0-E 27

29 HANDLING PRECAUTIONS Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This page describes precautions that must be observed to minimize the chance of failure and to obtain higher reliability from your FUJITSU SEMICONDUCTOR semiconductor devices. 1. Precautions for Product Design This section describes precautions when designing electronic equipment using semiconductor devices. Absolute Maximum Ratings Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of certain established limits, called absolute maximum ratings. Do not exceed these ratings. Recommended Operating Conditions Recommended operating conditions are normal operating ranges for the semiconductor device. All the device's electrical characteristics are warranted when operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their sales representative beforehand. Processing and Protection of Pins These precautions must be followed when handling the pins which connect semiconductor devices to power supply and input/output functions. (1) Preventing Over-Voltage and Over-Current Conditions Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to prevent such overvoltage or over-current conditions at the design stage. (2) Protection of Output Pins Shorting of output pins to supply pins or other output pins, or connection to large capacitance can cause large current flows. Such conditions if present for extended periods of time can damage the device. Therefore, avoid this type of connection. (3) Handling of Unused Pins Unconnected input pins with very high impedance levels can adversely affect stability of operation. Such pins should be connected through an appropriate resistance to a power supply pin or ground pin. Latch-up Semiconductor devices are constructed by the formation of P-type and N-type areas on a substrate. When subjected to abnormally high voltages, internal parasitic PNPN junctions (called thyristor structures) may be formed, causing large current levels in excess of several hundred ma to flow continuously at the power supply pin. This condition is called latch-up. CAUTION: The occurrence of latch-up not only causes loss of reliability in the semiconductor device, but can cause injury or damage from high heat, smoke or flame. To prevent this from happening, do the following: (1) Be sure that voltages applied to pins do not exceed the absolute maximum ratings. This should include attention to abnormal noise, surge levels, etc. (2) Be sure that abnormal current flows do not occur during the power-on sequence. Code: DS Ea 28 DS v0-E

30 Observance of Safety Regulations and Standards Most countries in the world have established standards and regulations regarding safety, protection from electromagnetic interference, etc. Customers are requested to observe applicable regulations and standards in the design of products. Fail-Safe Design Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Precautions Related to Usage of Devices FUJITSU SEMICONDUCTOR semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. 2. Precautions for Package Mounting Package mounting may be either lead insertion type or surface mount type. In either case, for heat resistance during soldering, you should only mount under FUJITSU SEMICONDUCTOR's recommended conditions. For detailed information about mount conditions, contact your sales representative. Lead Insertion Type Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct soldering on the board, or mounting by using a socket. Direct mounting onto boards normally involves processes for inserting leads into through-holes on the board and using the flow soldering (wave soldering) method of applying liquid solder. In this case, the soldering process usually causes leads to be subjected to thermal stress in excess of the absolute ratings for storage temperature. Mounting processes should conform to FUJITSU SEMICONDUCTOR recommended mounting conditions. If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can lead to contact deterioration after long periods. For this reason it is recommended that the surface treatment of socket contacts and IC leads be verified before mounting. Surface Mount Type Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results in increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges. You must use appropriate mounting techniques. FUJITSU SEMICONDUCTOR recommends the solder reflow method, and has established a ranking of mounting conditions for each product. Users are advised to mount packages in accordance with FUJITSU SEMICONDUCTOR ranking of recommended conditions. DS v0-E 29

31 Lead-Free Packaging CAUTION: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic soldering, junction strength may be reduced under some conditions of use. Storage of Semiconductor Devices Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions will cause absorption of moisture. During mounting, the application of heat to a package that has absorbed moisture can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To prevent, do the following: (1) Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product. Store products in locations where temperature changes are slight. (2) Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at temperatures between 5 C and 30 C. When you open Dry Package that recommends humidity 40% to 70% relative humidity. (3) When necessary, FUJITSU SEMICONDUCTOR packages semiconductor devices in highly moisture-resistant aluminum laminate bags, with a silica gel desiccant. Devices should be sealed in their aluminum laminate bags for storage. (4) Avoid storing packages where they are exposed to corrosive gases or high levels of dust. Baking Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU SEMICONDUCTOR recommended conditions for baking. Condition: 125 C/24 h Static Electricity Because semiconductor devices are particularly susceptible to damage by static electricity, you must take the following precautions: (1) relative humidity in the working environment between 40% and 70%. Use of an apparatus for ion generation may be needed to remove electricity. (2) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment. (3) Eliminate static body electricity by the use of rings or bracelets connected to ground through high resistance (on the level of 1 MΩ). Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to minimize shock loads is recommended. (4) Ground all fixtures and instruments, or protect with anti-static measures. (5) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board assemblies. 30 DS v0-E

32 3. Precautions for Use Environment Reliability of semiconductor devices depends on ambient temperature and other conditions as described above. For reliable performance, do the following: (1) Humidity Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high humidity levels are anticipated, consider anti-humidity processing. (2) Discharge of Static Electricity When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation. In such cases, use anti-static measures or processing to prevent discharges. (3) Corrosive Gases, Dust, or Oil Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to protect the devices. (4) Radiation, Including Cosmic Radiation Most devices are not designed for environments involving exposure to radiation or cosmic radiation. Users should provide shielding as appropriate. (5) Smoke, Flame CAUTION: Plastic molded devices are flammable, and therefore should not be used near combustible substances. If devices begin to smoke or burn, there is danger of the release of toxic gases. Customers considering the use of FUJITSU SEMICONDUCTOR products in other special environmental conditions should consult with sales representatives. Please check the latest handling precautions at the following URL. DS v0-E 31

33 HANDLING DEVICES Power supply pins In products with multiple VCC and VSS pins, respective pins at the same potential are interconnected within the device in order to prevent malfunctions such as latch-up. However, all of these pins should be connected externally to the power supply or ground lines in order to reduce electromagnetic emission levels, to prevent abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the total output current rating. Moreover, connect the current supply source with each Power supply pins and GND pins of this device at low impedance. It is also advisable that a ceramic capacitor of approximately 0.1 µf be connected as a bypass capacitor between each Power supply pins and GND pins near this device. Crystal oscillator circuit Noise near the X0/X1 and X0A/X1A pins may cause the device to malfunction. Design the printed circuit board so that X0/X1, X0A/X1A pins, the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as close to the device as possible. It is strongly recommended that the PC board artwork be designed such that the X0/X1 and X0A/X1A pins are surrounded by ground plane as this is expected to produce stable operation. Using an external clock When using an external clock, the clock signal should be input to the X0, X0A pin only and the X1, X1A pin should be kept open. Example of Using an External Clock Device X0(X0A) Open X1(X1A) Handling when using Multi-function serial pin as I 2 C pin If it is using Multi-function serial pin as I 2 C pins, P-ch transistor of digital output is always disable. However, I 2 C pins need to keep the electrical characteristic like other pins and not to connect to external I 2 C bus system with power OFF. 32 DS v0-E

34 C pin As this series includes an internal regulator, always connect a bypass capacitor of approximately 4.7 µf to the C pin for use by the regulator. Device C VSS 4.7μF GND Mode pins (MD0) Connect the MD pin (MD0) directly to VCC or VSS pins. Design the printed circuit board such that the pull-up/down resistance stays low, as well as the distance between the mode pins and VCC pins or VSS pins is as short as possible and the connection impedance is low, when the pins are pulled-up/down such as for switching the pin level and rewriting the Flash memory data. It is because of preventing the device erroneously switching to test mode due to noise. NC pins NC pin should be kept open. Notes on power-on Turn power on/off in the following order or at the same time. If not using the A/D converter, connect AVCC =VCC and AVSS = VSS. Turning on :VCC USBVCC VCC AVCC AVRH Turning off : USBVCC VCC AVRH AVCC VCC Serial Communication There is a possibility to receive wrong data due to the noise or other causes on the serial communication. Therefore, design a printed circuit board so as to avoid noise. Consider the case of receiving wrong data due to noise, perform error detection such as by applying a checksum of data at the end. If an error is detected, retransmit the data. Differences in features among the products with different memory sizes and between Flash products and MASK products The electric characteristics including power consumption, ESD, latch-up, noise characteristics, and oscillation characteristics among the products with different memory sizes and between Flash products and MASK products are different because chip layout and memory structures are different. If you are switching to use a different product of the same series, please make sure to evaluate the electric characteristics. Pull-Up function of 5V tolerant I/O Please do not input the signal more than VCC voltage at the time of Pull-Up function use of 5V tolerant I/O. DS v0-E 33

35 BLOCK DIAGRAM TRSTX,TCK, TDI,TMS TDO INITX SWJ-DP ROM Table Cortex-M3 MHz(Max) Dual-Timer Clock Reset Generator Watchdog Timer (Hardware) CSV NVIC Watchdog Timer (Software) I D Sys AHB-APB Bridge: APB0(Max 42 MHz) Multi-layer AHB (Max 42 MHz) MainFlash I/F Security WorkFlash I/F USB2.0 (Host/ Func) SRAM0 8 Kbyte SRAM1 8 Kbyte MainFlash 64 Kbyte/ 128 Kbyte WorkFlash 32 Kbyte DMAC 4ch. PHY UDP0,UDM0 UHCONX CLK RST X0 X1 X0A X1A Main Osc Sub Osc PLL CR 4 MHz CR 100 khz AHB-AHB Bridge AVCC, AVSS, AVRH AN[07:00] ADTG_2 12-bit A/D Converter Unit 0 Unit 1 USB Clock Ctrl LVD Ctrl PLL Power-On Reset LVD TIOAx TIOBx Base Timer 16-bit 8ch./ 32-bit 4ch. Deep Standby Ctrl Regulator C WKUP[3:0] AIN0 BIN0 ZIN0 IC0x FRCKx QPRC 1ch. A/D Activation Compare 3ch. 16-bit Capture 4ch. 16-bit Free-Run Timer 3ch. 16-bit Output Compare 6ch. AHB-APB Bridge : APB1 (Max 42 MHz) AHB-APB Bridge : APB2 (Max 42 MHz) Real-Time Clock IRQ-Monitor CRC Accelerator Watch Counter External Interrupt Controller 6-pin + NMI MODE-Ctrl RTCCO, SUBOUT INTx NMIX MD[1:0] DTTI0X RTOx Waveform Generator 3ch. 16-bit PPG 3ch. Multi-Function Timer GPIO Multi-Function Serial I/F 4ch. (with FIFO ch.0 - ch.1) PIN-Function-Ctrl P0x, P1x,... PFx SCKx SINx SOTx MEMORY SIZE See " Memory size" in " PRODUCT LINEUP" to confirm the memory size. 34 DS v0-E

36 MEMORY MAP Memory Map (1) 0x41FF_FFFF Peripherals Area Reserved 0xFFFF_FFFF Reserved 0x4006_1000 0x4006_0000 DMAC 0xE010_0000 0xE000_0000 Cortex-M3 Private Peripherals 0x4005_0000 0x4004_0000 Reserved USB ch.0 Reserved 0x4003_C000 External Device Area 0x4003_B000 0x4003_A000 0x4003_9000 0x4003_8000 RTC Watch Counter CRC MFS 0x6000_0000 0x4400_0000 0x4200_0000 0x4000_0000 Reserved 32Mbyte Bit band alias Peripherals 0x4003_7000 0x4003_6000 0x4003_5000 0x4003_4000 0x4003_3000 0x4003_2000 0x4003_1000 0x4003_0000 Reserved USB Clock Ctrl LVD/DS mode Reserved GPIO Reserved Int-Req. Read EXTI 0x4002_F000 Reserved Reserved 0x4002_E000 CR Trim 0x2400_0000 0x2200_0000 0x200E_1000 0x200E_0000 0x200C_ Mbyte Bit band alias Reserved WorkFlash I/F WorkFlash 0x4002_8000 0x4002_7000 0x4002_6000 0x4002_5000 0x4002_4000 Reserved A/DC QPRC Base Timer PPG 0x2008_0000 0x2000_0000 Reserved SRAM1 Reserved See the next page " Memory Map (2)" for the memory size details. 0x1FFF_0000 0x0010_2000 0x0010_0000 SRAM0 Reserved Security/CR Trim 0x4002_1000 0x4002_0000 0x4001_6000 0x4001_5000 MFT unit0 Reserved Dual Timer 0x4001_3000 Reserved MainFlash 0x4001_2000 SW WDT 0x0000_0000 0x4001_1000 0x4001_0000 HW WDT Clock/Reset 0x4000_1000 Reserved 0x4000_0000 MainFlash I/F DS v0-E 35

37 Memory Map (2) MB9AF312K MB9AF311K 0x200E_0000 0x200E_0000 Reserved Reserved 0x200C_8000 0x200C_8000 0x200C_0000 WorkFlash 32Kbyte 0x200C_0000 WorkFlash 32Kbyte Reserved Reserved 0x2000_2000 0x2000_2000 0x2000_0000 SRAM1 8Kbyte 0x2000_0000 SRAM1 8Kbyte 0x1FFF_E000 SRAM0 8Kbyte 0x1FFF_E000 SRAM0 8Kbyte Reserved Reserved 0x0010_2000 0x0010_2000 0x0010_1000 CR trimming 0x0010_1000 CR trimming 0x0010_0000 Security 0x0010_0000 Security Reserved Reserved 0x0002_0000 MainFlash 0x0001_0000 0x0000_ Kbyte 0x0000_0000 MainFlash 64Kbyte 36 DS v0-E

38 Peripheral Address Map Start address End address Bus Peripherals 0x4000_0000 0x4000_0FFF MainFlash I/F register AHB 0x4000_1000 0x4000_FFFF Reserved 0x4001_0000 0x4001_0FFF Clock/Reset Control 0x4001_1000 0x4001_1FFF Hardware Watchdog timer 0x4001_2000 0x4001_2FFF Software Watchdog timer APB0 0x4001_3000 0x4001_4FFF Reserved 0x4001_5000 0x4001_5FFF Dual-Timer 0x4001_6000 0x4001_FFFF Reserved 0x4002_0000 0x4002_0FFF Multi-function timer unit0 0x4002_1000 0x4002_3FFF Reserved 0x4002_4000 0x4002_4FFF PPG 0x4002_5000 0x4002_5FFF Base Timer 0x4002_6000 0x4002_6FFF APB1 Quadrature Position/Revolution Counter 0x4002_7000 0x4002_7FFF A/D Converter 0x4002_8000 0x4002_DFFF Reserved 0x4002_E000 0x4002_EFFF CR trimming 0x4002_F000 0x4002_FFFF Reserved 0x4003_0000 0x4003_0FFF External Interrupt Controller 0x4003_1000 0x4003_1FFF Interrupt Request Batch-Read Function 0x4003_2000 0x4003_2FFF Reserved 0x4003_3000 0x4003_3FFF GPIO 0x4003_4000 0x4003_4FFF Reserved 0x4003_5000 0x4003_57FF Low-Voltage Detector 0x4003_5800 0x4003_5FFF Deep stand-by mode Controller APB2 0x4003_6000 0x4003_6FFF USB clock generator 0x4003_7000 0x4003_7FFF Reserved 0x4003_8000 0x4003_8FFF Multi-function serial Interface 0x4003_9000 0x4003_9FFF CRC 0x4003_A000 0x4003_AFFF Watch Counter 0x4003_B000 0x4003_BFFF Real-time clock 0x4003_C000 0x4003_FFFF Reserved 0x4004_0000 0x4004_FFFF USB ch.0 0x4005_0000 0x4005_FFFF Reserved 0x4006_0000 0x4006_0FFF AHB DMAC register 0x4006_1000 0x41FF_FFFF Reserved 0x200E_0000 0x200E_FFFF WorkFlash I/F register DS v0-E 37

39 PIN STATUS IN EACH CPU STATE The terms used for pin status have the following meanings. INITX=0 This is the period when the INITX pin is the "L" level. INITX=1 This is the period when the INITX pin is the "H" level. SPL=0 This is the status that standby pin level setting bit (SPL) in standby mode control register (STB_CTL) is set to "0". SPL=1 This is the status that standby pin level setting bit (SPL) in standby mode control register (STB_CTL) is set to "1". Indicates that the input function can be used. at "0" This is the status that the input function cannot be used. input is fixed at "L". Hi-Z Indicates that the output drive transistor is disabled and the pin is put in the Hi-Z. Setting disabled Indicates that the setting is disabled. s the that was immediately prior to entering the current mode. If a built-in peripheral function is operating, the output follows the peripheral function. If the pin is being used as a port, that output is maintained. Analog input is Indicates that the analog input is. GPIO selected In Deep stand-by mode, pins switch to the general-purpose I/O port. 38 DS v0-E

40 List of Pin Status Pin status type A Function group GPIO selected Main crystal oscillator input pin Power-on reset or low-voltage detection INITX input Device internal reset Run mode or sleep mode Timer mode, RTC mode, or sleep mode Deep stand-by RTC mode or Deep stand-by STOP mode Return from Deep stand-by mode Power supply unstable Power supply stable Power supply stable Power supply stable Power supply stable Power supply stable - INITX = 0 INITX = 1 INITX = 1 INITX = 1 INITX = 1 INITX = SPL = 0 SPL = 1 SPL = 0 SPL = 1 - Setting Setting Setting disabled disabled disabled at "0" at "0" GPIO selected Setting disabled Setting disabled Setting disabled at "0" at "0" B Main crystal oscillator output pin Hi-Z/ input fixed at "0"/ or enable at "0" at "0" /When /When /When /When /When oscillation oscillation oscillation oscillation oscillation stop* 1,Hi-Z/ stop* 1,Hi-Z/ stop* 1,Hi-Z/ stop* 1,Hi-Z/ stop* 1,Hi-Z// at "0" at "0" at "0" at "0" at "0" C INITX input pin Pull-up / Pull-up / Pull-up / Pull-up / Pull-up / Pull-up / Pull-up / Pull-up / Pull-up / D Mode input pin E JTAG selected GPIO selected Hi-Z Setting disabled Pull-up / Setting disabled Pull-up / Setting disabled at "0" at "0" DS v0-E 39

41 Pin status type F G H I Function group WKUP Analog input selected External interrupt selected Resource other than above selected GPIO selected WKUP External interrupt selected Resource other than above selected GPIO selected External interrupt selected Resource other than above selected GPIO selected resource selected GPIO selected Power-on reset or low-voltage detection INITX input Device internal reset Run mode or sleep mode Timer mode, RTC mode, or sleep mode Deep stand-by RTC mode or Deep stand-by STOP mode Return from Deep stand-by mode Power supply unstable Power supply stable Power supply stable Power supply stable Power supply stable Power supply stable - INITX = 0 INITX = 1 INITX = 1 INITX = 1 INITX = 1 INITX = SPL = 0 SPL = 1 SPL = 0 SPL = 1 - WKUP Setting Setting Setting WKUP GPIO input disabled disabled disabled input selected Hi-Z at "0" / at "0" / at "0" / at "0" / at "0" / at "0" / at "0" / at "0" / Analog Analog Analog Analog Analog Analog Analog Analog input input input input input input input input GPIO GPIO selected selected Setting Setting Setting disabled disabled disabled at "0" at "0" WKUP Setting Setting Setting WKUP GPIO input disabled disabled disabled input selected Setting Setting Setting disabled disabled disabled GPIO GPIO selected selected Hi-Z at "0" at "0" Setting Setting Setting disabled disabled disabled GPIO GPIO selected selected Hi-Z at "0" at "0" Hi-Z GPIO GPIO selected selected at "0" at "0" 40 DS v0-E