CPSC 121: Models of Computation

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1 Instructor: Bob Woodham Department of Computer Science University of British Columbia Lecture Notes 2009/2010, Section 203

2 Menu March 22, 2010 Topics: A Simple Computer High-level design Pre-class reading: Today: Review Lab 1 On-line handouts (links given) Wikipedia articles (links given) Reminders: No new lab this week (midterm week) 2nd Midterm Wednesday, March 24, 7:00 8:00pm Final exam Thursday, Apr 29, noon, OSBO A Bob s course office hours, Friday, 10:30 noon, ICCS 119 Bring iclickers to class READ the WebCT Vista course announcements board www: WebCT Vista:

3 Suggested Wikipedia Articles... 1 A processor register 2 The Fetch-Decode-Execute Instruction Cycle with links to descriptions of: 1 the Program Counter (PC) 2 the Instruction Register (IR) 3 an opcode 4 the Arithmetic Logic Unit (ALU) 3 A central processing unit s machine code 4 microcode 5 main memory

4 A Simple Computer (cont d) In-class discussion of the simple computer makes use of the following on-line handouts: 1 Annotated version of cpu.v 2 Summary of Opcodes for our CPU 3 A Simple Program 4 Data Bus Operation

5 Simple Computer: Major Components The simple computer has four major components: 1 Memory where data and instructions are stored 2 Program Counter (PC) location (in memory) where the next instruction to execute comes from 3 microcontroller (the traffic cop ) route data to/from other components ensure that instructions are performed correctly 4 Arithmetic Logic Unit (ALU) where data manipulation occurs (e.g., add, subtract, multiply, divide, remainder)

6 Simple Computer: Data Pathways All registers and data communication are based on fixed width, n-bit data pathways. There are two major data pathways: 1 a 32-bit wide data bus 2 a 16-bit wide control bus

7 Simple Computer: Special Purpose Registers There are several special purpose registers that are central to the simple computer s operation. Two are: 1 Accumulator (ACC) (32 bits) stores one of the operands and receives the result of all ALU operations 2 Program Counter (PC) (32 bits) location (in memory) where the next instruction to execute comes from

8 A Fetch Decode Execute (FDE) Computer Here are the three steps (repeated) by a FDE machine: 1 Fetch (i.e., read) the next machine language instruction to execute 2 Decode the machine language instruction to determine what is to be done (i.e., what the instruction requires) what additional data, if any, is required (from memory) to execute the instruction 3 Execute the microcode instructions to complete the executions of the original machine language instruction Steps 1, 2 and 3 repeat indefinitely...

9 Simple Computer: Memory read/write random access memory (RAM) bits implemented with flip-flops (as we have seen) we re going to want lots of bits... organize bits of memory into 32 bit words each 32 bit word has a (numeric) memory address refer (sequentially) to memory location 0, memory location 1,...

10 Simple Computer: Memory Address Register There are several special purpose registers that are central to the simple computer s operation. A third is: 3 Memory Address Register (MAR) (32 bits) the 32 bit address of the word in memory selected for read or write The Memory Address Register (MAR) is a register in the memory module

11 Simple Computer: Arithmetic Logic Unit (ALU) performs what we typically think of as computations ALU performs (32 bit integer) +,,,, mod (aka remainder) ALU has (only) one special purpose register, a 32 bit Accumulator (ACC)

12 Simple Computer: microcontroller and Program Counter (PC) the microcontroller implements the FSM to: perform the fetch step perform the decode step control the execute step includes the Program Counter (PC) (32 bits) location (in memory) where the next instruction to execute comes from

13 Simple Computer: Instruction Register There are several special purpose registers that are central to the simple computer s operation. A fourth is: 4 Instruction Register (IR) (32 bits) contains the instruction currently being decoded/executed The Instruction Register (IR) is a register in the microcontroller module

14 Simple Computer and TkGate TkGate lets us: load instructions and data from a file into the simple computer s memory (RAM) load instructions and data from a file into the simple computer s microcontroller memory (ROM)

Example: NFA to DFA Conversion

CPSC 121 Lecture 36 April 8, 2009 Menu April 8, 2009 Topics: Example: NFA to DFA Conversion Final Reading List Summary The End! Reminders: On-line Quiz 12 deadline 5:00pm TODAY Teaching evaluation survey