The User-defined Modeling Method of Power System Components Based on RTDS-CBuilder

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1 Energy nd Power Engineering, 2013, 5, doi: /epe b101 Published Online July 2013 ( he User-deined Modeling Method o Power System Components Bsed on RDS-CBuilder Yi Wng 1, Sh Li 2, Yuln Hu 1, Rnrn An 1, Jing Wu 2, Jimn Li 2, Zexing Ci 2 1 Eletri Power Reserh Institute, Gungdong Power Grid Corportion, Gungzhou, Gungdong, Chin 2 South Chin University o ehnology, Gungzhou, Gungdong, Chin Emil: mr-wngyi@163.om, L.s07@mil.sut.edu.n, nrnrn85@163.om, wujinghppy@126.om, li.jimn@mil.sut.edu.n, epzxi@sut.edu.n Reeived Mrh, 2013 ABSRAC his pper puts orwrd method to design the user-deined omponent bsed on the user-deined modeling environment CBuilder o RDS simultor. And lso develops the user-deined omponent model with lgorithm desribed by C lnguge, visul grphis pperne, nd the omponent untion. And it genertes the dynmi link librry whih hs the sme exeution eiieny s tht o the inluded model o RDS. his pper tkes the IEEE type EXS1 stti exittion system s n exmple to build the user-deined omponent. he losed-loop tests on the user-deined omponent nd the inluded one o RDS re perormed to exmine the ury o the proposed method. By omprison, the test results show tht the externl hrteristis o the user-deined omponent nd the inluded model o RDS re bsilly the sme in the initiliztion proess, the step proess o the terminl voltge reerene vlue nd the se o the lrge disturbne. Keywords: Rel ime Digitl Simultor; CBuilder; User Deine Component; Control Component; Closed-loop est 1. Introdution New omponents nd system ontrol tehnique re onstntly pplied to power system in reent yers. he power system simultion tehnique should be ble to lexibility provides vrious models o system devies, inluding new regulting, protetive devies, et [1]. he model o power system omponents in simultion tools ws oded ording to speii lgorithms nd then pkged, so tht the user is not ble to lter it [2]. Consequently, when the exiting omponents in sotwre omponent librry re unble to meet the user s tul simultion requirements or primry nd seondry equipments or ontrol strtegy, it is neessry or the simultion tools to provide the user with uniorm user-deined omponent modeling pltorm. hus it n enrih the models o simultion tools nd improve the bility nd eiieny o simultions. Reerene [3], modeled on the Line trveling wve protetion o n tul DC trnsmission projet, nd presents user-deined modeling method bsed on PSCAD/EMDC nd the pplition in DC line protetion simultion. In order to solve the problem tht the deult DC trnsmission model is unble to desribe the tul DC trnsmission eture in eletromehnil trnsient simultion o lrge-sle AC/DC power system, reerene [4] put orwrds the onept o DC system user-deined modeling using PSASP. Reerene [5] presented the user-deined modeling method nd the proedures o PSS/E in onventionl nd expnded trnsient simultion, nd userdeined model o exittion system ws then developed. Among vrious kinds o power system simultion tools, RDS is the most generl power system rel-time digitl simultor. Its user-deined modeling untion omponent CBuilder stisies users demnds or speii models. Reerene [6, 7] developed the eletromehnil trnsient simultion model nd the rel-time simultion model o eletroni urrent trnsduer with the ir-ore oil respetively. In this pper, the CBuilder modeling priniples nd proess ws nlyzed nd introdued, nd the user-deined omponent model ws lso built bsed on the previous work. 2. RDS-CBuilder User-deined Modeling Developing Environment CBuilder implement the user-deined omponent untion by tking C lnguge-like progrm ode s progrm ode. And the CBuilder pltorm interes utomtilly with RDS simultion progrm nd user model librry. he user-deined C-like odes implnt into the RDS min untion vi omponents, with no need to ompile

2 528 Y. WANG E AL. or ll the externl subprogrm requently [8]. CBuilder user-deined modeling pltorm minly inlude the editing methods suh s grphis, prmeters, IO Points nd C File Assoitions. hese editing methods deine the pperne, untion prmeters, IO Points nd mthemtil models o user-deined omponents. Model. ile progrm ode ompiled by the C FILE Assoitions is the ore o the user-deined omponent. Codes o res like SAIC RAM CODE deine nd relize the reltive omponent lultion o the s by lultion. It will generte exeutble iles utomtilly or the user to ll ter the ile ws ompiled suessully. 3. RDS-CBuilder User-deined Modeling Method In order to build the user-deined omponent onisely nd normtively, the developing proess o user-deined omponent designed in this pper is shown in Figure 1, ording to the hrteristis o the user-deined modeling pltorm editing environment. CBuilder untion module n build two kinds o models, the power system omponent nd the ontrol omponent. In most o the simultion test senes, the existing power system omponents in RDS omponent librry n bsilly stisy the test requirements. However, with the booming o the new ontrol equipment, the demnds to model the ontrol user-deined omponent in RDS system grdully inrese. Dispensed with network solving, the progrm ode o the ontrol omponent is muh esier in omprison with tht o the power system omponent, nd it ets the rel-time muh lesser. hereore, this pper tkes the IEEE type EXS1 stti exittion system o the genertor ontrol omponent s n exmple nd introdues the bsi pproh or RDS modeling Apperne Design o Component Model he logi blok digrm o the IEEE type EXS1 stti exittion system is shown in Figure 2. Aording to Figure 2, the exittion system hs 3 input vribles, inluding per unit voltge o genertor bus VPU, PSS input V s, exiting urrent I, nd n E output vrible o exittion voltge, et. It n selet by ondition whether we need the PSS input vluble or not ording to requirements o the test. On the bsis o the exterior pttern o exittion system in the RDS omponent librry, in the editing environment o the IEEE type EXS1 stti exittion system designed in this pper is shown in Figure Prmeters Design o Component Model he exittion system minly onsists o omponents suh s dierene djustment unit, mpliier unit nd mplitude limittion unit [9]. As Figure 2 shows, the min prmeters inside the IEEE type EXS1 stti exittion system is shown in ble 1. As the reerene voltge t the genertor terminl Vre is n djustble vrible, it should hnge in line with vrious power systems opertion modes. hereore, slider ontrol vrible should be set in the C File Assoitions editing environment, so tht it n be lled nd instlled on the RDS user-deined rel time operting nd monitor intere RUNIME. Menwhile, we set the bove internl prmeter besides Vre in the prmeters editing environment o CBuilder. Moreover, we set the prmeters inluding system nme, PSS seleted vrible, monitor internl vrible resoure llotion o the proessor bord, et. Detils re shown in Figure 4. Figure 2. Logi digrm o IEEE type EXS1. Figure 1. Development proess o CBuilder UDC. Figure 3. Apperne design o IEEE type EXS1.

3 Y. WANG E AL. 529 Prmeter b ble 1. Prmeters o IEEE type EXS1. Desription ime onstnt o the ilter V Reerened operting voltge t genertor terminl re V Mximum voltge inside the system i i mx V Minimum voltge inside the system min K,, K K Gin mgniition o the system ime onstnt o the mpliier ime onstnt o the stble loop Gin o the stble loop Lod tor o ommuttion retne retiier V Mximum output mplitude limit mx V Minimum output mplitude limit min As Figure 2 shows, the IEEE type EXS1 stti exittion system onsist o the mplitude limit unit, the trnser untion o inertil element, the trnser untion tul dierentition element, the dd nd subtrt unit, et. wo types o these trnser untions n be desribed s simultneous o dierentil eqution nd lgebri eqution in their mthemtil models. Yet, solution o the dierentil eqution is prtiulrly signiint or the exeution eiieny o the omponent progrm. For the simultion with miroseond lultion step, it n mintin the stbility o the vlue by using expliit solution. In ddition, there is no need to solve the eqution, so it redues the mount o lultion [10]. hereore, this pper tkes the inertil element 1/(1 s ) s n exmple to progrm it using three expliit solutions. hese three solutions or dierentil equtions re shown in ble 2, where R nd C re input nd output o the equtions, is the time onstnt, nd t is the simultion step. In this setion, we build the user-deined omponent model o inertil element 1/(1 s ). In the RDS/Drt ile, or the tringulr o the inluded model in RDS omponent librry nd the 3 user-deined omponent models, whih hve the input requeny 50 Hz nd the mplitude 0.8 pu, we uniormly set the time onstnt o eh omponent model s 2 s, set the simultion step s 50 μs, nd set the reltive simultion time s 4 s. We nlyze the output dt o eh model with the simultion time in the viinity o 4s, s ble 3 shows. We n see rom the bove tble, while the simultion step is set s 50 μs nd the simultion time is set s 4 s, the irst 4 signiint digits o the simultion results rom these three lgorithms re the sme, nd the simultion results re reltively lose. Comprtively speking, ble 2. Dierentil eqution s solution o inerti link. Solutions or dierentil equtions Expliit solution ormul Figure 4. Prmeter design o IEEE type EXS1. Ater the bove prmeters were designed nd stored, the prmeters will be stored in the C File Assoitions editing environment o this user-deined omponent utomtilly, so tht the results n be edited nd lled by the model. ile nd the model.h ile Code Design o Component Model EMDC Euler Mod-Euler t t t e R( 1 e t t [ R( t t ] t C( t [ R( t t ] t Cb( t [ R( C( ] C ( C ( / 2 ble 3. Simultion results o inerti link. ime (s) RDS EMDC Euler Mod-Euler b

4 530 Y. WANG E AL. ompred with the user-deined omponent o Mod- Euler nd Euler method, the user-deined omponent using EMDC lgorithm hs the simultion results whih is loser to tht o the trnser untion module RDS omes with. hereore, in this pper, we solve these 3 types o trnser untions ontined in the IEEE type EXS1 stti exittion system by using the solutions or dierentil equtions provided by EMDC. he solution ormuls re shown in ble 4 shows, where R nd C re input nd output o the eqution, is the time onstnt, nd t is the simultion step. Moreover, the progrmed methods o the mplitude limit unit nd dd nd subtrt unit re omprtively esier, nd unneessry detils were given here. Aording to the ormt requirements o model. ile, we edit ode in res suh s SAIC, RAM nd CODE. As the ode in CODE is exeuted in rel time in RDS, the progrmming lnguge we wrote should be s eiient s possible [11]. For instne, the prmeters whih do not need to be re-omputed n be omputed in RAM re, division should be voided in CODE re, the vrible tht only be used in CODE re do not need to be delred in SAIC re, et. Components n right wy be lled in the RDS librry ter ompiling. 4. RDS-CBuilder User-Deined Model esting Stti exittion system model in RDS hs lredy pssed the engineering vlidtion nd it meets the pplition requirements o engineering ts. By doing omprison testing using the user-deined model nd the RDS inluded model, the orretness o the user-deined modeling method presented in this pper n be veriied. While there re dierenes between the userdeined omponent model nd the RDS inluded model in terms o the hoosing o dierentil eqution lgorithm, the proessing modes o eh unit, et [12]. As the soure ode o the existing omponent in the omponent librry is unknown, this pper ompres in terms o the dierenes o externl perormne between the two ble 4. Dierentil eqution s solution o EMDC. models. Closed-loop tests were perorm to user- deined omponent model nd RDS inluded model by setting up speii senes o the power grid, to exmine whether the externl hrteristis re identil or not. In this pper, we use the power system with the typil onnetion mode o 500 kv uto trnsormers in the dynmi model test stndrd o the DL/ power system rely protetion produt s the losed-loop test system. he system hve 6 nodes by ll, inluding genertor MACH1, ininite soure SCR1, ininite soure SCR2, 500 kv terminl bus BUS1, high voltge side bus o the min trnsormer BUS2, medium voltge side bus o the min trnsormer BUS3, low voltge side bus o the min trnsormer BUS4, 500 kv terminl bus BUS1 nd high voltge side bus o the min trnsormer BUS2 onneted vi the 200 km single line L1. he network topologil grph o the losed-loop testing system is shown in Figure 5. he typil dt o IEEE type EXS1 stti exittion system o genertor MACH1 is shown in ble 5. Figure 5. ypil wiring o 500 kv utotrnsormer. ble 5. ypil prmeters o IEEE type EXS1. Prmeter Vlue Prmeter Vlue b rnser untion 1 1 S S 1 S Expliit Solution Formul t t e R( 1 e t t t e R( R( t e 1 S1 1 S 2 t e 2 t 2 R( 1 e t 2 t 1 2 R( R( t e t V 1.01 re V 1.2 i mx V -1.0 i min K K K 0.03 V 5.1 mx V -4.0 min

5 Y. WANG E AL. 531 he mjor untions o the exittion system re to provide the exittion soure or the genertor, stbilize the terminl voltge, demgnetize when the genertor shed the lod, rpidly nd oribly exite in the se o system disturbnes, demgnetize utomtilly in the se o internl ult o the genertor, ontrol the retive power output o the genertor, et [13,14]. Closedloop tests were then perorm to the user-deined omponent nd the Module in this pper in 3 onditions, inluding voltge initiliztion, the step proess o the terminl voltge o genertor, lrge system disturbne, et. he mjor prmeters o the test onsist o terminl voltge o the genertor, exittion voltge E, the retive power output o the genertor Q MACH1, et. 1) he voltge initiliztion proess In the proess the genertor rom the end o initiliztion to the stble stte, we need to inspet the estblisment o exittion voltge, the stbilizing proess o the terminl voltge, et. he reorded experimentl dt digrm Figure 6 is exittion voltge, Figure 7 is terminl voltge, nd the reording time is 20s. he gry urves E nd Vpu is the test results to the user-deined omponent, nd the blk urves E ( M) nd Vpu ( M) is the test results to the Module. As Figure 6 nd Figure 7 show, the vrition trends o these two prmeters o the user-deined omponent nd the Module, exittion voltge nd terminl voltge, re generlly the sme. 2) he step proess o terminl voltge reerene vlue he terminl voltge reerene vlue ws stepped to ertin multiple o the reerene vlue ter the system entering the stble stte. At this moment, exmine the rise time nd the overshot o the terminl voltge, nd the ontrol ondition o the retive power output o the genertor. he reorded experimentl dt digrm Figure 8 is the exittion voltge, nd Figure 9 is the retive output with the wve reording time 10 s. he gry urves E QMACH1 o these igures re the test results to the user-deined omponent, nd the blk urves E ( M) Q ( MACH1 M) re the test results to the Module. As Figure 8 nd Figure 9 show, the vrition trend o the two prmeters, the exittion voltge nd the retive power output, re generlly the sme. 3) he lrge system disturbne sitution When ults our to the system, there is shok to the system voltge, so the voltge stbility problem is likely to our. When ults our to the AC system in the viinity o the genertor, disturbne is pplied to the bus voltge t the genertor terminl. As the input o the exittion system, the disturbne signl mke the exittion system djust dynmilly, nd stbilize the system voltge. his pper designs the ollowing experimentl senrios. Ater the system entering the stble stte, three-phse ult with the ult durtion time 0.1 s ws pplied to K1 point whih ws t the min trnsormer side o line L1 nd then lrge disturbne ourred in the system. he reorded experimentl dt digrm Figure 10 is the exittion voltge nd Figure 11 is the Figure 6. Contrst o exittion voltge in initiliztion. Figure 8. Contrst o terminl voltge in initiliztion. Figure 7. Contrst o terminl voltge in initiliztion. Figure 9. Contrst o retive power in step proess.

6 532 Y. WANG E AL. Figure 10. Contrst o exittion voltge in lrge disturbne. system rel time simultion sotwre RDS. he model ws designed by the user ording to the externl pperne o power system ontrol omponent, the input nd output nd the omponent prmeters. Menwhile, we edit the internl trnser untion nd the logi unit using C-like ode on the bsis o the system logi blok digrm. hus we obtin the user-deined model o the omponent, nd tke the IEEE type EXS1 stti exittion s n exmple to perorm losed-loop simultion veriition. he test results indite tht the omponent model built on the bsis o this method, n well implement the ontrolling untion o the omponent nd stisy the users simultion demnds or the speii model. Menwhile, the user-deined modeling module possesses ine mn-mhine intertion intere, nd the userdeined omponent module it built hs the dvntge o esily-extension, oniseness, eiieny, et. Figure 11. Contrst o terminl voltge in lrge disturbne. terminl voltge, with the reording time 5 s. he gry urves E, Vpu in these igures re test results to the user-deined omponent, nd the blk urves E ( M), Vpu re test results to the Module. As Figure 10 nd Figure 11 show, the vrition trend o these two prmeters o the user-deined omponent nd the Module, exittion voltge nd terminl voltge, re generlly the sme. 4) Result nlysis o simultion test In this setion, externl hrteristi losed-loop tests were perormed to the user-deined omponent nd the Module o the IEEE type EXS1 stti exittion system. he vrition trends o the user-deined omponent nd the Module prmeters, inluding genertor terminl voltge V, the exittion voltge E pu nd the genertor retive power output QMACH 1, re bsilly the sme, when the system is in the initiliztion proess, the step proess o the terminl voltge reerene vlue, the ondition o lrge disturbne, et. he error should be in n eptble regime, in the onsidertion o the dierene o seletion o trnser untion lgorithms, the logil unit proessing, et. hereore, the user- deined omponent o the IEEE type EXS1 stti exittion system bsilly meets the test requirements. 5. Conlusions his pper introdue the modeling method pplition o the user-deined modeling module CBuilder using power REFERENCES [1] W. Zhou, Reserh on Digitl Substtion est System Bsed RDS, Shnghi Jio ong University, [2] Z. Xu nd L. J. Qin, Applition Method o RDS User Deine Component Model (UDC), Power System Protetion nd Control, Vol. 31, No. 22, 2009, pp [3] Y. H. Liu, Z. X. Ci nd A. M. Li, he User-deined Model o PSCAD/EMDC nd Its Applition in Simultion o HVDC rnsmission Line Protetion, Power System Protetion nd Control, Vol. 39, No. 9, 2011, pp [4] D. C. Xu, M. X. Hn, H. Ding, et, Modeling o HVDC Bsed on the User-deined Model o PSASP, Automtion o Eletri Power Systems, Vol. 31, No. 6, 2007, pp [5] Y. X. Chen, X. R. Wng, G. D. Lio, et, User Deined Exittion System Models in PSS/E, Power System ehnology, Vol. 33, No. 19, 2009, pp [6] H. Y. Bin, H. B. Zhng, R. R. An, et, Reserh nd Development o Power System rnsient Stbility Simultion Using Objet-oriented ehnique, Automtion o Eletri Power Systems, Vol. 33, No. 22, 2009, pp [7] W. Zhou, X.. Li, P. C. Zhng, et, Rogowski Rel-time Simultion Model o the Eletroni Current rnsduer Bsed on Rogowski Coil, Power System Protetion nd Control, Vol. 38, No. 19, 2010, pp [8] Z. Wng, Reserh o Interes Bsed on Rel-time Digitl Simultion or Hybrid Rel-time Simultion o Eletromgneti-eletromehnil rnsient Proess, North Chin Eletri Power University, [9] X. Yng, User Deined Modeling Method nd Its Applition or Exittion System, Proeedings o the CSU-EPSA, Vol. 23, No. 1, 2011, pp [10] Z. Xu, L. Qin nd J. Wng, Bsi Method o Building UDC Model or RDS Simultion, Power nd Energy Engineering Conerene (APPEEC), 2001, pp. 1-4.

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