You Can Do That. Unit 16. Motivation. Computer Organization. Computer Organization Design of a Simple Processor. Now that you have some understanding

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1 .. ou Can Do That Unit Computer Organization Design of a imple Clou & Distribute Computing (CyberPhysical, bases, Mining,etc.) Applications (AI, Robotics, Graphics, Mobile) ystems & Networking (Embee ystems, Networks) Architecture ( & Embee HW) Where we will hea now Devices & Integrate Circuits (emiconuctors & Fabrication) HW W cripting & Interfaces C / C++ / Java Assembly / Machine Coe Logic Gates Transistors Networke Applications Applications O / / I/O Libraries Functional Units (Registers, Aers, Mues) Voltage / Currents.. Motivation Now that you have some unerstaning Of how harware is esigne an works Of how software can be use to control harware We will look at how to improve efficiency of computer systems an software so that we can start to unerstan why HW companies create the structures they o (multicore processors) we can begin to intelligently take avantage of the capabilities the HW gives us we can start to unerstan why W companies eal with some of the issues they o (efficiencies, etc.) Computer Organization Three primary sets of components I/O (everything else) Tell us where things live? Running coe Compile program (not running) Circuitry to eecute coe ource coe file variables for the piels being isplaye on your screen

2 Input / Output.. performs reas an writes to communicate with I/O evices just as it oes with memory I/O evices have locations (i.e. ) that contain ata that the processor can access These registers are assigne unique just like memory FE may signify a white ot at a particular location This coul just as easily be the comman an ata register from the LCD shiel Or the PT/DDR registers. Vieo Interface 8 FE 8 FE A D C WRITE a = he in ACII FF Keyboar Interface Primary Components insie a processor Registers Circuitry Connects to memory an I/O via aress, ata, an control buses (bus= ) Bus Ar Arithmetic an Logic Unit ().7 Registers.8 Eecutes arithmetic operations like aition an subtraction along with logical operations (, etc.) UB, in Ar ome are for general use by software Registers provie storage locations within the processor (to avoi having to rea/write slow memory) Others are require for specific purposes to ensure proper operation of the harware UB, in R-R Ar

3 .9. General Purpose Registers What if we in t have registers? Registers available to software instructions for use by the Instructions use these registers as inputs ( locations) an puts ( locations) UB, in R-R Ar Eample w/o registers: F = (X+) (X*) Requires an ADD instruction, MULtiply instruction, an UBtract Instruction w/o registers ADD: Loa X an from memory, store result to memory MUL: Loa X an again from mem., store result to memory UB: Loa results from ADD an MUL an store result to memory 9 memory accesses UB, in R-R Ar X F.. What if we have registers? Other Registers Eample w/ registers: F = (X+) (X*) Loa X an into registers ADD: R + R an store result in MUL: R * R an store result in UB: an store result in R tore R back to memory total memory access UB, in R-R X Ar X F ome bookkeeping information is neee to make the processor operate correctly Eample: Program Counter () Recall that the processor must fetch instructions from memory before ecoing an eecuting them register hols the aress of the net instruction to fetch UB, in R-R Ar

4 .. Fetching an Instruction Fetching an Instruction To fetch an instruction contains the aress of the instruction The value in the is place on the aress bus an the memory is tol to rea The is incremente, an the process is repeate for the net instruction To fetch an instruction contains the aress of the instruction The value in the is place on the aress bus an the memory is tol to rea The is incremente, an the process is repeate for the net instruction UB, in R-R = Ar = Ar = inst. machine coe = Rea inst. inst. inst. inst. inst. FF UB, in R-R = Ar = Ar = inst. machine coe = Rea inst. inst. inst. inst. inst. FF.. Circuitry Circuitry circuitry is use to the instruction an then generate the necessary signals to complete its eecution s the registers to be use as source an estination locations (using ) Assume is machine coe for an ADD instruction of = R + R Logic will select the registers (R an R) tell the to a select the estination register () UB, in R-R Ar inst. inst. inst. inst. inst. FF ADD ADD in R-R Ar inst. inst. inst. inst. FF

5 .7.8 What hall We Do? DEIGN OF A IMPLE INTRUCTION ET AND PROCE Let's esign a simple processor to unerstan the entire flow from writing software to esigning the harware This may not be the most avance processor but the goal is to give you a fully working eample from software to harware.9. Instruction ets Defines the software of the processor an memory system Instruction set is the the HW processor can unerstan an the W is compose with Usually the compiler is the one that translates the software Most assembly/machine instructions fall into one of three categories (to an from memory) (branch, subrine call, etc.) Instruction et Architecture (IA) approaches = instruction set computer vocabulary More work per instruction, slower clock cycle = instruction set computer mall, basic, but vocabulary Less work per instruction, faster clock cycle Usually a simple an small set of instructions with regular format facilitates builing faster processors

6 .. The Instruction et () The Instruction et () To start we will efine the instruction set Let's make this a simple calculator-like processor that can perform at least the following operations: Goal is to evaluate simple arithmetic epressions: (7+-)& Let's use -bit ata values (i.e. all ata operans will be -bits) To keep the number of bits neee to coe an instruction to a minimum, let's use an architecture where the register is always one ADD 7means: UB means: Let's assume the put of this computer is just LED's to isplay a -bit binary number We'll provie some aitional instructions to help us perform the calculations: That leaves us with total instructions How many bits o we nee for the opcoe of our instructions? If we want to store ata/constants in our instructions (e.g. ADD 7, UB ) how many aitional bits o we nee in our instruction? Instructions nee opcoe + ata bits = -bits Let's roun up to 8-bits for each instruction Computer ystem Output LEDs (Display = 7 = ) Opcoe Unu Constant (-bits) se (-bits) Chosen Instruction Format.. Compilation Defining the Machine Coe Consier the following "high-level" coe (7 - + ) & "Compile" it to an appropriate instruction sequence (i.e assembly) Assemblyrefers to the human reaable synta of each instruction Now we nee to convert to binary Instruction et ummary ADD k (ACC += k) UB k (ACC -= k) AND k (ACC &= k) LOAD k (ACC = k) CLR (ACC = ) OUT (OUT = ACC) Machine coerefers to the representation of each instruction. We first nee to efine the actual opcoes so we can translate the assembly you wrote on the previous slie into binary for the harware to eecute Before we o that, let's consier the harware esign as this will help us choose appropriate opcoes

7 .. Arithmetic an Logic Units Let's use the we esigne in a previous unit We will esign what is insie this block. X X F F F EE9 R R We just mae up these coe assignments an the various operations. Remember, we efinitely nee to support UB, an CLR (R=). F[:] Op./Result R = X + R = X - R = X R = -X R = X & Unuse R = Unuse X X F F F I I = F F' -to-, -bit wie mu I I = F F -to-, -bit wie mu Complete -to-, -bit wie mu I I = F' F A A A A B B B B X X Ci=F C -bit Binary Aer C F[:] Op. F[:] Op. R = X + R = X & R = X - Unuse R = X R = EE9 R = -X Unuse -to-, -bit wie mu I I = F EE9 R R.7.8 = F F = F F' = F' F Ci = F = F Logic R F[:] Ci X+ X- X -X X & unuse unuse F FF F FF F FF F FF F FF Ci Defining the Machine Coe Format Using the esign can you suggest opcoes for the various instructions? The accumulator (ACC) will be connecte to the result of the But shoul the ACC be connecte to the X or input of the? Important: We achieve Loa by passing through the to the ACC, so we nee the constant to come in on X (so cannot) Instruction et ummary ADD k (ACC += k) UB k (ACC -= k) AND k (ACC &= k) LOAD k (ACC = k) CLR (ACC = ) OUT (OUT = ACC) F[:] Op./Result R = X + R = X - R = X + = R = -X R = X & Unuse R = Unuse Instruc. OODE Op./Result

8 .9. Assembler path Now translate the assembly you foun from a few slies back to machine coe an show it as he igits per instruction The "high-level" coe was (7 - + ) & "Compile" it to an appropriate instruction sequence (i.e assembly) CLR = ADD 7 = UB = ADD = AND = Instruc. OODE Op./Result ADD ACC = ACC + C OUT OUT = ACC LOAD ACC = C UB ACC = ACC -C AND ACC = ACC & C - Unuse CLR ACC = - Unuse Opcoe Unu Constant (-bits) se (-bits) Chosen Instruction Format Now let's consier the processor ata path -bit Counter Q A Q A A A REET CLR Q A I D I D 8 I I D D D X X F F F EE9 ACC[:] OUT[:] R D Q D Q R D Q D Q LEDs.. ample Eecution of UB A Problem -bit Counter Q A Q A A A REET Q A CLR 8 D D D D D I I I I or Write assembly for: ((7 & ) + ( & )) F F F X X EE9 R R D D ACC[:] Q Q D D OUT[:] Q Q LEDs

9 .. A olution Upate Assembly Let's moify our processor as follows: A for temporary storage: Coul a more but we'll keep it simple A new instruction to save the to a register: AVE R ( ) Upate instructions to be able to specify a rather than just a constant ADD R (ACC = ACC + R) UB R (ACC = ACC - R) AND RX (ACC = ACC & R) LOAD R (ACC = R) Upate the instruction format to use the leftover bit to inicate whether the operan is a constant or shoul come from a register Opcoe (-bits) Opcoe (-bits) Constant (-bits) Unuse (-bits) New Instruction Format Write assembly for: ( (7 & ) + ( & ) ) New assembly & machine coe Instruc. OODE Op./Result ADD ACC = ACC + C/R OUT OUT = ACC LOAD ACC = X UB ACC = ACC -C/R AND ACC = ACC & C/R - Unuse CLR ACC = AVE R Opcoe (-bits) Opcoe (-bits) R = ACC C/R C/R Constant (-bits) Unuse Reg (-bits) / New Instruction Format.. Upate path More Practice (On Own Time) -bit Counter Q A Q A A A REET CLR Q A 8 D D D D D I I I I Write assembly for: ( (&) + (&) - (&) + (8&)) Try to use as few instructions as you can R_LD R_LD ACC[:] -to-, -bit wie mu Registers R[:] D[:] Q[:] I R I D[:] Q[:] R R[:] X X F F F EE9 R R D Q D Q ACC[:] D D OUT[:] Q Q LEDs Opcoe (-bits) Opcoe (-bits) C/R C/R Constant (-bits) Unuse Reg (-bits) / New Instruction Format

10 .7 D[:] Q[:] D[:] Q[:] Registers ACC[:] R_LD R_LD -bit Counter CLR Q Q D D D D D A A A A 8 I I I I REET Q A I I -to-, -bit wie mu I I -to-, -bit wie mu R R I LEDs R[:] R[:] R_LD I R_LD X X EE9 R R F F F D D Q Q ACC[:] D D Q Q OUT[:] D D Q Q OUT[:] I ADD 7.8 D[:] Q[:] D[:] Q[:] Registers ACC[:] R_LD R_LD -bit Counter CLR Q Q D D D D D A A A A 8 I I I I REET Q A I I -to-, -bit wie mu I I -to-, -bit wie mu R R I LEDs R[:] R[:] R_LD I R_LD X X EE9 R R F F F D D Q Q ACC[:] D D Q Q OUT[:] D D Q Q OUT[:] I ADD R.9 D[:] Q[:] D[:] Q[:] Registers ACC[:] R_LD R_LD -bit Counter CLR Q Q D D D D D A A A A 8 I I I I REET Q A I I -to-, -bit wie mu I I -to-, -bit wie mu R R I LEDs R[:] R[:] R_LD I R_LD X X EE9 R R F F F D D Q Q ACC[:] D D Q Q OUT[:] D D Q Q OUT[:] I AVE R