2. (3 pts) There are two different ways to measure performance. What are they? 3. (3 pts) Why doesn t MIPS have a subtract immediate instruction?
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1 1. (3 pts) What is Amdahl s law, inwords? 2. (3 pts) There are two different ways to measure performance. What are they? 3. (3 pts) Why doesn t MIPS have a subtract immediate instruction? 4. (3 pts) Are there any MIPS instructions which do not use the ALU? If so, which one(s)? 5. (3 pts) Clock rates have grown by a factor of 1000 while power consumed has only grown by a factor of 30. How was this accomplished? 6. (3pts) The 32-bit quantity 0x is going to be stored in memory at location 0x100. If the memory is byte-addressable and uses a little-endian format, what does memory location 0x100 contain after the store occurs?
2 7. (4 pts) An important program spends 40% of its time doing Floating Point operations, and 30% of its time doing integer arithmetic. By redesigning the hardware you can either make the Floating Point unit twice as fast, or the integer unit 80% faster. Which should you do, and why? 8. (4 pts) Processor A requires 200 instructions to execute a given program, uses 3 cycles per instruction, and has a cycle time of 5 ns. Processor B only requires 2 cycles per instruction, but requires 250 instructions to do the same program. What must the cycle time of Processor B be in order to give the same CPU time as Processor A? 9. (6 pts) In MIPS, the jump instruction uses the distance (or Immediate) field to indicate the distance from the current PC that it wants to jump. (2) What is that distance measured in? (2) How isthis accomplished? (2) What must be done if you need to jump further than that distance?
3 10. (6 pts) What are the 4 benchmark types we discussed in class? Do benchmark programs remain valid indefinitely? Why orwhy not? 11. (3 pts) Why are there multiple dies per wafer? Why not make just one big one? 12. (4 pts) Machines used to use absolute addressing for jumps and branches. What do they use now, and why? 13. (4 pts) Interrupts/Exceptions require the CPU to provide the OS with what 2 things? 14. (2 pts) What does EPC stand for? What value does it contain?
4 In this question, we are going to wire up a 14-bit version of the machine we designed in class. The machine has 3 different instruction formats: R, I, and J. R-type: Opcode rs rt rd funct I-type: Opcode rs rt Immediate J-type: Opcode Offset The machine is word-addressable, where a word is 14 bits. Immediates are sign-extended, and in a jump instruction, the jump is not relative to the current PC, but rather is treated as an absolute value. Here are some of the instructions that have been defined: Name Opcode(Funct) Name Opcode(Funct) Name Opcode(Funct) lw 0010(xxxx) sw 0011(xxxx) NOP 0000(0000) beqz 0100(xxxx) j 0101(xxxx) NOT 1000(0011) ADD 1000(0000) ADD Imm 1001(xxxx) SUB 1000(0100) AND 1000(0001) AND Imm 1010(xxxx) XOR 1000(0101) OR 1000(0010) OR Imm 1011(xxxx) XOR Imm 1100(xxxx) Here are the 10 control signals. A) ALU0 B) ALU1 C) ALUSrc D) Br E) MemRead F) MemWrite G) PCin H) RegWrite I) WrAddr J) WrSrc
5 15. (16) In the diagram below, make sure all the dashed boxes are filled. Tw o are already done for you. Use the letters from the previous page instead of the actual names (F instead of MemWrite, for example). SE PC Instruction Memory 9 8 Register File Read1Addr SRC1 Read2Addr SRC2 WriteAddr Write Data In Instruction Decode Data Mem Data Out Data In Address Read Write F ALU (2 pts) Now, write down the exact boolean equation for the MemWrite signal. 16. (6 pts) We need a JAL instruction - let s say it uses register 0. Sketch the changes necessary on the above diagram, and/or describe in words what would need to change in this machine in order to make this work. (Don t forget about instruction set impacts...)
6 17. (10 pts) This 14-bit machine is very similar to the MIPS design in the book. List 5 significant differences between the two designs (and obvious, trivial things like "one is 32 bits and one is 12" don t count.) 18. (11 pts) There are a number of changes that must be made to our single cycle design in order to make itamulticycle CPU. What are the 5 new registers that must be added, and were do they go? (Sketch them in on the diagram below). Also, there are several new control signals - list 3 of them, and explain what they do. SE Register File PC Memory Read1Addr Read2Addr WriteAddr SRC1 SRC2 Write Data In Instruction Decode ALU
7 19. (4 pts) We are going to use microcode to provide the control signals for this multicycle CPU. We will say there are 13 control signals, and we are going to have the longest instruction take 5cycles. Describe the simplest microcode configuration that can be used in this machine (how many entries, how wide is each entry, what does each entry contain, etc.) 1. (1) How many entries would it have? 2. (1) How wide would each entry be? 3. (1) What would be contained in each memory location? 4. (1) How would the memory locations be accessed? (In other words, what signals would you use to create the memory address?)
4. (2 pts) What is the only valid and unimpeachable measure of performance?
1. (2 pts) What concept is at the heart of RISC processing? 2. (2 pts) What are the two main ways to define performance? 3. (3 pts) What is Amdahl s law, inwords? 4. (2 pts) What is the only valid and
3. (2 pts) Clock rates have grown by a factor of 1000 while power consumed has only grown by a factor of 30. How was this accomplished?
. (2 pts) What are the two main ways to define performance? 2. (2 pts) What is Amdahl s law, inwords? 3. (2 pts) Clock rates have grown by a factor of while power consumed has only grown by a factor of
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