Getting the Most out of Advanced ARM IP. ARM Technology Symposia November 2013

Transcription

1 Getting the Most out of Advanced ARM IP ARM Technology Symposia November 2013

2 Evolving System Requirements Processor Advances big.little Multicore Unicore DSP Cortex -R7 Block are now Sub-Systems Cortex -R7 CoreLink NIC-400 Cortex - A57 GIC-500 Cortex -A53 Mali GPU IPU DMA 300 Cortex -M3 CoreLink NIC-400 System Control Evolution big-little DVFS None AXI3 Modem Throughput LTE 4G 3G Edge Video Ctrl LCD Ctrl CoreLink NIC-400 ADB-400 ADB-400 ADB-400 ADB-400 CoreLink CCI-400 TZC-400 TZC-400 TZC-400 TZC-400 MMU-500 Traffic Advances AMBA 5 AXI4 /ACE AXI AHB Video Display 1080p 1080i 720i 480i DDR3/2 LPDDR2 CoreLink DMC-400 DDR3/2 LPDDR2 CoreLink NIC-400 Other Slaves Other Slaves Memory Complexity LPDDR2 DDR4 DDR3 DDR2 Need a solution to enable optimization of systems and subsystems

3 SoC Optimization IP Selection IP Optimization Subsystem Optimization System Bringup System Optimization IP Selection Getting the right IP to meet design requirements IP Optimization Configuration and optimization of individual IP Subsystem Optimization Price/Performance/Area tradeoffs on key subsystems System Bringup Integrating subsystems into complete system together with firmware System Optimization Optimizing performance of complete system with software

4 IP Selection Cortex-A Processors Cortex-A57 Cortex-A53 Cortex-A15 Cortex-A9 Cortex-A8 Cortex-A7 Cortex-A5 Cortex-R Processors Cortex-R7 Cortex-R5 Cortex-R4 Cortex-M Processors Cortex-M4 Cortex-M3 Cortex-M0 And many more CoreLink IP NIC-400 NIC-301 PL301 CCI-400 DMC-400 MMU-400 GIC-400 PL34x PL35x Mali GPU Mali-400MP Mali-450MP Mali-55 Mali-T604 Mali-T628 Choose the right IP to meet design requirements Accurate models ensure correct decisions are made Only source for 100% accurate virtual models of ARM IP

5 IP Configuration Build any valid configuration Only valid configurations are buildable 100% accurate model available for download Simple, fast model creation

6 IP Optimization Use traffic generators for producers and consumers Parameterize traffic to mimic system Sweep across various parameters Analyze results Reconfigure, resimulate, reanalyze

7 Driving the Traffic Parameterizable traffic Random addresses, data, burst lengths, outstanding transactions, etc. User defined loading to stress system Vector Playback More realistic traffic Easily extracted from components Programmed Traffic Much more configurable Can easily target real functions

8 Customer Case Study: DDR Controller Optimization Traffic Generator Carbonized DDR3 Memory Controller Carbonized DFI PHY DDR3 Memory Used configurable traffic generator to drive memory accesses Detected configuration issues, address munging settings, DFI settings Improved performance over 30% over shipping configuration

9 Subsystem Optimization AXI3_sl Real components enable more accurate decisions Interaction between components can have significant impact Refinements typically deliver 25-40% improvement in IP performance

10 Analyzing the Traffic Throughput Latency Cache Utilization Branch prediction Multi-run comparison highlights difference in results It s not about a single piece of IP, it s about the interaction

11 Customer Case Study: Graphics Subsystem Combining Carbon Models and ARM Fast Models Problem: Need to test driver code for Mali GPU in the system Driver code only runs at the end of Linux boot Need lots of cycles! No ARM Fast Model for Mali GPUs, just RTL Solution: Used Fast Model of Dual Cortex-A9 swapped in CA model for final validation Compiled MALI RTL using Carbon Model Studio Booted Linux with both Fast Models & Carbon Models in the platform Results: Linux boots in less than a minute Platform runs at Fast Model speeds except when Mali is active Able to validate 3D drivers at the system level in complete virtual environment Built & validated firmware platform in days vs. months (if they had hand wrote a model)

12 Virtual Platform vs. Emulation Emulated System Linux Boot F Fast Models + Carbonized Mali Frame Frame Frame Frame Frame Frame Frame Frame Frame Frame 5 Min 10 Min 15 Min Speed and accuracy with one platform Leverages 100+ MIPS performance of ARM Fast Models Leverages 100% accuracy of Carbonized IP models Boot Linux in seconds with A9 Fast Model based system and Carbonized Mali model Display 9 frames of graphics in virtual platform while emulator is still booting Linux Swap and play will allow swapping into fully cycle accurate system at any time

13 System Bringup Building accurate virtual prototypes is a non-trivial task Memory mapping Device configuration Subsystem configuration System Integration Software configuration Multiprocessor software setup System debug Experience and expertise require very skilled engineers to accomplish quickly and easily How can this work be reduced or eliminated?

14 Carbon Performance Analysis Kits Pre-built, extensible virtual prototypes ARM Cortex-A57, Cortex-A53, Cortex- A15, Cortex-A9, Cortex-A7, big.little and more Reconfigurable memory and fabric NIC-400, NIC-301, CCI-400, PL310, etc Pre-built bare-metal software Pre-built OS ports Swap & Play enabled Execute at 10s to 100s of MIPS Debug with 100% accuracy Source code for all software components Downloadable 24/7 from Carbon IP Exchange

15 System Optimization System software loads Provides best way to optimize system performance Realistic traffic loads executing realistic system behavior Bare metal benchmarks target hardware hot spots OS level benchmarks highlight areas of hardware/software interaction Optimization occurs earlier in the design cycle Allows for increased iterations where optimizations can be made to hardware and software

16 Case Study: Firmware Tuning Optimal performing firmware is fundamental to the performance of higher levels of software How do I optimize firmware on a Hybrid Disk Drive? Requires cycle accuracy to find and optimize Firmware/Hardware bottlenecks Requires detailed fine-grain analysis at both the firmware and hardware level. Requires speed to run HDD controller firmware (at least 1 second of data transfer) H o s t Firmware ARM Processor IF SDRAM Servo Subsystem Buffer Subsystem Flash IF Disk Read Write 52% Improvemen t Base Rev1 Rev2 Rev3 Optimizations: Algorithmic, Latency Hiding, Pipelining, DMA, Memory Relocation, Data structure Improvements, HW improvements

17 Solution Model Creation -100% accurate models compiled directly from RTL -Industry s only automated model generation solution Model Deployment -Web portal offering 100% accurate ARM IP Models & other leading vendors -24/7 access for configuration, compilation and download Architectural Analysis and Firmware Development -100% accuracy for architectural analysis and firmware development -100s of MIPS speed for application software development -Switch from 100s of MIPS to 100% accuracy at any software breakpoint RTL Model Libraries LT Model LT Model System Level Model IP Models LT Model LT Model

18 Swap & Play SoC Designer Plus virtual platform running at 200+ MIPS Boot Loader OS Boot UART Driver LCD Driver Mali Driver Boot Linux/Android in seconds and create check points for Firmware/Driver engineers CP 1 CP 2 CP 3 SoC Designer Plus virtual platform running with 100% accuracy Driver developers can debug/validate driver code against an accurate system Cycle accuracy without having to spend time booting Linux in CA model Each driver developer can independently debug their own driver code

19 Maximizing Coverage System Level Benchmark System benchmarks can execute for many billions of cycles Executing in cycle accurate system could take days Swap & Play enables accurate simulation of benchmark areas which it may take too long to reach in a single simulation Can execute multiple checkpoints in parallel to deliver days worth of results in a few hours

20 Optimization Solution Comparison IP Selection IP Optimization Subsystem Optimization System Bringup System Optimization RTL Simulation Emulation FPGA Prototype Traditional CA Simulation Traditional CA Simulation + CPAKs Carbon SoCDesigner Plus + CPAKs + Swap & Play

21 Conclusion IP Selection IP Optimization Subsystem Optimization System Bringup System Optimization Carbon provides a complete solution to enable designers to get the most out of advanced ARM IP 100% accurate virtual models of ARM IP to simplify IP selection Virtual prototype construction and analysis tools to optimize IP and subsystems Carbon Performance Analysis Kits to enable rapid bringup and path to value Complete solution to enable optimization of system configuration and software

22 Thank You! Questions? Bill Neifert