GateLevel Minimization


 Clinton Harrell
 3 years ago
 Views:
Transcription
1 GateLevel Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall,
2 Outlines The Map Method FourVariable Map FiveVariable Map ProductofSums Simplification Don tcare Conditions NAND and NOR Implementation Other TwoLevel Implementations ExclusiveOR Function DCD032
3 The Map Method Boolean function sum of minterms sum of products (or product of sum) in the simplest form a minimum number of terms a minimum number of literals The simplified expression may not be unique Gatelevel minimization refers to the design task of finding an optimal gatelevel implementation of Boolean functions describing a digital circuit. Logic minimization algebraic approach: lack specific rules Karnaugh map approach a simple straight forward procedure a pictorial form of a truth table applicable if the # of variables < 7 A diagram made up of squares each square represents one minterm DCD033
4 TwoVariable Map A twovariable map four minterms x' = row 0; x = row 1 y' = column 0; y = column 1 a truth table in square diagram DCD034
5 Eight minterms Gray code sequence ThreeVariable Map Any two adjacent squares in the map differ by only one variable e.g., m 5 and m 7 can be simplified m 5 + m 7 = xy'z + xyz = xz (y'+y) = xz yz DCD035
6 Example 3.1 F(x,y,z) = S(2,3,4,5) = x'y + xy' DCD036
7 ThreeVariable Map m 0 and m 2 (m 4 and m 6 ) are adjacent m 0 + m 2 = x'y'z' + x'yz' = x'z' (y'+y) = x'z' m 4 + m 6 = xy'z' + xyz' = xz' (y'+y) = xz' yz DCD037
8 Example 3.2 F(x,y,z) = S(3,4,6,7) = yz+ xz' DCD038
9 Four adjacent squares 2, 4, 8 and 16 squares ThreeVariable Map m 0 +m 2 +m 4 +m 6 = x'y'z'+x'yz'+xy'z'+xyz' = x'z'(y'+y) +xz'(y'+y) = x'z' + xz = z' m 1 +m 3 +m 5 +m 7 = x'y'z+x'yz+xy'z+xyz =x'z(y'+y) + xz(y'+y) =x'z + xz = z yz DCD039
10 Example 3.3 F(x,y,z) = S(0,2,4,5,6)= z'+ xy' DCD0310
11 Example 3.4 Given F = A'C + A'B + AB'C + BC Express it in sum of minterms => S(1,2,3,5,7) Find the minimal sum of products expression => F=C+A B DCD0311
12 The map FourVariable Map 16 minterms combinations of 2, 4, 8, and 16 adjacent squares DCD0312
13 Example 3.5 Simplify the Boolean Function: F(w,x,y,z) = S(0,1,2,4,5,6,8,9,12,13,14)=y'+w'z'+xz' DCD0313
14 Example 3.6 Simplify the Boolean Function: Given F = A B C + B CD + A BCD + AB C => F = B D + B C + A CD DCD0314
15 Systematic Simplification Implicant a product term of which if the function has the value 1 for all minterms. A Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 remove any literal not a implicant. A prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more minterms. Prime Implicants and Essential Prime Implicants can be determined by inspection of a KMap. A set of prime implicants "covers all minterms" if, for each minterm of the function, at least one prime implicant in the set of prime implicants includes the minterm. Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals. DCD0315
16 Example of Prime Implicants Find ALL Prime Implicants BD CD C ESSENTIAL Prime Implicants C B D BD A AB 1 1 B D AD BC BD A Minterms covered by single prime implicant 1 1 B D Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals. DCD0316
17 Example of Prime Implicants Find all prime implicants for: F(A, B,C, D) = Sm (0,2,3,8,9,10,11,12,13,14,15) BD 1 C 1 BC 1 A 1 1 A D Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals. B DCD0317
18 Example of Prime Implicants Find all prime implicants for: G(A, B,C, D) = Sm Hint: There are seven prime implicants! (0,2,3,4,7,12,13,14,15) C A B D Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals. DCD0318
19 Prime Implicants Selection Rule Find all prime implicants. Include all essential prime implicants in the solution Select a minimum cost set of nonessential prime implicants to cover all minterms not yet covered: Minimize the overlap among prime implicants as much as possible. Make sure that each prime implicant selected includes at least one minterm not included in any other prime implicant selected avoid redundancy. Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals. DCD0319
20 Selection Rule Example Simplify F(A, B, C, D) given on the Kmap. C Selected Essential C A B A B D Minterms covered by essential prime implicants Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals. D DCD0320
21 Simplification Using Prime Implicants Consider F( A, B, C, D ) = (0, 2,3,5,7,8,9,10,11,13,15) The simplified expression may not be unique F = BD+B'D'+CD+AD = BD+B'D'+CD+AB = BD+B'D'+B'C+AD = BD+B'D'+B'C+AB' Digital Circuit Design DCD0321
22 FiveVariable Map Map for more than four variables becomes complicated fivevariable map: two fourvariable map (one on the top of the other) DCD0322
23 Example 3.7 F = S(0,2,4,6,9,13,21,23,25,29,31)=A'B'E'+BD'E+ACE DCD0323
24 Another Map for Example 3.7 DCD0324
25 Relationship between # of Adjacent Squares and # of the Literals Digital Circuit Design DCD0325
26 Product of Sums Simplification Approach 1: Complement from minterms Step 1: Simplify F' in the form of sum of products Step 2: Apply DeMorgan's theorem F = (F')' => F': sum of products => F: product of sums Approach 2: Duality from maxterms Combinations of maxterms M 0 M 1 = (A+B+C+D)(A+B+C+D') = (A+B+C)+(DD') = A+B+C CD AB M 0 M 1 M 3 M 2 01 M 4 M 5 M 7 M 6 11 M 12 M 13 M 15 M M 8 M 9 M 11 M 10 DCD0326
27 Given F = S(0,1,2,5,8,9,10) Approach 1: Step 1: F' = AB+CD+BD' Example 3.8 Step 2: Apply DeMorgan's theorem; F=(A'+B')(C'+D')(B'+D) Approach 2: Think in terms of maxterms DCD0327
28 Implementation of Example 3.8 DCD0328
29 Truth Table of Function F Consider the function defined in Table 3.2. In sumofminterm: F( x, y, z ) = (1,3,4,6) In productofmaxterm: F ( x, y, z) = (0,2,5,7) Taking the complement of F F( x, y, z) = ( x z )( x z) DCD0329
30 Truth Table of Function F Consider the function defined in Table 3.2. Combine the 1 s: F( x, y, z) = x' z xz' Combine the 0 s : F' ( x, y, z) = xz x' z' DCD0330
31 Don'tCare Conditions The value of a function is not specified for certain combinations of variables BCD; : don't care The don't care conditions can be utilized in logic minimization can be implemented as 0 or 1 DCD0331
32 Example 3.9 Given F(w,x,y,z) = S(1,3,7,11,15) and d(w,x,y,z) = S(0,2,5) F = yz + w'x'; F = yz + w'z F = S(0,1,2,3,7,11,15) ; F = S(1,3,5,7,11,15) Either expression is acceptable DCD0332
33 NAND Implementation NAND gate is a universal gate can implement any digital system Two graphic symbols for a NAND gate DCD0333
34 Twolevel Implementation NANDNAND = sum of products Example: F = AB+CD F = ((AB)' (CD)' )' =AB+CD DCD0334
35 Example 3.10 F( x, y, z ) = (1,2,3,4,5,7) F( x, y, z) = xy x y z DCD0335
36 General Design Procedure Procedure 1. Convert all AND gates to NAND gates with ANDinverter graphic symbols. 2. Convert all OR gates to NAND gates with inverteror graphic symbols. 3. Check all the bubbles in the diagram. For every bubble that is not compensated by another small circle along the same line, insert an inverter or complement the input literal. DCD0336
37 Multilevel NAND Circuits Implementing F = A(CD + B) + BC using NAND gate only DCD0337
38 Multilevel NAND Circuits Implementing F = (AB +A B)(C+ D ) using NAND gate only DCD0338
39 NOR Implementation NOR function is the dual of NAND function. The NOR gate is also universal. Two graphic symbols for a NOR gate DCD0339
40 Twolevel Implementation Implementing F = (A + B)(C + D)E using NOR gate only. DCD0340
41 Multilevel NOR Circuits Implementing F = (AB +A B)(C + D ) using NOR gate only. DCD0341
42 Other Twolevel Implementations Digital Circuit Design Wired logic A wire connection between the outputs of two gates Opencollector TTL NAND gates: wiredand logic The NOR output of ECL gates: wiredor logic F = ( AB) ( CD) = ( AB CD) = ( A B )( C D ) F = ( A B) ( C D) = [( A B)( C D)] ANDORINVERT function ORANDINVERT function DCD0342
43 Nondegenerate Forms Considering four types of goats: AND, OR, NAND, NOR, 16 possible combinations of twolevel forms are obtained. Eight of them: degenerate forms = a single operation The eight nondegenerate forms ANDOR, ORAND, NANDNAND, NORNOR, NOROR, NAND AND, ORNAND, ANDNOR ANDOR and NANDNAND = sum of products ORAND and NORNOR = product of sums NOROR, NANDAND, ORNAND, ANDNOR =? DCD0343
44 ANDORInvert Implementation ANDORINVERT (AOI) Implementation NANDAND = ANDNOR = AOI F = (AB+CD+E)' F' = AB+CD+E (sum of products) DCD0344
45 ORANDInverter Implementation ORANDINVERT (OAI) Implementation ORNAND = NOROR = OAI F = ((A+B)(C+D)E)' F' = (A+B)(C+D)E (product of sums) simplified F' in products of sum DCD0345
46 Tabular Summary DCD0346
47 Example 311 Example 3.11 F' = x'y+xy'+z (F': sum of products) F = (x'y+xy'+z)' (F: AOI implementation) F = x'y'z' + xyz' (F: sum of products) F' = (x+y+z)(x'+y'+z) (F': product of sums) F = ((x+y+z)(x'+y'+z))' (F: OAI) DCD0347
48 Example 3.11 DCD0348
49 ExclusiveOR Function ExclusiveOR (XOR) x y = xy'+x'y ExclusiveNOR (XNOR) (x y)' = xy + x'y' Some identities x 0 = x x 1 = x' x x = 0 x x' = 1 x y' = (x y)' x' y = (x y)' Commutative and associative A B = B A (A B) C = A (B C) = A B C DCD0349
50 ExclusiveOR Function Implement (x'+y')x + (x'+y')y = xy'+x'y = x y DCD0350
51 Odd and Even Functions A B C = (AB'+A'B)C' +(AB+A'B')C = AB'C'+A'BC'+ABC+A'B'C = S(1,2,4,7) An odd number of 1's DCD0351
52 Logic Diagram of Odd and Even Functions Logic diagram of odd and even functions DCD0352
53 FourVariable ExclusiveOR Function Fourvariable ExclusiveOR function A B C D = (AB +A B) (CD +C D) = (AB +A B)(CD+C D )+(AB+A B )(CD +C D) Digital Circuit Design DCD0353
54 Parity Generation and Checking Parity Generation and Checking a parity bit: P = x y z parity check: C = x y z P C=1: an odd number of data bit error C=0: correct or an even # of data bit error DCD0354
55 Parity Generation and Checking DCD0355
56 Conclusions From this lecture, you have learned the follows: FourVariable Map FiveVariable Map ProductofSums Simplification Don tcare Conditions NAND and NOR Implementation Other TwoLevel Implementations ExclusiveOR Function DCD0356
GateLevel Minimization
GateLevel Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method
More informationGate Level Minimization Map Method
Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically
More informationGateLevel Minimization
MEC520 디지털공학 GateLevel Minimization JeeHwan Ryu School of Mechanical Engineering GateLevel MinimizationThe Map Method Truth table is unique Many different algebraic expression Boolean expressions may
More informationGate Level Minimization
Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 =
More informationChapter 3. GateLevel Minimization. Outlines
Chapter 3 GateLevel Minimization Introduction The Map Method FourVariable Map FiveVariable Map Outlines Product of Sums Simplification Don tcare Conditions NAND and NOR Implementation Other TwoLevel
More information2.1 Binary Logic and Gates
1 EED2003 Digital Design Presentation 2: Boolean Algebra Asst. Prof.Dr. Ahmet ÖZKURT Asst. Prof.Dr Hakkı T. YALAZAN Based on the Lecture Notes by Jaeyoung Choi choi@comp.ssu.ac.kr Fall 2000 2.1 Binary
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard
More informationDigital Logic Design. Outline
Digital Logic Design GateLevel Minimization CSE32 Fall 2 Outline The Map Method 2,3,4 variable maps 5 and 6 variable maps (very briefly) Product of sums simplification Don t Care conditions NAND and NOR
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter
More informationSimplification of Boolean Functions
Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter
More informationGateLevel Minimization
GateLevel Minimization Mano & Ciletti Chapter 3 By Suleyman TOSUN Ankara University Outline Intro to GateLevel Minimization The Map Method 2345 variable map methods ProductofSums Method Don t care
More informationA B AB CD Objectives:
Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3
More informationChapter 2 Combinational
Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic
More informationUnitIV Boolean Algebra
UnitIV Boolean Algebra Boolean Algebra Chapter: 08 Truth table: Truth table is a table, which represents all the possible values of logical variables/statements along with all the possible results of
More informationCombinational Logic Circuits
Chapter 2 Combinational Logic Circuits J.J. Shann (Slightly trimmed by C.P. Chung) Chapter Overview 21 Binary Logic and Gates 22 Boolean Algebra 23 Standard Forms 24 TwoLevel Circuit Optimization
More information數位系統 Digital Systems 朝陽科技大學資工系. Speaker: FuwYi Yang 楊伏夷. 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象, 視之不可見者曰夷
數位系統 Digital Systems Department of Computer Science and Information Engineering, Chaoyang University of Technology 朝陽科技大學資工系 Speaker: FuwYi Yang 楊伏夷 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象,
More informationChapter 2. Boolean Expressions:
Chapter 2 Boolean Expressions: A Boolean expression or a function is an expression which consists of binary variables joined by the Boolean connectives AND and OR along with NOT operation. Any Boolean
More informationAssignment (36) Boolean Algebra and Logic Simplification  General Questions
Assignment (36) Boolean Algebra and Logic Simplification  General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make
More informationGateLevel Minimization. BME208 Logic Circuits Yalçın İŞLER
GateLevel Minimization BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Complexity of Digital Circuits Directly related to the complexity of the algebraic expression we use to
More informationGet Free notes at ModuleI One s Complement: Complement all the bits.i.e. makes all 1s as 0s and all 0s as 1s Two s Complement: One s complement+1 SIGNED BINARY NUMBERS Positive integers (including zero)
More informationUNIT4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable.
UNIT4 BOOLEAN LOGIC Boolean algebra is an algebra that deals with Boolean values((true and FALSE). Everyday we have to make logic decisions: Should I carry the book or not?, Should I watch TV or not?
More informationSimplification of Boolean Functions
COM111 Introduction to Computer Engineering (Fall 20062007) NOTES 5  page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean
More informationENGINEERS ACADEMY. 7. Given Boolean theorem. (a) A B A C B C A B A C. (b) AB AC BC AB BC. (c) AB AC BC A B A C B C.
Digital Electronics Boolean Function QUESTION BANK. The Boolean equation Y = C + C + C can be simplified to (a) (c) A (B + C) (b) AC (d) C. The Boolean equation Y = (A + B) (A + B) can be simplified to
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show
More information2008 The McGrawHill Companies, Inc. All rights reserved.
28 The McGrawHill Companies, Inc. All rights reserved. 28 The McGrawHill Companies, Inc. All rights reserved. All or Nothing Gate Boolean Expression: A B = Y Truth Table (ee next slide) or AB = Y 28
More informationExperiment 3: Logic Simplification
Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed ElSaied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions
More informationX Y Z F=X+Y+Z
This circuit is used to obtain the compliment of a value. If X = 0, then X = 1. The truth table for NOT gate is : X X 0 1 1 0 2. OR gate : The OR gate has two or more input signals but only one output
More informationDigital Logic Lecture 7 Gate Level Minimization
Digital Logic Lecture 7 Gate Level Minimization By Ghada AlMashaqbeh The Hashemite University Computer Engineering Department Outline Introduction. Kmap principles. Simplification using Kmaps. Don tcare
More informationCSCI 220: Computer Architecture I Instructor: Pranava K. Jha. Simplification of Boolean Functions using a Karnaugh Map
CSCI 22: Computer Architecture I Instructor: Pranava K. Jha Simplification of Boolean Functions using a Karnaugh Map Q.. Plot the following Boolean function on a Karnaugh map: f(a, b, c, d) = m(, 2, 4,
More informationCombinational Logic Circuits
Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical
More informationIT 201 Digital System Design Module II Notes
IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.
More informationDKT 122/3 DIGITAL SYSTEM 1
Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits
More informationSWITCHING THEORY AND LOGIC CIRCUITS
SWITCHING THEORY AND LOGIC CIRCUITS COURSE OBJECTIVES. To understand the concepts and techniques associated with the number systems and codes 2. To understand the simplification methods (Boolean algebra
More informationQUESTION BANK FOR TEST
CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice
More informationChapter 3 Simplification of Boolean functions
3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean
More informationLiteral Cost F = BD + A B C + A C D F = BD + A B C + A BD + AB C F = (A + B)(A + D)(B + C + D )( B + C + D) L = 10
Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm
More informationClass Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: Introduction to UnitI 2. SKILLS ADDRESSED: Listening I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi
More informationUNIT II. Circuit minimization
UNIT II Circuit minimization The complexity of the digital logic gates that implement a Boolean function is directly related to the complexity of the algebraic expression from which the function is implemented.
More informationSpecifying logic functions
CSE4: Components and Design Techniques for Digital Systems Specifying logic functions Instructor: Mohsen Imani Slides from: Prof.Tajana Simunic and Dr.Pietro Mercati We have seen various concepts: Last
More informationChapter 2 Boolean algebra and Logic Gates
Chapter 2 Boolean algebra and Logic Gates 2. Introduction In working with logic relations in digital form, we need a set of rules for symbolic manipulation which will enable us to simplify complex expressions
More informationCode No: 07A3EC03 Set No. 1
Code No: 07A3EC03 Set No. 1 II B.Tech I Semester Regular Examinations, November 2008 SWITCHING THEORY AND LOGIC DESIGN ( Common to Electrical & Electronic Engineering, Electronics & Instrumentation Engineering,
More informationVerilog for Combinational Circuits
Verilog for Combinational Circuits LanDa Van ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2014 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/
More informationCombinational Logic & Circuits
WeekI Combinational Logic & Circuits Spring' 232  Logic Design Page Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other
More informationGateLevel Minimization. section instructor: Ufuk Çelikcan
GateLevel Minimization section instructor: Ufuk Çelikcan Compleity of Digital Circuits Directly related to the compleity of the algebraic epression we use to build the circuit. Truth table may lead to
More informationExperiment 4 Boolean Functions Implementation
Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.
More informationCHAPTER2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, KMap and QuineMcCluskey
CHAPTER2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, KMap and QuineMcCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems
More informationLecture 5. Chapter 2: Sections 47
Lecture 5 Chapter 2: Sections 47 Outline Boolean Functions What are Canonical Forms? Minterms and Maxterms Index Representation of Minterms and Maxterms SumofMinterm (SOM) Representations ProductofMaxterm
More information1. Mark the correct statement(s)
1. Mark the correct statement(s) 1.1 A theorem in Boolean algebra: a) Can easily be proved by e.g. logic induction b) Is a logical statement that is assumed to be true, c) Can be contradicted by another
More informationCS8803: Advanced Digital Design for Embedded Hardware
CS883: Advanced Digital Design for Embedded Hardware Lecture 2: Boolean Algebra, Gate Network, and Combinational Blocks Instructor: Sung Kyu Lim (limsk@ece.gatech.edu) Website: http://users.ece.gatech.edu/limsk/course/cs883
More informationStandard Forms of Expression. Minterms and Maxterms
Standard Forms of Expression Minterms and Maxterms Standard forms of expressions We can write expressions in many ways, but some ways are more useful than others A sum of products (SOP) expression contains:
More informationPoints Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map
Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions SumofProducts (SOP),
More informationCMPE223/CMSE222 Digital Logic
CMPE223/CMSE222 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum ProductofSums Forms, Incompletely Specified Functions Terminology For a given term, each
More informationChapter 2: Combinational Systems
Uchechukwu Ofoegbu Chapter 2: Combinational Systems Temple University Adapted from Alan Marcovitz s Introduction to Logic and Computer Design Riddle Four switches can be turned on or off. One is the switch
More informationS1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017
S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017 Karnaugh Map Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and
More informationCh. 5 : Boolean Algebra &
Ch. 5 : Boolean Algebra & Reduction elektronik@fisika.ui.ac.id Objectives Should able to: Write Boolean equations for combinational logic applications. Utilize Boolean algebra laws and rules for simplifying
More informationPhiladelphia University Faculty of Information Technology Department of Computer Science. Computer Logic Design. By Dareen Hamoudeh.
Philadelphia University Faculty of Information Technology Department of Computer Science Computer Logic Design By Dareen Hamoudeh Dareen Hamoudeh 1 Canonical Forms (Standard Forms of Expression) Minterms
More informationR.M.D. ENGINEERING COLLEGE R.S.M. Nagar, Kavaraipettai
L T P C R.M.D. ENGINEERING COLLEGE R.S.M. Nagar, Kavaraipettai 601206 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EC8392 UNIT  I 3 0 0 3 OBJECTIVES: To present the Digital fundamentals, Boolean
More information2.6 BOOLEAN FUNCTIONS
2.6 BOOLEAN FUNCTIONS Binary variables have two values, either 0 or 1. A Boolean function is an expression formed with binary variables, the two binary operators AND and OR, one unary operator NOT, parentheses
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Supplementary Examinations, February 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science
More informationBawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University
Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of
More informationSwitching Circuits & Logic Design
Switching Circuits & Logic Design JieHong Roland Jiang 江介宏 Department of Electrical Engineering National Taiwan University Fall 23 5 Karnaugh Maps Kmap Walks and Gray Codes http://asicdigitaldesign.wordpress.com/28/9/26/kmapswalksandgraycodes/
More informationMUX using TriState Buffers. Chapter 2  Part 2 1
MUX using TriState Buffers Chapter 2  Part 2 Systematic Simplification A Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle
More informationCombinational Circuits Digital Logic (Materials taken primarily from:
Combinational Circuits Digital Logic (Materials taken primarily from: http://www.facstaff.bucknell.edu/mastascu/elessonshtml/eeindex.html http://www.cs.princeton.edu/~cos126 ) Digital Systems What is a
More informationLecture 4: Implementation AND, OR, NOT Gates and Complement
EE210: Switching Systems Lecture 4: Implementation AND, OR, NOT Gates and Complement Prof. YingLi Tian Feb. 13, 2018 Department of Electrical Engineering The City College of New York The City University
More informationB.Tech II Year I Semester (R13) Regular Examinations December 2014 DIGITAL LOGIC DESIGN
B.Tech II Year I Semester () Regular Examinations December 2014 (Common to IT and CSE) (a) If 1010 2 + 10 2 = X 10, then X is  Write the first 9 decimal digits in base 3. (c) What is meant by don
More informationComputer Science. Unit4: Introduction to Boolean Algebra
Unit4: Introduction to Boolean Algebra Learning Objective At the end of the chapter students will: Learn Fundamental concepts and basic laws of Boolean algebra. Learn about Boolean expression and will
More informationMenu. Algebraic Simplification  Boolean Algebra EEL3701 EEL3701. MSOP, MPOS, Simplification
Menu Minterms & Maxterms SOP & POS MSOP & MPOS Simplification using the theorems/laws/axioms Look into my... 1 Definitions (Review) Algebraic Simplification  Boolean Algebra Minterms (written as m i ):
More informationReview: Standard forms of expressions
Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can be combined to form complex expressions, which can
More informationDigital Design. Chapter 4. Principles Of. Simplification of Boolean Functions
Principles Of Digital Design Chapter 4 Simplification of Boolean Functions Karnaugh Maps Don t Care Conditions Technology Mapping Optimization, Conversions, Decomposing, Retiming Boolean Cubes for n =,
More informationCombinational Logic Circuits Part III Theoretical Foundations
Combinational Logic Circuits Part III Theoretical Foundations Overview Simplifying Boolean Functions Algebraic Manipulation Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables) Systematic
More informationECE380 Digital Logic
ECE38 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum ProductofSums Forms, Incompletely Specified Functions Dr. D. J. Jackson Lecture 8 Terminology For
More informationBoolean Algebra and Logic Gates
Boolean Algebra and Logic Gates Binary logic is used in all of today's digital computers and devices Cost of the circuits is an important factor Finding simpler and cheaper but equivalent circuits can
More informationPresented By : Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak
Presented By : Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak Content  Introduction 2 Feature 3 Feature of BJT 4 TTL 5 MOS 6 CMOS 7 K Map  Introduction Logic IC ASIC: Application Specific
More informationKarnaugh Map (KMap) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using Kmap
Karnaugh Map (KMap) Ch. 2.4 Ch. 2.5 Simplification using Kmap A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or
More informationIncompletely Specified Functions with Don t Cares 2Level Transformation Review Boolean Cube KarnaughMap Representation and Methods Examples
Lecture B: Logic Minimization Incompletely Specified Functions with Don t Cares 2Level Transformation Review Boolean Cube KarnaughMap Representation and Methods Examples Incompletely specified functions
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2006 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems
More informationLSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology
LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a
More informationBOOLEAN ALGEBRA. Logic circuit: 1. From logic circuit to Boolean expression. Derive the Boolean expression for the following circuits.
COURSE / CODE DIGITAL SYSTEMS FUNDAMENTAL (ECE 421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE 422) BOOLEAN ALGEBRA Boolean Logic Boolean logic is a complete system for logical operations. It is used in countless
More informationComputer Engineering Chapter 3 Boolean Algebra
Computer Engineering Chapter 3 Boolean Algebra Hiroaki Kobayashi 5/30/2011 Ver. 06102011 5/30/2011 Computer Engineering 1 Agenda in Chapter 3 What is Boolean Algebra Basic Boolean/Logical Operations (Operators)
More informationSlide Set 5. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary
Slide Set 5 for ENEL 353 Fall 207 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 207 SN s ENEL 353 Fall 207 Slide Set 5 slide
More informationVariable, Complement, and Literal are terms used in Boolean Algebra.
We have met gate logic and combination of gates. Another way of representing gate logic is through Boolean algebra, a way of algebraically representing logic gates. You should have already covered the
More informationNH 67, Karur Trichy Highways, Puliyur C.F, Karur District DEPARTMENT OF INFORMATION TECHNOLOGY CS 2202 DIGITAL PRINCIPLES AND SYSTEM DESIGN
NH 67, Karur Trichy Highways, Puliyur C.F, 639 114 Karur District DEPARTMENT OF INFORMATION TECHNOLOGY CS 2202 DIGITAL PRINCIPLES AND SYSTEM DESIGN UNIT 1 BOOLEAN ALGEBRA AND LOGIC GATES Review of binary
More informationDIGITAL CIRCUIT LOGIC UNIT 7: MULTILEVEL GATE CIRCUITS NAND AND NOR GATES
DIGITAL CIRCUIT LOGIC UNIT 7: MULTILEVEL GATE CIRCUITS NAND AND NOR GATES 1 iclicker Question 13 Considering the KMap, f can be simplified as (2 minutes): A) f = b c + a b c B) f = ab d + a b d AB CD
More informationCS February 17
Discrete Mathematics CS 26 February 7 Equal Boolean Functions Two Boolean functions F and G of degree n are equal iff for all (x n,..x n ) B, F (x,..x n ) = G (x,..x n ) Example: F(x,y,z) = x(y+z), G(x,y,z)
More informationBoolean Function Simplification
Universit of Wisconsin  Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Charles R. Kime Section Fall 200 Chapter 2 Combinational Logic Circuits Part 5 Charles Kime & Thomas Kaminski Boolean Function
More informationBOOLEAN ALGEBRA. 1. State & Verify Laws by using :
BOOLEAN ALGEBRA. State & Verify Laws by using :. State and algebraically verify Absorption Laws. (2) Absorption law states that (i) X + XY = X and (ii) X(X + Y) = X (i) X + XY = X LHS = X + XY = X( + Y)
More informationSummary. Boolean Addition
Summary Boolean Addition In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable can only have a value of or 0. The complement represents the inverse
More informationModule 7. Karnaugh Maps
1 Module 7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or SumofMinterms (SOM) 2.4 Canonical product of sum or ProductofMaxterms(POM)
More informationNODIA AND COMPANY. GATE SOLVED PAPER Computer Science Engineering Digital Logic. Copyright By NODIA & COMPANY
No part of this publication may be reproduced or distributed in any form or any means, electronic, mechanical, photocopying, or otherwise without the prior permission of the author. GATE SOLVED PAPER Computer
More informationGraduate Institute of Electronics Engineering, NTU. CH5 Karnaugh Maps. Lecturer: 吳安宇教授 Date:2006/10/20 ACCESS IC LAB
CH5 Karnaugh Maps Lecturer: 吳安宇教授 Date:2006/0/20 CCESS IC L Problems in lgebraic Simplification The procedures are difficult to apply in a systematic way. It is difficult to tell when you have arrived
More informationLecture (05) Boolean Algebra and Logic Gates
Lecture (05) Boolean Algebra and Logic Gates By: Dr. Ahmed ElShafee ١ Minterms and Maxterms consider two binary variables x and y combined with an AND operation. Since eachv ariable may appear in either
More informationDepartment of Electrical and Computer Engineering University of Wisconsin  Madison. ECE/CS 352 Digital System Fundamentals.
Department of Electrical and Computer Engineering University of Wisconsin  Madison ECE/C 352 Digital ystem Fundamentals Quiz #2 Thursday, March 7, 22, 7:158:3PM 1. (15 points) (a) (5 points) NAND, NOR
More informationBinary logic. Dr.AbuArqoub
Binary logic Binary logic deals with variables like (a, b, c,, x, y) that take on two discrete values (, ) and with operations that assume logic meaning ( AND, OR, NOT) Truth table is a table of all possible
More informationGATE Exercises on Boolean Logic
GATE Exerces on Boolean Logic 1 Abstract Th problem set has questions related to Boolean logic and gates taken from GATE papers over the last twenty years. Teachers can use the problem set for courses
More informationBawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University
Logic Design First Stage Lecture No.5 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Boolean Operations Laws of Boolean Algebra Rules of Boolean Algebra
More informationChapter 3. Boolean Algebra and Digital Logic
Chapter 3 Boolean Algebra and Digital Logic Chapter 3 Objectives Understand the relationship between Boolean logic and digital computer circuits. Learn how to design simple logic circuits. Understand how
More informationUniversity of Technology
University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 5 & 6 Minimization with Karnaugh Maps Karnaugh maps lternate way of representing oolean function ll rows
More informationChapter 2 Part 5 Combinational Logic Circuits
Universit of Wisconsin  Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Kewal K. Saluja and Yu Hen Hu Spring 2002 Chapter 2 Part 5 Combinational Logic Circuits Originals b: Charles R. Kime and Tom
More information