Gate Level Minimization


 Rafe Whitehead
 5 years ago
 Views:
Transcription
1 Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch
2 Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 = A(AB () ) T2 = A(AB) T = (AA)B T7 = AB T3 Digital Logic Design Ch2
3 Simplify the following Boolean functions to a minimum number of literals. Digital Logic Design Ch3
4 Simplify the following Boolean functions to a minimum number of literals. Y=AB+A(A+C)+B(A+C) Solution Y=AB+AA+AC+AB+BC Y=AB+A+AC+BA+BC Y=AB+A+AC+BC Y=A(B++C)+BC Y=A +BC Y=A+BC T (A.A=A) T (A+A=A) T (A+=A) T (A.=A) Before Simplification Y=AB+A(A+C)+B(A+C) After Simplification Y=A+BC Digital Logic Design Ch4
5 Simplify the following Boolean functions to a minimum number of literals. Solution Digital Logic Design Ch5
6 quiz Simplify the following Boolean functions to a minimum number of literals. Digital Logic Design Ch6
7 DeMorgan s Theorem Y = AB = A + B A B A B Y Y Y = A + B = A B A B A B Y Y Digital Logic Design Ch7
8 Properties of NAND Gate Basic Gates Representation Using NAND Gate NOT Gate AND Gate OR Gate NOR Digital Logic Design Ch8
9 Properties of NOR Gate Basic Gates Representation Using NOR Gate NOT Gate AND Gate OR Gate NAND Digital Logic Design Ch9
10  Simplify The Following Boolean Expressions Using De Morgan Theories? Solution Implementation of Boolean Function using NAND Gate 2 Simplify The Following Boolean Expressions Using De Morgan Theories? Implementation of Boolean Function using NOR Gate Digital Logic Design Ch
11 Apply De Morgan Theories Implementation using NANDNOR Gates Y [(AB)C] [(DE)F] = [(AB)C] [(DE)F] = (AB)C+(DE)F = (A+B)C+(D+E)F Y [(A B) C] [(D E) F] = [(A B) C] [(D E) F] = [(A B) C] [(D E) F] = [(AB) C] [(DE) F] Digital Logic Design Ch
12 quiz Apply De Morgan Theories on the following Boolean Functions? Digital Logic Design Ch2
13 Conversion between Canonical Forms Sum of minterms: there are 2 n minterms and 2 2n combinations of function with n Boolean variables. Example: express F = A+BC' as a sum of minterms. F = A+B'C = A (B+B') + B'C = AB +AB' + B'C = AB(C+C') + AB'(C+C') + (A+A')B'C = ABC+ABC'+AB'C+AB'C'+A'B'C F = A'B'C +AB'C' +AB'C+ABC'+ ABC = m + m 4 +m 5 + m 6 + m 7 F(A, B, C) = S(, 4, 5, 6, 7) or, built the truth table first Digital Logic Design Ch3
14 Conversion between Canonical Forms Product of Maxterms Product of maxterms: using distributive law to expand. x + yz = (x + y)(x + z) = (x+y+zz')(x+z+yy') = (x+y+z)(x+y+z')(x+y'+z) Example : express F = xy + x'z as a product of maxterms. F = xy + x'z = (xy + x')(xy +z) = (x+x')(y+x')(x+z)(y+z) = (x'+y)(x+z)(y+z) x'+y = x' + y + zz' = (x'+y+z)(x'+y+z') F = (x+y+z)(x+y'+z)(x'+y+z)(x'+y+z') = M M 2 M 4 M 5 F(x, y, z) = P(, 2, 4, 5) Digital Logic Design Ch4
15 Conversion between Canonical Forms The complement of a function expressed as the sum of minterms equals the sum of minterms missing from the original function. F(A, B, C) = S(, 4, 5, 6, 7) Thus, F'(A, B, C) = S(, 2, 3) By DeMorgan's theorem F(A, B, C) = P(, 2, 3) F'(A, B, C) =P (, 4, 5, 6, 7) m j ' = M j Sum of minterms = product of maxterms Interchange the symbols S and P and list those numbers missing from the original form» S of 's» P of 's Digital Logic Design Ch5
16 Example F = xy + x z F(x, y, z) = S(, 3, 6, 7) F(x, y, z) = P (, 2, 4, 6) Digital Logic Design Ch6
17 Standard Forms Canonical forms are very seldom the ones with the least number of literals. Standard forms: the terms that form the function may obtain one, two, or any number of literals. Sum of products: F = y' + xy+ x'yz' Product of sums: F 2 = x(y'+z)(x'+y+z') F 3 = A'B'CD+ABC'D' Digital Logic Design Ch7
18 Twolevel implementation Implementation Multilevel implementation Digital Logic Design Ch8
19 Simplification using Karnaughmap Types of kmaps KMap for 2 Variables KMap for 3Variables KMap for 4Variables Digital Logic Design Ch9
20 Karnaugh Maps (KMaps) Boolean expressions can be minimized by combining terms Kmaps minimize equations graphically PA + PA = P A B C Y Y C AB Y AB C ABC ABC ABC ABC ABC ABC ABC ABC Digital Logic Design Ch2
21 KMap Definitions Complement: variable with a bar over it A, B, C Literal: variable or its complement A, A, B, B, C, C Implicant: product of literals ABC, AC, BC Prime implicant : implicant corresponding to the largest circle in a Kmap Digital Logic Design Ch2
22 KMap Rules Every must be circled at least once Each circle must span a power of 2 (i.e., 2, 4) squares in each direction Each circle must be as large as possible A circle may wrap around the edges A don't care (X) is circled only if it helps minimize the equation Digital Logic Design Ch22
23 2Inputs KMap Use kmap to simplify the following truth table Inputs Output A B Y Y A. B A. B A. B B B A A A B After Simplification Y A B Digital Logic Design Ch23
24 A twovariable map Four minterms x' = row ; x = row y' = column ; y = column A truth table in square diagram Fig. (a): xy = m 3 Fig. 2(b): x+y = x'y+xy'+xy ) Twovariable Map = m +m 2 +m 3 2) Representation of functions in the map Digital Logic Design Ch24
25 3Inputs KMap Y AB C ABC ABC ABC ABC ABC ABC ABC ABC A Truth Table KMap Y B C Y AB C Y = AB + BC Digital Logic Design Ch25
26 3Inputs KMap A threevariable map Eight minterms The Gray code sequence Any two adjacent squares in the map differ by only on variable» Primed in one square and unprimed in the other» e.g., m 5 and m 7 can be simplified» m 5 + m 7 = xy'z + xyz = xz (y'+y) = xz Threevariable Map Digital Logic Design Ch26
27 3Inputs KMap m and m 2 (m 4 and m 6 ) are adjacent m + m 2 = x'y'z' + x'yz' = x'z' (y'+y) = x'z' m 4 + m 6 = xy'z' + xyz' = xz' (y'+y) = xz' Digital Logic Design Ch27
28 3Inputs KMap Inputs Output A. B C Y A. B. C A. B. C A. B. C A. B. C A. B. C Y C A B Digital Logic Design Ch28
29 3Inputs KMap Example: simplify the Boolean function F(x, y, z) = S(2, 3, 4, 5) F(x, y, z) = S(2, 3, 4, 5) = x'y + xy' Map for Example F(x, y, z) = Σ(2, 3, 4, 5) = x'y + xy' Digital Logic Design Ch29
30 3Inputs KMap Example : simplify F(x, y, z) = S(3, 4, 6, 7) F(x, y, z) = S(3, 4, 6, 7) = yz+ xz' Map for Example ; F(x, y, z) = Σ(3, 4, 6, 7) = yz + xz' Digital Logic Design Ch3
31 3Inputs KMap Consider four adjacent squares 2, 4, and 8 squares m +m 2 +m 4 +m 6 = x'y'z'+x'yz'+xy'z'+xyz' = x'z'(y'+y) +xz'(y'+y) = x'z' + xz = z' m +m 3 +m 5 +m 7 = x'y'z+x'yz+xy'z+xyz =x'z(y'+y) + xz(y'+y) =x'z + xz = z Digital Logic Design Ch3
32 3Inputs KMap Example 3.3: simplify F(x, y, z) = S(, 2, 4, 5, 6) F(x, y, z) = S(, 2, 4, 5, 6) = z'+ xy' F(x, y, z) = Σ(, 2, 4, 5, 6) = z' +xy' Digital Logic Design Ch32
33 3Inputs KMap Example : let F = A'C + A'B + AB'C + BC a) Express it in sum of minterms. b) Find the minimal sum of products expression. Ans: F(A, B, C) S(, 2, 3, 5, 7) = C + A'B Map for Example 3.4, A'C + A'B + AB'C + BC = C + A'B Digital Logic Design Ch33
34 4Inputs KMap The map 6 minterms Combinations of 2, 4, 8, and 6 adjacent squares Fourvariable Map Digital Logic Design Ch34
35 4Inputs KMap Example : simplify F(w, x, y, z) = S(,, 2, 4, 5, 6, 8, 9, 2, 3, 4) F = y'+w'z'+xz' Map for Example; F(w, x, y, z) = Σ(,, 2, 4, 5, 6, 8, 9, 2, 3, 4) = y' + w' z' +xz' Digital Logic Design Ch35
36 4Inputs KMap Example : simplify F = A B C + B CD + A B C D + AB C Map for Example ; A B C + B CD + A B C D + AB C = B D + B C +A CD Digital Logic Design Ch36
37 4Inputs KMap A B C D Y Y CD AB Y = AC + ABD + ABC + BD Digital Logic Design Ch37
38 4Inputs KMap A B C D Y X X X X X X X Y AB CD X X X X X Y = A + BD + C X X Digital Logic Design Ch38
39 4Inputs KMap INPUTS OUTPUT Digital Logic Design Ch39
40 4Input KMap Before Simplification Before Simplification Y ABCD ABCD ABCD ABCD Y ABCD ABCD ABCD ABCD +ABCD+ABCD+ABCD+ABCD + ABCD+ABCD+ABCD After Simplification After Simplification +ABCD+ABCD+ABCD+ABCD + ABCD+ABCD+ABCD Y ABC AD AD AB Y AC D BC Digital Logic Design Ch4
41 4Inputs KMap Before Simplification Before Simplification After Simplification After Simplification Digital Logic Design Ch4
42 Example: implement F( x, y, z) (,2,3,4,5,7) F( x, y, z) xy x y z Digital Logic Design Ch42
43 Mano  KMap Quiz  Simplify the following Boolean functions, using Karnaugh maps: (a) * F (x, y, z) = (2, 3, 6, 7) (b) * F (A, B, C, D) = (4, 6, 7, 5) (c) * F (A, B, C, D) = (3, 7,, 3, 4, 5) (d) * F (w, x, y, z) = (2, 3, 2, 3, 4, 5) (e) F (w, x, y, z) = (, 2, 3, 4, 5) (f) F (w, x, y, z) = (8,, 2, 3, 4) 2 Simplify the following Boolean functions, using fourvariable maps: (a) * F (w, x, y, z) = (, 4, 5, 6, 2, 4, 5) (b) F (A, B, C, D) = (2, 3, 6, 7, 2, 3, 4) (c) F (w, x, y, z) = (, 3, 4, 5, 6, 7, 9,, 3, 5) (d) * F (A, B, C, D) = (, 2, 4, 5, 6, 7, 8,, 3, 5) 3 Simplify the following Boolean expressions, using fourvariable maps: (a) * A B C D + AC D + B CD + A BCD + BC D (b) * x z + w xy + w (x y + xy ) (c) A B C D + AB D + A BC + ABCD + AB C (d) A B C D + BC D + A C D + A BCD + ACD 4 Simplify the following Boolean expressions, using fourvariable maps: (a) * w z + xz + x y + wx z (b) AD + B C D + BCD + BC D (c) * AB C + B C D + BCD+ ACD + A B C + A BC D (d) wxy + xz + wx z + w x Digital Logic Design Ch43
44 Multilevel NAND Circuits Boolean function implementation ANDOR logic NANDNAND logic» AND AND + inverter» OR: inverter + OR = NAND» For every bubble that is not compensated by another small circle along the same line, insert an inverter. Implementing F = A(CD + B) + BC Digital Logic Design Ch44
45 NAND Implementation Implementing F = (AB +A B)(C+ D ) Digital Logic Design Ch45
46 NOR Implementation NOR function is the dual of NAND function. The NOR gate is also universal. Logic Operation with NOR Gates Digital Logic Design Ch46
47 NOR Implementation Example: F = (AB +A B)(C + D ) Implementing F = (AB +A B)(C + D ) with NOR gates Digital Logic Design Ch47
48 General Quiz  Use KMap to Simplify the following Boolean Functions F ABCD ABCD ABCD ABCD ABCD ABCD F ABCD ABCD ABCD ABCD ABCD ABCD ABCD F ABCD ABCD ABCD ABCD ABCD F ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD 2Simplify the following Boolean equations using Boolean theorems. Check for correctness using a truth table or K map. 3Simplify each of the following Boolean equations. Sketch a reasonably simple combinational circuit implementing the simplified equation. Digital Logic Design Ch48
49 Quiz 4 Write Boolean equations for the circuit in Figure : 5 Minimize the Boolean equations from Exercise 4 and sketch an improved circuit with the same function? Digital Logic Design Ch49
50 Quiz 6 Write a Boolean equation in sumofproducts canonical form for each of the truth tables in Figure  Write a Boolean equation in productofsums canonical form for the truth tables in Figure?  Minimize each of the Boolean equations from Exercise Digital Logic Design Ch5
51 Quiz 7 Using De Morgan equivalent gates and bubble pushing methods, redraw the circuit in Figure so that you can find the Boolean equation by inspection. Write the Boolean equation. Digital Logic Design Ch5
GateLevel Minimization
GateLevel Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2011 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method
More informationGate Level Minimization Map Method
Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically
More informationGateLevel Minimization
GateLevel Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method
More informationGateLevel Minimization
MEC520 디지털공학 GateLevel Minimization JeeHwan Ryu School of Mechanical Engineering GateLevel MinimizationThe Map Method Truth table is unique Many different algebraic expression Boolean expressions may
More informationChapter 3. GateLevel Minimization. Outlines
Chapter 3 GateLevel Minimization Introduction The Map Method FourVariable Map FiveVariable Map Outlines Product of Sums Simplification Don tcare Conditions NAND and NOR Implementation Other TwoLevel
More information2.1 Binary Logic and Gates
1 EED2003 Digital Design Presentation 2: Boolean Algebra Asst. Prof.Dr. Ahmet ÖZKURT Asst. Prof.Dr Hakkı T. YALAZAN Based on the Lecture Notes by Jaeyoung Choi choi@comp.ssu.ac.kr Fall 2000 2.1 Binary
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter
More informationUnitIV Boolean Algebra
UnitIV Boolean Algebra Boolean Algebra Chapter: 08 Truth table: Truth table is a table, which represents all the possible values of logical variables/statements along with all the possible results of
More informationA B AB CD Objectives:
Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter
More informationChapter 3 Simplification of Boolean functions
3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean
More informationExperiment 3: Logic Simplification
Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed ElSaied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions
More informationDigital Logic Design. Outline
Digital Logic Design GateLevel Minimization CSE32 Fall 2 Outline The Map Method 2,3,4 variable maps 5 and 6 variable maps (very briefly) Product of sums simplification Don t Care conditions NAND and NOR
More informationDKT 122/3 DIGITAL SYSTEM 1
Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits
More informationIT 201 Digital System Design Module II Notes
IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.
More informationAssignment (36) Boolean Algebra and Logic Simplification  General Questions
Assignment (36) Boolean Algebra and Logic Simplification  General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make
More informationChapter 2 Boolean algebra and Logic Gates
Chapter 2 Boolean algebra and Logic Gates 2. Introduction In working with logic relations in digital form, we need a set of rules for symbolic manipulation which will enable us to simplify complex expressions
More informationSimplification of Boolean Functions
Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.
More informationCSCI 220: Computer Architecture I Instructor: Pranava K. Jha. Simplification of Boolean Functions using a Karnaugh Map
CSCI 22: Computer Architecture I Instructor: Pranava K. Jha Simplification of Boolean Functions using a Karnaugh Map Q.. Plot the following Boolean function on a Karnaugh map: f(a, b, c, d) = m(, 2, 4,
More information2.6 BOOLEAN FUNCTIONS
2.6 BOOLEAN FUNCTIONS Binary variables have two values, either 0 or 1. A Boolean function is an expression formed with binary variables, the two binary operators AND and OR, one unary operator NOT, parentheses
More informationChapter 2. Boolean Expressions:
Chapter 2 Boolean Expressions: A Boolean expression or a function is an expression which consists of binary variables joined by the Boolean connectives AND and OR along with NOT operation. Any Boolean
More informationX Y Z F=X+Y+Z
This circuit is used to obtain the compliment of a value. If X = 0, then X = 1. The truth table for NOT gate is : X X 0 1 1 0 2. OR gate : The OR gate has two or more input signals but only one output
More informationCombinational Logic Circuits
Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical
More informationLiteral Cost F = BD + A B C + A C D F = BD + A B C + A BD + AB C F = (A + B)(A + D)(B + C + D )( B + C + D) L = 10
Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm
More informationENGINEERS ACADEMY. 7. Given Boolean theorem. (a) A B A C B C A B A C. (b) AB AC BC AB BC. (c) AB AC BC A B A C B C.
Digital Electronics Boolean Function QUESTION BANK. The Boolean equation Y = C + C + C can be simplified to (a) (c) A (B + C) (b) AC (d) C. The Boolean equation Y = (A + B) (A + B) can be simplified to
More information數位系統 Digital Systems 朝陽科技大學資工系. Speaker: FuwYi Yang 楊伏夷. 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象, 視之不可見者曰夷
數位系統 Digital Systems Department of Computer Science and Information Engineering, Chaoyang University of Technology 朝陽科技大學資工系 Speaker: FuwYi Yang 楊伏夷 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象,
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard
More informationCombinational Logic Circuits
Chapter 2 Combinational Logic Circuits J.J. Shann (Slightly trimmed by C.P. Chung) Chapter Overview 21 Binary Logic and Gates 22 Boolean Algebra 23 Standard Forms 24 TwoLevel Circuit Optimization
More informationIncompletely Specified Functions with Don t Cares 2Level Transformation Review Boolean Cube KarnaughMap Representation and Methods Examples
Lecture B: Logic Minimization Incompletely Specified Functions with Don t Cares 2Level Transformation Review Boolean Cube KarnaughMap Representation and Methods Examples Incompletely specified functions
More informationSimplification of Boolean Functions
COM111 Introduction to Computer Engineering (Fall 20062007) NOTES 5  page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean
More informationBOOLEAN ALGEBRA. 1. State & Verify Laws by using :
BOOLEAN ALGEBRA. State & Verify Laws by using :. State and algebraically verify Absorption Laws. (2) Absorption law states that (i) X + XY = X and (ii) X(X + Y) = X (i) X + XY = X LHS = X + XY = X( + Y)
More informationComputer Science. Unit4: Introduction to Boolean Algebra
Unit4: Introduction to Boolean Algebra Learning Objective At the end of the chapter students will: Learn Fundamental concepts and basic laws of Boolean algebra. Learn about Boolean expression and will
More informationPhiladelphia University Faculty of Information Technology Department of Computer Science. Computer Logic Design. By Dareen Hamoudeh.
Philadelphia University Faculty of Information Technology Department of Computer Science Computer Logic Design By Dareen Hamoudeh Dareen Hamoudeh 1 Canonical Forms (Standard Forms of Expression) Minterms
More informationModule 7. Karnaugh Maps
1 Module 7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or SumofMinterms (SOM) 2.4 Canonical product of sum or ProductofMaxterms(POM)
More informationGateLevel Minimization. BME208 Logic Circuits Yalçın İŞLER
GateLevel Minimization BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Complexity of Digital Circuits Directly related to the complexity of the algebraic expression we use to
More informationUNIT4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable.
UNIT4 BOOLEAN LOGIC Boolean algebra is an algebra that deals with Boolean values((true and FALSE). Everyday we have to make logic decisions: Should I carry the book or not?, Should I watch TV or not?
More informationGet Free notes at ModuleI One s Complement: Complement all the bits.i.e. makes all 1s as 0s and all 0s as 1s Two s Complement: One s complement+1 SIGNED BINARY NUMBERS Positive integers (including zero)
More informationSWITCHING THEORY AND LOGIC CIRCUITS
SWITCHING THEORY AND LOGIC CIRCUITS COURSE OBJECTIVES. To understand the concepts and techniques associated with the number systems and codes 2. To understand the simplification methods (Boolean algebra
More information2008 The McGrawHill Companies, Inc. All rights reserved.
28 The McGrawHill Companies, Inc. All rights reserved. 28 The McGrawHill Companies, Inc. All rights reserved. All or Nothing Gate Boolean Expression: A B = Y Truth Table (ee next slide) or AB = Y 28
More informationDigital Logic Lecture 7 Gate Level Minimization
Digital Logic Lecture 7 Gate Level Minimization By Ghada AlMashaqbeh The Hashemite University Computer Engineering Department Outline Introduction. Kmap principles. Simplification using Kmaps. Don tcare
More informationCS8803: Advanced Digital Design for Embedded Hardware
CS883: Advanced Digital Design for Embedded Hardware Lecture 2: Boolean Algebra, Gate Network, and Combinational Blocks Instructor: Sung Kyu Lim (limsk@ece.gatech.edu) Website: http://users.ece.gatech.edu/limsk/course/cs883
More informationChapter 2 Combinational
Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic
More informationLSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology
LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a
More informationUNIT II. Circuit minimization
UNIT II Circuit minimization The complexity of the digital logic gates that implement a Boolean function is directly related to the complexity of the algebraic expression from which the function is implemented.
More informationSpecifying logic functions
CSE4: Components and Design Techniques for Digital Systems Specifying logic functions Instructor: Mohsen Imani Slides from: Prof.Tajana Simunic and Dr.Pietro Mercati We have seen various concepts: Last
More informationExperiment 4 Boolean Functions Implementation
Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.
More informationSwitching Circuits & Logic Design
Switching Circuits & Logic Design JieHong Roland Jiang 江介宏 Department of Electrical Engineering National Taiwan University Fall 23 5 Karnaugh Maps Kmap Walks and Gray Codes http://asicdigitaldesign.wordpress.com/28/9/26/kmapswalksandgraycodes/
More informationLecture 5. Chapter 2: Sections 47
Lecture 5 Chapter 2: Sections 47 Outline Boolean Functions What are Canonical Forms? Minterms and Maxterms Index Representation of Minterms and Maxterms SumofMinterm (SOM) Representations ProductofMaxterm
More informationCHAPTER2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, KMap and QuineMcCluskey
CHAPTER2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, KMap and QuineMcCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input
More informationBoolean Algebra and Logic Gates
Boolean Algebra and Logic Gates Binary logic is used in all of today's digital computers and devices Cost of the circuits is an important factor Finding simpler and cheaper but equivalent circuits can
More informationChapter 2: Combinational Systems
Uchechukwu Ofoegbu Chapter 2: Combinational Systems Temple University Adapted from Alan Marcovitz s Introduction to Logic and Computer Design Riddle Four switches can be turned on or off. One is the switch
More informationCh. 5 : Boolean Algebra &
Ch. 5 : Boolean Algebra & Reduction elektronik@fisika.ui.ac.id Objectives Should able to: Write Boolean equations for combinational logic applications. Utilize Boolean algebra laws and rules for simplifying
More informationClass Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: Introduction to UnitI 2. SKILLS ADDRESSED: Listening I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi
More informationR.M.D. ENGINEERING COLLEGE R.S.M. Nagar, Kavaraipettai
L T P C R.M.D. ENGINEERING COLLEGE R.S.M. Nagar, Kavaraipettai 601206 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EC8392 UNIT  I 3 0 0 3 OBJECTIVES: To present the Digital fundamentals, Boolean
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Supplementary Examinations, February 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science
More informationComputer Engineering Chapter 3 Boolean Algebra
Computer Engineering Chapter 3 Boolean Algebra Hiroaki Kobayashi 5/30/2011 Ver. 06102011 5/30/2011 Computer Engineering 1 Agenda in Chapter 3 What is Boolean Algebra Basic Boolean/Logical Operations (Operators)
More informationQUESTION BANK FOR TEST
CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice
More informationKarnaugh Map (KMap) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using Kmap
Karnaugh Map (KMap) Ch. 2.4 Ch. 2.5 Simplification using Kmap A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or
More information1. Mark the correct statement(s)
1. Mark the correct statement(s) 1.1 A theorem in Boolean algebra: a) Can easily be proved by e.g. logic induction b) Is a logical statement that is assumed to be true, c) Can be contradicted by another
More informationMenu. Algebraic Simplification  Boolean Algebra EEL3701 EEL3701. MSOP, MPOS, Simplification
Menu Minterms & Maxterms SOP & POS MSOP & MPOS Simplification using the theorems/laws/axioms Look into my... 1 Definitions (Review) Algebraic Simplification  Boolean Algebra Minterms (written as m i ):
More informationLecture 4: Implementation AND, OR, NOT Gates and Complement
EE210: Switching Systems Lecture 4: Implementation AND, OR, NOT Gates and Complement Prof. YingLi Tian Feb. 13, 2018 Department of Electrical Engineering The City College of New York The City University
More informationBOOLEAN ALGEBRA. Logic circuit: 1. From logic circuit to Boolean expression. Derive the Boolean expression for the following circuits.
COURSE / CODE DIGITAL SYSTEMS FUNDAMENTAL (ECE 421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE 422) BOOLEAN ALGEBRA Boolean Logic Boolean logic is a complete system for logical operations. It is used in countless
More informationCode No: 07A3EC03 Set No. 1
Code No: 07A3EC03 Set No. 1 II B.Tech I Semester Regular Examinations, November 2008 SWITCHING THEORY AND LOGIC DESIGN ( Common to Electrical & Electronic Engineering, Electronics & Instrumentation Engineering,
More informationPoints Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map
Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions SumofProducts (SOP),
More informationStandard Forms of Expression. Minterms and Maxterms
Standard Forms of Expression Minterms and Maxterms Standard forms of expressions We can write expressions in many ways, but some ways are more useful than others A sum of products (SOP) expression contains:
More informationDigital Logic Design (CEN120) (3+1)
Digital Logic Design (CEN120) (3+1) ASSISTANT PROFESSOR Engr. Syed Rizwan Ali, MS(CAAD)UK, PDG(CS)UK, PGD(PM)IR, BS(CE)PK HEC Certified Master Trainer (MTFPDP) PEC Certified Professional Engineer (COM/2531)
More informationCombinational Logic & Circuits
WeekI Combinational Logic & Circuits Spring' 232  Logic Design Page Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other
More informationBinary logic. Dr.AbuArqoub
Binary logic Binary logic deals with variables like (a, b, c,, x, y) that take on two discrete values (, ) and with operations that assume logic meaning ( AND, OR, NOT) Truth table is a table of all possible
More informationReview: Standard forms of expressions
Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can be combined to form complex expressions, which can
More informationCMPE223/CMSE222 Digital Logic
CMPE223/CMSE222 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum ProductofSums Forms, Incompletely Specified Functions Terminology For a given term, each
More informationDigital Design. Chapter 4. Principles Of. Simplification of Boolean Functions
Principles Of Digital Design Chapter 4 Simplification of Boolean Functions Karnaugh Maps Don t Care Conditions Technology Mapping Optimization, Conversions, Decomposing, Retiming Boolean Cubes for n =,
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show
More informationGateLevel Minimization
GateLevel Minimization Mano & Ciletti Chapter 3 By Suleyman TOSUN Ankara University Outline Intro to GateLevel Minimization The Map Method 2345 variable map methods ProductofSums Method Don t care
More informationGATE Exercises on Boolean Logic
GATE Exerces on Boolean Logic 1 Abstract Th problem set has questions related to Boolean logic and gates taken from GATE papers over the last twenty years. Teachers can use the problem set for courses
More informationSlide Set 5. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary
Slide Set 5 for ENEL 353 Fall 207 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 207 SN s ENEL 353 Fall 207 Slide Set 5 slide
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2006 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems
More informationBawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University
Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of
More informationGraduate Institute of Electronics Engineering, NTU. CH5 Karnaugh Maps. Lecturer: 吳安宇教授 Date:2006/10/20 ACCESS IC LAB
CH5 Karnaugh Maps Lecturer: 吳安宇教授 Date:2006/0/20 CCESS IC L Problems in lgebraic Simplification The procedures are difficult to apply in a systematic way. It is difficult to tell when you have arrived
More informationECE380 Digital Logic
ECE38 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum ProductofSums Forms, Incompletely Specified Functions Dr. D. J. Jackson Lecture 8 Terminology For
More informationContents. Chapter 3 Combinational Circuits Page 1 of 34
Chapter 3 Combinational Circuits Page of 34 Contents Contents... 3 Combinational Circuits... 2 3. Analysis of Combinational Circuits... 2 3.. Using a Truth Table... 2 3..2 Using a Boolean unction... 4
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems
More informationTo write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map.
3.1 Objectives To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using. 3.2 Sum of Products & Product of Sums Any Boolean expression can be simplified
More informationCombinational Circuits Digital Logic (Materials taken primarily from:
Combinational Circuits Digital Logic (Materials taken primarily from: http://www.facstaff.bucknell.edu/mastascu/elessonshtml/eeindex.html http://www.cs.princeton.edu/~cos126 ) Digital Systems What is a
More informationSwitching Theory & Logic Design/Digital Logic Design Question Bank
Switching Theory & Logic Design/Digital Logic Design Question Bank UNIT I NUMBER SYSTEMS AND CODES 1. A 12bit Hamming code word containing 8bits of data and 4 parity bits is read from memory. What was
More informationLecture (05) Boolean Algebra and Logic Gates
Lecture (05) Boolean Algebra and Logic Gates By: Dr. Ahmed ElShafee ١ Minterms and Maxterms consider two binary variables x and y combined with an AND operation. Since eachv ariable may appear in either
More informationSummary. Boolean Addition
Summary Boolean Addition In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable can only have a value of or 0. The complement represents the inverse
More informationNH 67, Karur Trichy Highways, Puliyur C.F, Karur District DEPARTMENT OF INFORMATION TECHNOLOGY CS 2202 DIGITAL PRINCIPLES AND SYSTEM DESIGN
NH 67, Karur Trichy Highways, Puliyur C.F, 639 114 Karur District DEPARTMENT OF INFORMATION TECHNOLOGY CS 2202 DIGITAL PRINCIPLES AND SYSTEM DESIGN UNIT 1 BOOLEAN ALGEBRA AND LOGIC GATES Review of binary
More informationAnnouncements. Chapter 2  Part 1 1
Announcements If you haven t shown the grader your proof of prerequisite, please do so by 11:59 pm on 09/05/2018 (Wednesday). I will drop students that do not show us the prerequisite proof after this
More informationCS February 17
Discrete Mathematics CS 26 February 7 Equal Boolean Functions Two Boolean functions F and G of degree n are equal iff for all (x n,..x n ) B, F (x,..x n ) = G (x,..x n ) Example: F(x,y,z) = x(y+z), G(x,y,z)
More informationA graphical method of simplifying logic
45 Karnaugh Map Method A graphical method of simplifying logic equations or truth tables. Also called a K map. Theoretically can be used for any number of input variables, but practically limited to 5
More informationDr. S. Shirani COE2DI4 Midterm Test #1 Oct. 14, 2010
Dr. S. Shirani COE2DI4 Midterm Test #1 Oct. 14, 2010 Instructions: This examination paper includes 9 pages and 20 multiplechoice questions starting on page 3. You are responsible for ensuring that your
More informationVariable, Complement, and Literal are terms used in Boolean Algebra.
We have met gate logic and combination of gates. Another way of representing gate logic is through Boolean algebra, a way of algebraically representing logic gates. You should have already covered the
More informationGateLevel Minimization. section instructor: Ufuk Çelikcan
GateLevel Minimization section instructor: Ufuk Çelikcan Compleity of Digital Circuits Directly related to the compleity of the algebraic epression we use to build the circuit. Truth table may lead to
More informationDIGITAL CIRCUIT LOGIC UNIT 7: MULTILEVEL GATE CIRCUITS NAND AND NOR GATES
DIGITAL CIRCUIT LOGIC UNIT 7: MULTILEVEL GATE CIRCUITS NAND AND NOR GATES 1 iclicker Question 13 Considering the KMap, f can be simplified as (2 minutes): A) f = b c + a b c B) f = ab d + a b d AB CD
More informationBoolean Algebra. BME208 Logic Circuits Yalçın İŞLER
Boolean Algebra BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com 5 Boolean Algebra /2 A set of elements B There exist at least two elements x, y B s. t. x y Binary operators: +
More informationB.Tech II Year I Semester (R13) Regular Examinations December 2014 DIGITAL LOGIC DESIGN
B.Tech II Year I Semester () Regular Examinations December 2014 (Common to IT and CSE) (a) If 1010 2 + 10 2 = X 10, then X is  Write the first 9 decimal digits in base 3. (c) What is meant by don
More informationOutcomes. Unit 9. Logic Function Synthesis KARNAUGH MAPS. Implementing Combinational Functions with Karnaugh Maps
.. Outcomes Unit I can use Karnaugh maps to synthesize combinational functions with several outputs I can determine the appropriate size and contents of a memory to implement any logic function (i.e. truth
More informationBawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University
Logic Design First Stage Lecture No.5 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Boolean Operations Laws of Boolean Algebra Rules of Boolean Algebra
More informationUniversity of Technology
University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 5 & 6 Minimization with Karnaugh Maps Karnaugh maps lternate way of representing oolean function ll rows
More informationCombinational Logic Circuits
Combinational Logic Circuits By Dr. M. Hebaishy Digital Logic Design Ch Rem.!) Types of Logic Circuits Combinational Logic Memoryless Outputs determined by current values of inputs Sequential Logic Has
More information