Gate Level Minimization


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1 Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch
2 Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 = A(AB () ) T2 = A(AB) T = (AA)B T7 = AB T3 Digital Logic Design Ch2
3 Simplify the following Boolean functions to a minimum number of literals. Digital Logic Design Ch3
4 Simplify the following Boolean functions to a minimum number of literals. Y=AB+A(A+C)+B(A+C) Solution Y=AB+AA+AC+AB+BC Y=AB+A+AC+BA+BC Y=AB+A+AC+BC Y=A(B++C)+BC Y=A +BC Y=A+BC T (A.A=A) T (A+A=A) T (A+=A) T (A.=A) Before Simplification Y=AB+A(A+C)+B(A+C) After Simplification Y=A+BC Digital Logic Design Ch4
5 Simplify the following Boolean functions to a minimum number of literals. Solution Digital Logic Design Ch5
6 quiz Simplify the following Boolean functions to a minimum number of literals. Digital Logic Design Ch6
7 DeMorgan s Theorem Y = AB = A + B A B A B Y Y Y = A + B = A B A B A B Y Y Digital Logic Design Ch7
8 Properties of NAND Gate Basic Gates Representation Using NAND Gate NOT Gate AND Gate OR Gate NOR Digital Logic Design Ch8
9 Properties of NOR Gate Basic Gates Representation Using NOR Gate NOT Gate AND Gate OR Gate NAND Digital Logic Design Ch9
10  Simplify The Following Boolean Expressions Using De Morgan Theories? Solution Implementation of Boolean Function using NAND Gate 2 Simplify The Following Boolean Expressions Using De Morgan Theories? Implementation of Boolean Function using NOR Gate Digital Logic Design Ch
11 Apply De Morgan Theories Implementation using NANDNOR Gates Y [(AB)C] [(DE)F] = [(AB)C] [(DE)F] = (AB)C+(DE)F = (A+B)C+(D+E)F Y [(A B) C] [(D E) F] = [(A B) C] [(D E) F] = [(A B) C] [(D E) F] = [(AB) C] [(DE) F] Digital Logic Design Ch
12 quiz Apply De Morgan Theories on the following Boolean Functions? Digital Logic Design Ch2
13 Conversion between Canonical Forms Sum of minterms: there are 2 n minterms and 2 2n combinations of function with n Boolean variables. Example: express F = A+BC' as a sum of minterms. F = A+B'C = A (B+B') + B'C = AB +AB' + B'C = AB(C+C') + AB'(C+C') + (A+A')B'C = ABC+ABC'+AB'C+AB'C'+A'B'C F = A'B'C +AB'C' +AB'C+ABC'+ ABC = m + m 4 +m 5 + m 6 + m 7 F(A, B, C) = S(, 4, 5, 6, 7) or, built the truth table first Digital Logic Design Ch3
14 Conversion between Canonical Forms Product of Maxterms Product of maxterms: using distributive law to expand. x + yz = (x + y)(x + z) = (x+y+zz')(x+z+yy') = (x+y+z)(x+y+z')(x+y'+z) Example : express F = xy + x'z as a product of maxterms. F = xy + x'z = (xy + x')(xy +z) = (x+x')(y+x')(x+z)(y+z) = (x'+y)(x+z)(y+z) x'+y = x' + y + zz' = (x'+y+z)(x'+y+z') F = (x+y+z)(x+y'+z)(x'+y+z)(x'+y+z') = M M 2 M 4 M 5 F(x, y, z) = P(, 2, 4, 5) Digital Logic Design Ch4
15 Conversion between Canonical Forms The complement of a function expressed as the sum of minterms equals the sum of minterms missing from the original function. F(A, B, C) = S(, 4, 5, 6, 7) Thus, F'(A, B, C) = S(, 2, 3) By DeMorgan's theorem F(A, B, C) = P(, 2, 3) F'(A, B, C) =P (, 4, 5, 6, 7) m j ' = M j Sum of minterms = product of maxterms Interchange the symbols S and P and list those numbers missing from the original form» S of 's» P of 's Digital Logic Design Ch5
16 Example F = xy + x z F(x, y, z) = S(, 3, 6, 7) F(x, y, z) = P (, 2, 4, 6) Digital Logic Design Ch6
17 Standard Forms Canonical forms are very seldom the ones with the least number of literals. Standard forms: the terms that form the function may obtain one, two, or any number of literals. Sum of products: F = y' + xy+ x'yz' Product of sums: F 2 = x(y'+z)(x'+y+z') F 3 = A'B'CD+ABC'D' Digital Logic Design Ch7
18 Twolevel implementation Implementation Multilevel implementation Digital Logic Design Ch8
19 Simplification using Karnaughmap Types of kmaps KMap for 2 Variables KMap for 3Variables KMap for 4Variables Digital Logic Design Ch9
20 Karnaugh Maps (KMaps) Boolean expressions can be minimized by combining terms Kmaps minimize equations graphically PA + PA = P A B C Y Y C AB Y AB C ABC ABC ABC ABC ABC ABC ABC ABC Digital Logic Design Ch2
21 KMap Definitions Complement: variable with a bar over it A, B, C Literal: variable or its complement A, A, B, B, C, C Implicant: product of literals ABC, AC, BC Prime implicant : implicant corresponding to the largest circle in a Kmap Digital Logic Design Ch2
22 KMap Rules Every must be circled at least once Each circle must span a power of 2 (i.e., 2, 4) squares in each direction Each circle must be as large as possible A circle may wrap around the edges A don't care (X) is circled only if it helps minimize the equation Digital Logic Design Ch22
23 2Inputs KMap Use kmap to simplify the following truth table Inputs Output A B Y Y A. B A. B A. B B B A A A B After Simplification Y A B Digital Logic Design Ch23
24 A twovariable map Four minterms x' = row ; x = row y' = column ; y = column A truth table in square diagram Fig. (a): xy = m 3 Fig. 2(b): x+y = x'y+xy'+xy ) Twovariable Map = m +m 2 +m 3 2) Representation of functions in the map Digital Logic Design Ch24
25 3Inputs KMap Y AB C ABC ABC ABC ABC ABC ABC ABC ABC A Truth Table KMap Y B C Y AB C Y = AB + BC Digital Logic Design Ch25
26 3Inputs KMap A threevariable map Eight minterms The Gray code sequence Any two adjacent squares in the map differ by only on variable» Primed in one square and unprimed in the other» e.g., m 5 and m 7 can be simplified» m 5 + m 7 = xy'z + xyz = xz (y'+y) = xz Threevariable Map Digital Logic Design Ch26
27 3Inputs KMap m and m 2 (m 4 and m 6 ) are adjacent m + m 2 = x'y'z' + x'yz' = x'z' (y'+y) = x'z' m 4 + m 6 = xy'z' + xyz' = xz' (y'+y) = xz' Digital Logic Design Ch27
28 3Inputs KMap Inputs Output A. B C Y A. B. C A. B. C A. B. C A. B. C A. B. C Y C A B Digital Logic Design Ch28
29 3Inputs KMap Example: simplify the Boolean function F(x, y, z) = S(2, 3, 4, 5) F(x, y, z) = S(2, 3, 4, 5) = x'y + xy' Map for Example F(x, y, z) = Σ(2, 3, 4, 5) = x'y + xy' Digital Logic Design Ch29
30 3Inputs KMap Example : simplify F(x, y, z) = S(3, 4, 6, 7) F(x, y, z) = S(3, 4, 6, 7) = yz+ xz' Map for Example ; F(x, y, z) = Σ(3, 4, 6, 7) = yz + xz' Digital Logic Design Ch3
31 3Inputs KMap Consider four adjacent squares 2, 4, and 8 squares m +m 2 +m 4 +m 6 = x'y'z'+x'yz'+xy'z'+xyz' = x'z'(y'+y) +xz'(y'+y) = x'z' + xz = z' m +m 3 +m 5 +m 7 = x'y'z+x'yz+xy'z+xyz =x'z(y'+y) + xz(y'+y) =x'z + xz = z Digital Logic Design Ch3
32 3Inputs KMap Example 3.3: simplify F(x, y, z) = S(, 2, 4, 5, 6) F(x, y, z) = S(, 2, 4, 5, 6) = z'+ xy' F(x, y, z) = Σ(, 2, 4, 5, 6) = z' +xy' Digital Logic Design Ch32
33 3Inputs KMap Example : let F = A'C + A'B + AB'C + BC a) Express it in sum of minterms. b) Find the minimal sum of products expression. Ans: F(A, B, C) S(, 2, 3, 5, 7) = C + A'B Map for Example 3.4, A'C + A'B + AB'C + BC = C + A'B Digital Logic Design Ch33
34 4Inputs KMap The map 6 minterms Combinations of 2, 4, 8, and 6 adjacent squares Fourvariable Map Digital Logic Design Ch34
35 4Inputs KMap Example : simplify F(w, x, y, z) = S(,, 2, 4, 5, 6, 8, 9, 2, 3, 4) F = y'+w'z'+xz' Map for Example; F(w, x, y, z) = Σ(,, 2, 4, 5, 6, 8, 9, 2, 3, 4) = y' + w' z' +xz' Digital Logic Design Ch35
36 4Inputs KMap Example : simplify F = A B C + B CD + A B C D + AB C Map for Example ; A B C + B CD + A B C D + AB C = B D + B C +A CD Digital Logic Design Ch36
37 4Inputs KMap A B C D Y Y CD AB Y = AC + ABD + ABC + BD Digital Logic Design Ch37
38 4Inputs KMap A B C D Y X X X X X X X Y AB CD X X X X X Y = A + BD + C X X Digital Logic Design Ch38
39 4Inputs KMap INPUTS OUTPUT Digital Logic Design Ch39
40 4Input KMap Before Simplification Before Simplification Y ABCD ABCD ABCD ABCD Y ABCD ABCD ABCD ABCD +ABCD+ABCD+ABCD+ABCD + ABCD+ABCD+ABCD After Simplification After Simplification +ABCD+ABCD+ABCD+ABCD + ABCD+ABCD+ABCD Y ABC AD AD AB Y AC D BC Digital Logic Design Ch4
41 4Inputs KMap Before Simplification Before Simplification After Simplification After Simplification Digital Logic Design Ch4
42 Example: implement F( x, y, z) (,2,3,4,5,7) F( x, y, z) xy x y z Digital Logic Design Ch42
43 Mano  KMap Quiz  Simplify the following Boolean functions, using Karnaugh maps: (a) * F (x, y, z) = (2, 3, 6, 7) (b) * F (A, B, C, D) = (4, 6, 7, 5) (c) * F (A, B, C, D) = (3, 7,, 3, 4, 5) (d) * F (w, x, y, z) = (2, 3, 2, 3, 4, 5) (e) F (w, x, y, z) = (, 2, 3, 4, 5) (f) F (w, x, y, z) = (8,, 2, 3, 4) 2 Simplify the following Boolean functions, using fourvariable maps: (a) * F (w, x, y, z) = (, 4, 5, 6, 2, 4, 5) (b) F (A, B, C, D) = (2, 3, 6, 7, 2, 3, 4) (c) F (w, x, y, z) = (, 3, 4, 5, 6, 7, 9,, 3, 5) (d) * F (A, B, C, D) = (, 2, 4, 5, 6, 7, 8,, 3, 5) 3 Simplify the following Boolean expressions, using fourvariable maps: (a) * A B C D + AC D + B CD + A BCD + BC D (b) * x z + w xy + w (x y + xy ) (c) A B C D + AB D + A BC + ABCD + AB C (d) A B C D + BC D + A C D + A BCD + ACD 4 Simplify the following Boolean expressions, using fourvariable maps: (a) * w z + xz + x y + wx z (b) AD + B C D + BCD + BC D (c) * AB C + B C D + BCD+ ACD + A B C + A BC D (d) wxy + xz + wx z + w x Digital Logic Design Ch43
44 Multilevel NAND Circuits Boolean function implementation ANDOR logic NANDNAND logic» AND AND + inverter» OR: inverter + OR = NAND» For every bubble that is not compensated by another small circle along the same line, insert an inverter. Implementing F = A(CD + B) + BC Digital Logic Design Ch44
45 NAND Implementation Implementing F = (AB +A B)(C+ D ) Digital Logic Design Ch45
46 NOR Implementation NOR function is the dual of NAND function. The NOR gate is also universal. Logic Operation with NOR Gates Digital Logic Design Ch46
47 NOR Implementation Example: F = (AB +A B)(C + D ) Implementing F = (AB +A B)(C + D ) with NOR gates Digital Logic Design Ch47
48 General Quiz  Use KMap to Simplify the following Boolean Functions F ABCD ABCD ABCD ABCD ABCD ABCD F ABCD ABCD ABCD ABCD ABCD ABCD ABCD F ABCD ABCD ABCD ABCD ABCD F ABCD ABCD ABCD ABCD ABCD ABCD ABCD ABCD 2Simplify the following Boolean equations using Boolean theorems. Check for correctness using a truth table or K map. 3Simplify each of the following Boolean equations. Sketch a reasonably simple combinational circuit implementing the simplified equation. Digital Logic Design Ch48
49 Quiz 4 Write Boolean equations for the circuit in Figure : 5 Minimize the Boolean equations from Exercise 4 and sketch an improved circuit with the same function? Digital Logic Design Ch49
50 Quiz 6 Write a Boolean equation in sumofproducts canonical form for each of the truth tables in Figure  Write a Boolean equation in productofsums canonical form for the truth tables in Figure?  Minimize each of the Boolean equations from Exercise Digital Logic Design Ch5
51 Quiz 7 Using De Morgan equivalent gates and bubble pushing methods, redraw the circuit in Figure so that you can find the Boolean equation by inspection. Write the Boolean equation. Digital Logic Design Ch5
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