Digital Logic Lecture 7 Gate Level Minimization


 Philomena Lilian Houston
 2 years ago
 Views:
Transcription
1 Digital Logic Lecture 7 Gate Level Minimization By Ghada AlMashaqbeh The Hashemite University Computer Engineering Department
2 Outline Introduction. Kmap principles. Simplification using Kmaps. Don tcare conditions. The Hashemite University 2
3 Introduction Gate level minimization (or simply simplification) is the process of finding the optimal implementation of a Boolean function that describes a logic circuit. It is referred to reducing the terms or the literals or both in a Boolean function. In the last chapter we have explored simplification using Boolean algebra laws. In this chapter we will explore simplification using a graphical method known as Karnaugh map or Kmap. The Kmap method is easy and straightforward not like the usage of Boolean algebra laws which is: difficult, requires smartness, and there are no specific rules for simplification, in addition to no guarantee is available that your work is right. The Hashemite University 3
4 Kmap A Kmap for a function of n variables consists of 2 n cells (or squares), Each cell represents one minterm (or maxterm) in the truth table of the function, in every row and column, two adjacent cells should differ in the value of only one of the logic variables (in one bit only), recall the Gray Code. From the map you can derive many equivalent expressions of the function, and your task is to select the simplest one. The simplest expression is not always unique. Sometimes you can find more than one expression which can be denoted as the simplest one. The function expression obtained from a Kmap is always in the standard from (i.e. either SOP or POS). Kmap can be used for functions with up to 5 variables (or inputs) only. The Hashemite University 4
5 TwoVariable Kmap 4 minterms (or maxterms) in the map. The values of the first input A appear next to the rows of the map. The values of the second input appear above the columns of the map. On each side of the map there is one input. So, only two values 0 and. Based on the values of the inputs you can determine the minterm (or the maxterm) that represents the cell. In this map it does not matter if you exchange the locations of the two inputs. But be careful when you expresses the minterms (or the maxterms) of each cell. A B B 0 A 0 0 m0 m m2 m3 0 m0 m2 m m3 The Hashemite University 5
6 ThreeVariable Kmap 8 minterms (or maxterms) in the map. The values of the first input A appear next to the rows of the map. The values of the second and the third inputs appear above the columns of the map. The values of the combined inputs are arranged as in the Gray code (only one bit changes when you move from one value to the next). Based on the values of the inputs you can determine the minterm (or the maxterm) that represents a cell. Again, it does not matter if you exchange the locations of the inputs. But be careful when you expresses the minterms (or the maxterms) of each cell. A BC m0 m m3 m2 m4 m5 m7 m6 A BC m0 m4 m m5 m3 m7 m2 m6 The Hashemite University 6
7 FourVariable Kmap I 6 minterms (or maxterms) in the map. The values of the first two inputs appear next to the rows of the map. The values of the third and the fourth inputs appear above the columns of the map. The values of the combined inputs are arranged as in the Gray code (only one bit changes when you move from one value to the next). Based on the values of the inputs you can determine the minterm (or the maxterm) that represents a cell. Again, it does not matter if you exchange the locations of the inputs. But be careful when you expresses the minterms (or the maxterms) of each cell. The Hashemite University 7
8 FourVariable Kmap II AB CD CD AB The Hashemite University 8
9 Function Mapping I By function mapping we mean how to find the corresponding s in the Kmap that represents the function. Why we need function mapping? Since to simplify a function using Kmap we must group the cells that contain s to simplify the function as a SOP (we will see that to simplify a function as a POS we will group the cells that contains 0 s). How to map a function to Kmap? Using the truth table of the function. From the function Boolean expression representation. The Hashemite University 9
10 Function Mapping II Example of function mapping using truth table: x F = (x+y) Truth table: x y F x y 0 y The Hashemite University 0
11 Function Mapping III Five possible cases for mapping using the function Boolean expression: Sum of minterms canonical form: Put a in the map in cell that represents a minterm contained within the function. Product of maxterms canonical form: Put a in the map in cell that represents a maxterm not contained within the function (or put a 0 in the cell that represents a maxterm contained in the function). The Hashemite University
12 Function Mapping IV SOP standard form: Take each term within the function and determine which rows and columns it contains within the map. Then put in the cells that lies on the intersection of these rows and columns in the map. POS standard form: Take each term within the function and determine which rows and columns it contains within the map. Then put 0 in the cells that lies on the intersection of these rows and columns in the map. The rest of the cells that do not have 0 s will be s. Nonstandard form: Convert it using Boolean algebra rules to SOP or POS standard representation and follow one of the aforementioned procedures. The Hashemite University 2
13 Adjacent Minterms or Maxterms I Why to require that only one bit changes in the values of combined inputs? This is done to have any two adjacent cells (next to each other vertically or horizontally but not diagonally) differ exactly in one literal. This literal appears complemented in one minterm and noncomplemented in the other. This literal will disappear when you combine these minterms (or maxterms) as will be shown. Remember when you combine two minterms with an OR gate (sum of minterms) you can delete this literal from both minterms. Example: In a 3variable Kmap m0 and m are adjacent. m0 + m = xyz + xyz = xy(z + z ) = xy. = xy (z disappeared) The Hashemite University 3
14 Adjacent Minterms or Maxterms II Lets have a look at adjacent maxterms: Remember that maxterms are combined using AND gate (product of maxterms). Example: In a 3variable Kmap M0 and M are adjacent. M0.M = (x+y+z)(x+y+z ) = xx+xy+xz +xy+yy+yz +xz+yz+zz = x+xy+xz +y+yz +xz+yz =x(+z ) + y(+z )+xy+xz+yz =x+y+xy+xz+yz = x(+z) + y(+z)+xy = x+y+xy = x+y (z disappeared) The Hashemite University 4
15 Adjacent Minterms or Maxterms III Definition of adjacent minterms (maxterms): Minterm (maxterms) which are identical, except for one variable, are considered to be adjacent to one another. In a Kmap, the corresponding cells in the top and the bottom rows are adjacent to each other. Similarly the corresponding cells in the leftmost column and the rightmost column are adjacent to each other. E.g.: In a 3variable Kmap, these cells are said to be adjacent cells: cell 0 is adjacent to cells, 4, 5, 2. And so on for all cells. So, simply define the adjacent cells and then express the inputs values of these cells as either minterms (adjacent minterms) or as maxterms (adjacent maxterms). The Hashemite University 5
16 Simplification Using Kmaps Using Kmaps you can simplify a Boolean function as a: SOP. POS. This means that the representation of the simplified version of the function will be either a SOP or POS depends on the application or the problem that you want to solve. The Hashemite University 6
17 Simplification Using Kmap (SOP Form) I First: draw the suitable map based on the number of inputs found in the function. Second: map the function to the Kmap (define the locations of the s of the function). Third: define the adjacent cells as follows: Only combine cells that have in them from the function output. You can combine 2, 4, 8,..., etc. (i.e. a number that is power of 2), adjacent cells in one group. Each group will be one term in the simplified version of the function. As possible each cell must participate in one group only unless it is necessary. Do not recombine cells that are already found in other groups since this will produce redundant terms (so your answer will not be the most simplified one). Try to maximize the number of cells in each group as possible. For example: after grouping you have only one cell remained if there are adjacent cells to it that already grouped regroup this cell with them to find the maximum possible group. The Hashemite University 7
18 Simplification Using Kmap (SOP Form) II Hints for adjacent cells grouping: Maximize the number of cells in each group as possible. Start with adjacent cells that have only one possible maximum group to combine them. Finally, inspect the remaining ungrouped adjacent cells and try to maximize their groups as possible. After grouping have a look at your map and see if there are redundant and unnecessary groups that can be eliminated. Also, see if you can merge groups with each other to get larger group. Make sure that all s in the map are covered after grouping all adjacent cells. Finally, combine the cells in each group by one product term (AND gate) in which: the variables that change in value (0 or 0) are deleted, and only the variables that are constant (not changing) are stay. For these variables if its value is they appear uncomplemented in the final product term and if they are 0 they appear complemented. The Hashemite University 8
19 Simplification Using Kmap (SOP Form) III Results of groups combinations: In a twovariable Kmap: The combination of cell group term with 2 literals. The combination of 2cell group term with literals. The combination of 4cell group term with 0 literals (this means that F = for all inputs combinations). In a threevariable Kmap: The combination of cell group term with 3 literals. The combination of 2cell group term with 2 literals. The combination of 4cell group term with literals. The combination of 8cell group term with 0 literals (this means that F = for all inputs combinations). The Hashemite University 9
20 Simplification Using Kmap (SOP Form) IV In a Fourvariable Kmap: The combination of cell group term with 4 literals. The combination of 2cell group term with 3 literals. The combination of 4cell group term with 2 literals. The combination of 8cell group term with literals. The combination of 6cell group term with 0 literals (this means that F = for all inputs combinations). In general, for a kvariable Kmap and for mcells group in that map the number of literals of the term that represents this group = k n. where m = 2^n The Hashemite University 20
21 Example I Given F(A, B, C) = (, 4, 6), simplify F as a SOP using K map. Sol: F = A B C + AC BC A The Hashemite University 2
22 Example II Given F(x, y, z, w) = (2, 6, 7, 9, 3, 5), simplify F as a SOP using Kmap. zw xy Sol: F = x z + xw + y zw 0 0 The Hashemite University 22
23 Example III Given F(x, y, z, w) = z + xyz + xy z + y w simplify F as a SOP using Kmap. Sol: F = z + xy + y w zw xy The Hashemite University 23
24 Example IV Given F(A, B, C) = C (A + B)(A + C ) simplify F as a SOP using K map. BC A Sol: F = AB The Hashemite University 24
25 Example V Given F(x, y, z, w) = z + xyz + x(y + z ) simplify F as a SOP using Kmap. Sol: zw xy First convert F to a standard form SOP: F = z + xyz + xy + xz Simplified F is: 0 0 F = z + x The Hashemite University 25
26 Product of Sum Simplification First: draw the suitable map based on the number of inputs found in the function. Second: map the function to the Kmap (define the locations of the 0 s of the function). Third: define the adjacent cells and groups as in SOP simplification with the only difference that you group the cells that contains 0 s not s. Finally, combine the cells in each group by one sum term (OR gate) in which: the variables that change in value (0 or 0) are deleted, and only the variables that are constant (not changing) are stay. For these variables if its value is they appear complemented in the final sum term and if they are 0 they appear uncomplemented. The Hashemite University 26
27 Example Given F(x, y, z, w) = z + xy z + xyz simplify F as a POS using K map. zw xy Sol: F = (z + x)(y + z ) The Hashemite University 27
28 Complement of a Function From the Kmap You can obtain a simplified version of the complement of a function from its Kmap as follows: Draw the Kmap F which is the same as the Kmap for F except that it has s in the cells that have 0 in the Kmap of F. Now deal with the new Kmap as we have learned before and simplify F as either POS or SOP. The Hashemite University 28
29 Don tcare Conditions I In some applications we are not interested in the output of a function for specific input combinations. So, either it is zero or it is not important to know its actual value. For example: for a 2input AND gate if the one is 0 the value of the other input has no effect. So, whether it is or 0 the output of the AND gate will be 0 for all possible cases. Such functions are called incompletely specified functions. The unspecified minterms in such functions are called don t care conditions. The Hashemite University 29
30 Don tcare Conditions II Don t care conditions can greatly help in simplifying the functions more. Mark these unspecified minterms as X in the map. While grouping of adjacent cells you can assume these X as either 0 (POS simplification) or (SOP simplification) to obtain larger groups. Leave unused X s without grouping since they will result in additional terms in the result. The Hashemite University 30
31 Example I Given F(x, y, z, w) = (, 8, 9, 2) + d (0, 4, 5, 4), simplify F as a SOP using K map. zw xy X 0 Sol: F = z w + y z 0 X X X 0 The Hashemite University 3
32 Example II Given F(x, y, z, w) = (, 8, 9, 2) + d (0, 4, 5, 4), simplify F as a POS using K map. zw xy X Sol: F = z (y + w ) 0 X X 0 X The Hashemite University 32
33 Additional Notes This lecture covers the following material from the textbook: Chapter 3: Sections , and parts of section 3.9 The Hashemite University 33
Combinational Logic Circuits
Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical
More informationChapter 3 Simplification of Boolean functions
3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean
More informationA B AB CD Objectives:
Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3
More informationBawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University
Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of
More informationChapter 2. Boolean Expressions:
Chapter 2 Boolean Expressions: A Boolean expression or a function is an expression which consists of binary variables joined by the Boolean connectives AND and OR along with NOT operation. Any Boolean
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard
More informationReview: Standard forms of expressions
Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can be combined to form complex expressions, which can
More informationIT 201 Digital System Design Module II Notes
IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.
More informationCHAPTER2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, KMap and QuineMcCluskey
CHAPTER2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, KMap and QuineMcCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input
More informationStandard Forms of Expression. Minterms and Maxterms
Standard Forms of Expression Minterms and Maxterms Standard forms of expressions We can write expressions in many ways, but some ways are more useful than others A sum of products (SOP) expression contains:
More informationModule 7. Karnaugh Maps
1 Module 7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or SumofMinterms (SOM) 2.4 Canonical product of sum or ProductofMaxterms(POM)
More informationGate Level Minimization Map Method
Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically
More informationS1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017
S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017 Karnaugh Map Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and
More informationECE380 Digital Logic
ECE38 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum ProductofSums Forms, Incompletely Specified Functions Dr. D. J. Jackson Lecture 8 Terminology For
More informationExperiment 4 Boolean Functions Implementation
Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter
More informationCMPE223/CMSE222 Digital Logic
CMPE223/CMSE222 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum ProductofSums Forms, Incompletely Specified Functions Terminology For a given term, each
More informationLSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology
LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a
More informationExperiment 3: Logic Simplification
Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed ElSaied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions
More informationChapter 2 Combinational
Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic
More informationGateLevel Minimization. BME208 Logic Circuits Yalçın İŞLER
GateLevel Minimization BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Complexity of Digital Circuits Directly related to the complexity of the algebraic expression we use to
More informationChapter 3. GateLevel Minimization. Outlines
Chapter 3 GateLevel Minimization Introduction The Map Method FourVariable Map FiveVariable Map Outlines Product of Sums Simplification Don tcare Conditions NAND and NOR Implementation Other TwoLevel
More informationX Y Z F=X+Y+Z
This circuit is used to obtain the compliment of a value. If X = 0, then X = 1. The truth table for NOT gate is : X X 0 1 1 0 2. OR gate : The OR gate has two or more input signals but only one output
More informationGate Level Minimization
Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 =
More information2.6 BOOLEAN FUNCTIONS
2.6 BOOLEAN FUNCTIONS Binary variables have two values, either 0 or 1. A Boolean function is an expression formed with binary variables, the two binary operators AND and OR, one unary operator NOT, parentheses
More informationPoints Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map
Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions SumofProducts (SOP),
More informationENGIN 112 Intro to Electrical and Computer Engineering
ENGIN 2 Intro to Electrical and Computer Engineering Lecture 8 Minimization with Karnaugh Maps Overview Kmaps: an alternate approach to representing oolean functions Kmap representation can be used to
More informationLecture 5. Chapter 2: Sections 47
Lecture 5 Chapter 2: Sections 47 Outline Boolean Functions What are Canonical Forms? Minterms and Maxterms Index Representation of Minterms and Maxterms SumofMinterm (SOM) Representations ProductofMaxterm
More informationUnitIV Boolean Algebra
UnitIV Boolean Algebra Boolean Algebra Chapter: 08 Truth table: Truth table is a table, which represents all the possible values of logical variables/statements along with all the possible results of
More informationGateLevel Minimization
GateLevel Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2011 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method
More informationGet Free notes at ModuleI One s Complement: Complement all the bits.i.e. makes all 1s as 0s and all 0s as 1s Two s Complement: One s complement+1 SIGNED BINARY NUMBERS Positive integers (including zero)
More informationPhiladelphia University Faculty of Information Technology Department of Computer Science. Computer Logic Design. By Dareen Hamoudeh.
Philadelphia University Faculty of Information Technology Department of Computer Science Computer Logic Design By Dareen Hamoudeh Dareen Hamoudeh 1 Canonical Forms (Standard Forms of Expression) Minterms
More informationSpecifying logic functions
CSE4: Components and Design Techniques for Digital Systems Specifying logic functions Instructor: Mohsen Imani Slides from: Prof.Tajana Simunic and Dr.Pietro Mercati We have seen various concepts: Last
More informationSimplification of Boolean Functions
COM111 Introduction to Computer Engineering (Fall 20062007) NOTES 5  page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean
More informationSimplification of Boolean Functions
Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.
More informationCprE 281: Digital Logic
CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Minimization CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative
More informationQUESTION BANK FOR TEST
CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter
More informationLecture 4: Implementation AND, OR, NOT Gates and Complement
EE210: Switching Systems Lecture 4: Implementation AND, OR, NOT Gates and Complement Prof. YingLi Tian Feb. 13, 2018 Department of Electrical Engineering The City College of New York The City University
More informationDIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (KMAPS)
DIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (KMAPS) 1 Learning Objectives 1. Given a function (completely or incompletely specified) of three to five variables, plot it on a Karnaugh map. The function
More informationChapter 2: Combinational Systems
Uchechukwu Ofoegbu Chapter 2: Combinational Systems Temple University Adapted from Alan Marcovitz s Introduction to Logic and Computer Design Riddle Four switches can be turned on or off. One is the switch
More informationKarnaugh Maps. Kiril Solovey. TelAviv University, Israel. April 8, Kiril Solovey (TAU) Karnaugh Maps April 8, / 22
Karnaugh Maps Kiril Solovey TelAviv University, Israel April 8, 2013 Kiril Solovey (TAU) Karnaugh Maps April 8, 2013 1 / 22 Reminder: Canonical Representation Sum of Products Function described for the
More informationMenu. Algebraic Simplification  Boolean Algebra EEL3701 EEL3701. MSOP, MPOS, Simplification
Menu Minterms & Maxterms SOP & POS MSOP & MPOS Simplification using the theorems/laws/axioms Look into my... 1 Definitions (Review) Algebraic Simplification  Boolean Algebra Minterms (written as m i ):
More informationComputer Organization
Computer Organization (Logic circuits design and minimization) KR Chowdhary Professor & Head Email: kr.chowdhary@gmail.com webpage: krchowdhary.com Department of Computer Science and Engineering MBM Engineering
More informationGateLevel Minimization
GateLevel Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method
More informationDate Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 04. Boolean Expression Simplification and Implementation
Name: Instructor: Engr. Date Performed: Marks Obtained: /10 Group Members (ID):. Checked By: Date: Experiment # 04 Boolean Expression Simplification and Implementation OBJECTIVES: To understand the utilization
More informationDKT 122/3 DIGITAL SYSTEM 1
Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits
More informationSEE1223: Digital Electronics
SEE223: Digital Electronics 3 Combinational Logic Design Zulkifil Md Yusof Dept. of Microelectronics and Computer Engineering The aculty of Electrical Engineering Universiti Teknologi Malaysia Karnaugh
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show
More informationCombinational Logic Circuits Part III Theoretical Foundations
Combinational Logic Circuits Part III Theoretical Foundations Overview Simplifying Boolean Functions Algebraic Manipulation Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables) Systematic
More informationPresented By : Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak
Presented By : Alok Kumar Lecturer in ECE C.R.Polytechnic, Rohtak Content  Introduction 2 Feature 3 Feature of BJT 4 TTL 5 MOS 6 CMOS 7 K Map  Introduction Logic IC ASIC: Application Specific
More information數位系統 Digital Systems 朝陽科技大學資工系. Speaker: FuwYi Yang 楊伏夷. 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象, 視之不可見者曰夷
數位系統 Digital Systems Department of Computer Science and Information Engineering, Chaoyang University of Technology 朝陽科技大學資工系 Speaker: FuwYi Yang 楊伏夷 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象,
More informationKarnaugh Map (KMap) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using Kmap
Karnaugh Map (KMap) Ch. 2.4 Ch. 2.5 Simplification using Kmap A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or
More informationEEE130 Digital Electronics I Lecture #4_1
EEE130 Digital Electronics I Lecture #4_1  Boolean Algebra and Logic Simplification  By Dr. Shahrel A. Suandi 46 Standard Forms of Boolean Expressions There are two standard forms: Sumofproducts form
More informationLiteral Cost F = BD + A B C + A C D F = BD + A B C + A BD + AB C F = (A + B)(A + D)(B + C + D )( B + C + D) L = 10
Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm
More informationUNIT4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable.
UNIT4 BOOLEAN LOGIC Boolean algebra is an algebra that deals with Boolean values((true and FALSE). Everyday we have to make logic decisions: Should I carry the book or not?, Should I watch TV or not?
More information4 KARNAUGH MAP MINIMIZATION
4 KARNAUGH MAP MINIMIZATION A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if properly used, will produce the simplest SOP or POS expression possible, known as the
More information2.1 Binary Logic and Gates
1 EED2003 Digital Design Presentation 2: Boolean Algebra Asst. Prof.Dr. Ahmet ÖZKURT Asst. Prof.Dr Hakkı T. YALAZAN Based on the Lecture Notes by Jaeyoung Choi choi@comp.ssu.ac.kr Fall 2000 2.1 Binary
More informationUniversity of Technology
University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 5 & 6 Minimization with Karnaugh Maps Karnaugh maps lternate way of representing oolean function ll rows
More informationGateLevel Minimization
MEC520 디지털공학 GateLevel Minimization JeeHwan Ryu School of Mechanical Engineering GateLevel MinimizationThe Map Method Truth table is unique Many different algebraic expression Boolean expressions may
More informationENGINEERS ACADEMY. 7. Given Boolean theorem. (a) A B A C B C A B A C. (b) AB AC BC AB BC. (c) AB AC BC A B A C B C.
Digital Electronics Boolean Function QUESTION BANK. The Boolean equation Y = C + C + C can be simplified to (a) (c) A (B + C) (b) AC (d) C. The Boolean equation Y = (A + B) (A + B) can be simplified to
More informationUNIT II. Circuit minimization
UNIT II Circuit minimization The complexity of the digital logic gates that implement a Boolean function is directly related to the complexity of the algebraic expression from which the function is implemented.
More informationCombinational Circuits Digital Logic (Materials taken primarily from:
Combinational Circuits Digital Logic (Materials taken primarily from: http://www.facstaff.bucknell.edu/mastascu/elessonshtml/eeindex.html http://www.cs.princeton.edu/~cos126 ) Digital Systems What is a
More informationCS470: Computer Architecture. AMD Quad Core
CS470: Computer Architecture Yashwant K. Malaiya, Professor malaiya@cs.colostate.edu AMD Quad Core 1 Architecture Layers Building blocks Gates, flipflops Functional bocks: Combinational, Sequential Instruction
More informationAssignment (36) Boolean Algebra and Logic Simplification  General Questions
Assignment (36) Boolean Algebra and Logic Simplification  General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make
More informationSwitching Circuits & Logic Design
Switching Circuits & Logic Design JieHong Roland Jiang 江介宏 Department of Electrical Engineering National Taiwan University Fall 23 5 Karnaugh Maps Kmap Walks and Gray Codes http://asicdigitaldesign.wordpress.com/28/9/26/kmapswalksandgraycodes/
More informationCS8803: Advanced Digital Design for Embedded Hardware
CS883: Advanced Digital Design for Embedded Hardware Lecture 2: Boolean Algebra, Gate Network, and Combinational Blocks Instructor: Sung Kyu Lim (limsk@ece.gatech.edu) Website: http://users.ece.gatech.edu/limsk/course/cs883
More information2008 The McGrawHill Companies, Inc. All rights reserved.
28 The McGrawHill Companies, Inc. All rights reserved. 28 The McGrawHill Companies, Inc. All rights reserved. All or Nothing Gate Boolean Expression: A B = Y Truth Table (ee next slide) or AB = Y 28
More informationOutcomes. Unit 9. Logic Function Synthesis KARNAUGH MAPS. Implementing Combinational Functions with Karnaugh Maps
.. Outcomes Unit I can use Karnaugh maps to synthesize combinational functions with several outputs I can determine the appropriate size and contents of a memory to implement any logic function (i.e. truth
More informationChapter 2 Boolean algebra and Logic Gates
Chapter 2 Boolean algebra and Logic Gates 2. Introduction In working with logic relations in digital form, we need a set of rules for symbolic manipulation which will enable us to simplify complex expressions
More informationCombinational Logic Circuits
Chapter 2 Combinational Logic Circuits J.J. Shann (Slightly trimmed by C.P. Chung) Chapter Overview 21 Binary Logic and Gates 22 Boolean Algebra 23 Standard Forms 24 TwoLevel Circuit Optimization
More informationBinary logic. Dr.AbuArqoub
Binary logic Binary logic deals with variables like (a, b, c,, x, y) that take on two discrete values (, ) and with operations that assume logic meaning ( AND, OR, NOT) Truth table is a table of all possible
More informationSlide Set 5. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary
Slide Set 5 for ENEL 353 Fall 207 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 207 SN s ENEL 353 Fall 207 Slide Set 5 slide
More informationSummary. Boolean Addition
Summary Boolean Addition In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable can only have a value of or 0. The complement represents the inverse
More informationGateLevel Minimization
GateLevel Minimization Mano & Ciletti Chapter 3 By Suleyman TOSUN Ankara University Outline Intro to GateLevel Minimization The Map Method 2345 variable map methods ProductofSums Method Don t care
More informationCombinational Logic & Circuits
WeekI Combinational Logic & Circuits Spring' 232  Logic Design Page Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other
More informationBoolean algebra. June 17, Howard Huang 1
Boolean algebra Yesterday we talked about how analog voltages can represent the logical values true and false. We introduced the basic Boolean operations AND, OR and NOT, which can be implemented in hardware
More informationA graphical method of simplifying logic
45 Karnaugh Map Method A graphical method of simplifying logic equations or truth tables. Also called a K map. Theoretically can be used for any number of input variables, but practically limited to 5
More informationENGIN 112. Intro to Electrical and Computer Engineering
ENIN 2 Intro to Electrical and Computer Engineering Lecture 6 More Boolean Algebra ENIN2 L6: More Boolean Algebra September 5, 23 A B Overview Epressing Boolean functions Relationships between algebraic
More informationCS February 17
Discrete Mathematics CS 26 February 7 Equal Boolean Functions Two Boolean functions F and G of degree n are equal iff for all (x n,..x n ) B, F (x,..x n ) = G (x,..x n ) Example: F(x,y,z) = x(y+z), G(x,y,z)
More informationCode No: 07A3EC03 Set No. 1
Code No: 07A3EC03 Set No. 1 II B.Tech I Semester Regular Examinations, November 2008 SWITCHING THEORY AND LOGIC DESIGN ( Common to Electrical & Electronic Engineering, Electronics & Instrumentation Engineering,
More informationBOOLEAN ALGEBRA. Logic circuit: 1. From logic circuit to Boolean expression. Derive the Boolean expression for the following circuits.
COURSE / CODE DIGITAL SYSTEMS FUNDAMENTAL (ECE 421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE 422) BOOLEAN ALGEBRA Boolean Logic Boolean logic is a complete system for logical operations. It is used in countless
More informationBOOLEAN ALGEBRA. 1. State & Verify Laws by using :
BOOLEAN ALGEBRA. State & Verify Laws by using :. State and algebraically verify Absorption Laws. (2) Absorption law states that (i) X + XY = X and (ii) X(X + Y) = X (i) X + XY = X LHS = X + XY = X( + Y)
More informationDigital Circuits ECS 371
Digital Circuits ECS 37 Dr. Prapun Suksompong prapun@siit.tu.ac.th Lecture 7 Office Hours: KD 367 Monday 9::3, :33:3 Tuesday :3:3 Announcement HW2 posted on the course web site Chapter 4: Write down
More informationSpring 2010 CPE231 Digital Logic Section 1 Quiz 1A. Convert the following numbers from the given base to the other three bases listed in the table:
Section 1 Quiz 1A Convert the following numbers from the given base to the other three bases listed in the table: Decimal Binary Hexadecimal 1377.140625 10101100001.001001 561.24 454.3125 111000110.0101
More informationDigital Design. Chapter 4. Principles Of. Simplification of Boolean Functions
Principles Of Digital Design Chapter 4 Simplification of Boolean Functions Karnaugh Maps Don t Care Conditions Technology Mapping Optimization, Conversions, Decomposing, Retiming Boolean Cubes for n =,
More informationTo write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map.
3.1 Objectives To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using. 3.2 Sum of Products & Product of Sums Any Boolean expression can be simplified
More informationIntroduction to Microprocessors and Digital Logic (ME262) Boolean Algebra and Logic Equations. Spring 2011
Introduction to Microprocessors and Digital (ME262) lgebra and Spring 2 Outline. lgebra 2. 3. Karnaugh Maps () 4. Twovariable 5. 6. 7. 2 lgebra s of Simplifying equations are defined in terms of inary
More informationEECS150 Homework 2 Solutions Fall ) CLD2 problem 2.2. Page 1 of 15
1.) CLD2 problem 2.2 We are allowed to use AND gates, OR gates, and inverters. Note that all of the Boolean expression are already conveniently expressed in terms of AND's, OR's, and inversions. Thus,
More informationPOWR IP PZ1/17
Silesian University of Technology as Centre of Modern Education Based on Research and Innovations POWR.03.05.00IP.0800PZ1/17 Project cofinanced by the European Union under the European Social Fund
More informationGateLevel Minimization. section instructor: Ufuk Çelikcan
GateLevel Minimization section instructor: Ufuk Çelikcan Compleity of Digital Circuits Directly related to the compleity of the algebraic epression we use to build the circuit. Truth table may lead to
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Supplementary Examinations, February 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science
More informationClass Subject Code Subject Prepared By Lesson Plan for Time: Lesson. No 1.CONTENT LIST: Introduction to UnitI 2. SKILLS ADDRESSED: Listening I year, 02 sem CS6201 Digital Principles & System Design S.Seedhanadevi
More information2/8/2017. SOP Form Gives Good Performance. ECE 120: Introduction to Computing. KMaps Can Identify SingleGate Functions
University of Illinois at UrbanaChampaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing TwoLevel Logic SOP Form Gives Good Performance s you know, one can use a Kmap
More information3.3 Hardware Karnaugh Maps
2P P = P = 3.3 Hardware UIntroduction A Karnaugh map is a graphical method of Boolean logic expression reduction. A Boolean expression can be reduced to its simplest form through the 4 simple steps involved
More informationComputer Science. Unit4: Introduction to Boolean Algebra
Unit4: Introduction to Boolean Algebra Learning Objective At the end of the chapter students will: Learn Fundamental concepts and basic laws of Boolean algebra. Learn about Boolean expression and will
More informationBoolean Analysis of Logic Circuits
Course: B.Sc. Applied Physical Science (Computer Science) Year & Sem.: IInd Year, Sem  IIIrd Subject: Computer Science Paper No.: IX Paper Title: Computer System Architecture Lecture No.: 7 Lecture Title:
More informationIncompletely Specified Functions with Don t Cares 2Level Transformation Review Boolean Cube KarnaughMap Representation and Methods Examples
Lecture B: Logic Minimization Incompletely Specified Functions with Don t Cares 2Level Transformation Review Boolean Cube KarnaughMap Representation and Methods Examples Incompletely specified functions
More informationOptimized Implementation of Logic Functions
June 25, 22 9:7 vra235_ch4 Sheet number Page number 49 black chapter 4 Optimized Implementation of Logic Functions 4. Nc3xe4, Nb8 d7 49 June 25, 22 9:7 vra235_ch4 Sheet number 2 Page number 5 black 5 CHAPTER
More information1. Mark the correct statement(s)
1. Mark the correct statement(s) 1.1 A theorem in Boolean algebra: a) Can easily be proved by e.g. logic induction b) Is a logical statement that is assumed to be true, c) Can be contradicted by another
More information