CS2100 Computer Organisation Tutorial #8: MSI Components Answers to Selected Questions

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1 C Computer Organisation Tutorial #8: MI Components Answers to elete Questions. Realize the following funtion with (a) an 8: multiplexer, an (b) a 4: multiplexer using the first input variables as the seletor inputs. (,, ) = M(, 5, 6) D(4) ou may write omplemente variables instea of rawing an inverter to erive it. If you have several hoies for your answer, hoose the simplest one (onstant logi values an are simpler than literals). ou may write x or for on t-are values. hat if we use the last input variables as the seletor inputs instea for the 4: multiplexer? Answers: is a -variable funtion, so there are = 8 rows in its truth table. Using an 8: multiplexer, we o not nee to ollapse any input; we just opy the values of iretly to the multiplexer inputs: : ' MU 4: MU e hoose over sine logi onstant is simpler than a literal. ' / ' To use a 4: multiplexer, we nee to ollapse the 8-row truth table to a 4-row table of multiplexer inputs (see table above). or simpliity sake, we hoose the most signifiant variables as our seletor lines (unless the instrution says otherwise), an the least signifiant variable as the input variable into the multiplexer. A7/8 emester - of 6 - C Tutorial #8 elete Answers

2 . Given the following zero-enable 4 eoer with negate outputs, how woul you implement the Boolean funtion J(,,,) = M(,, 6, 7) without any aitional logi gates? Answer: J(,,,) = M(,, 6, 7) = + ' (using K-map) = M 4 DC (' )' = + ' A7/8 emester - of 6 - C Tutorial #8 elete Answers

3 . [A/ emester xam question] ou are to esign a onverter that takes in 4-bit input ABCD an generates a -bit output GH as shown in Table below. Input Output A B C D G H Table JJJJ KKKK Table ou are given the following omponents: a. A Count- evie that takes in a 4-bit input an generates a -bit output CCC whih is the number of s in the input. or example, if =, then CCC = (or ). b. A Count- evie that takes in a 4-bit input an generates a -bit output CCC whih is the number of s in the input. or example, if =, then CCC = (or ).. A qua : multiplexer that takes in two 4-bit inputs JJJJ an KKKK, an irets one of the inputs to its output epening on its ontrol signal, as shown in Table above.. A 4-bit parallel aer that takes in two 4-bit unsigne binary numbers an outputs the sum. The blok iagrams of these omponents are shown below: Count- C C C Count- C C C Qua : MU J K Cin 4-bit aer Cout A7/8 emester - of 6 - C Tutorial #8 elete Answers

4 Given the above 4 omponents, you are to employ blok-level esign to esign the onverter, without using any aitional logi gate or other evies. ou may observe that if A =, then the output GH is simply the number of s in the input ABCD. ou are to make your own observation for the ase when A =. [Hint (not given in exam): ou nee only one of eah of the omponents. Complete the iagram below.] Key ieas:. If A = (or D = ), ount #s in ABCD.. If A = (or D = ), either A B C D Count- C C C Count- C C C a. #s + #s; or b. 4 + #s Cin 4-bit aer Cout a is implemente below. or b, try it yourself. Qua : MU J K G H A simpler solution without the nee of the 4-bit parallel aer is possible. Try it out yourself. A7/8 emester - 4 of 6 - C Tutorial #8 elete Answers

5 4. tuy the following iruit. rite out the sum-of-minterms form for (a,b,,) using the m notation. Re-implement (a,b,,) with the fewest number of 4 eoer with -enable an normal outputs, an at most two logi gates. (A solution with two eoers an one logi gate is rather straight-forwar. olutions that use more omponents than this are not aepte. There is a solution with one eoer an two logi gates, whih is harer to obtain. If you manage to get it, treat it as a bonus.) [Hint: Trae the iruit below to obtain the sum-of-minterms expression. Parts of the iruit have been trae for you.] a b 4 DC : MU ' (a' b') + (a' b) minterms,,6,7 : MU ' (a b') + (a b) minterms 8,9,4,5 b 4 DC : MU ' (b' ') + (b' ) minterms,8,, : MU ' (b ') + (b ) minterms 4,,7,5 Answer: (a,b,,) = m (,,,4,6,7,8,9,,,4,5) It is easier to think about implementing ' (whih is m(,5,,) or b' ' + b ' ), an then aing an inverter to invert it bak to. A7/8 emester - 5 of 6 - C Tutorial #8 elete Answers

6 b 4 DC (b' ') 4 DC b (' ) There are equivalent alternative solutions that rearrange the inputs b, an. Just hek that the output is still (b' ' + b ' )'. e aept suh solution with eoers an one logi gate, but not more. (Note that an inverter, if use, is ounte as a logi gate as well.) There is an even simpler iruit requiring only one eoer an two gates. Try this out yourself. A7/8 emester - 6 of 6 - C Tutorial #8 elete Answers

Department of Electrical and Computer Engineering University of Wisconsin Madison. Fall

Department of Electrical and Computer Engineering University of Wisconsin Madison. Fall Department of Eletrial and Computer Engineering University of Wisonsin Madison ECE 553: Testing and Testable Design of Digital Systems Fall 2014-2015 Assignment #2 Date Tuesday, September 25, 2014 Due