Chapter 4. Combinational Logic


 Maud Gordon
 4 years ago
 Views:
Transcription
1 Chapter 4. Combinational Logic Tong In Oh 1
2 4.1 Introduction Combinational logic: Logic gates Output determined from only the present combination of inputs Specified by a set of Boolean functions Sequential logic: Employ storage elements in addition to logic gates Output determined by present inputs and the state of the storage elements Specified by a time sequence of inputs and internal states 2
3 4.2 Combinational Circuits Interconnection of logic gates React to the input signals and produce the output signal Transforming binary information For n input variables, m Boolean functions (one for each output variable) FIGURE 4.1 Block diagram of combinational circuit 3
4 Goals To formulate systematic analysis Design procedures for combinational circuits Provide a useful catalog of elementary functions Two tasks Analyze the behavior of a given logic circuit Synthesize a circuit for a given behavior The most important standard combinational circuits Adders, subtractors, comparators, decoders, encoders, and multiplexers 4
5 4.3 Analysis Procedure Determine the function implemented in the circuit Boolean functions, a truth table, explanation of the circuit operation from the given logic diagram 1. Combinational and not sequential? No feedback paths or memory elements 2. To obtain the output Boolean functions 1. Label all gate outputs that are a function of input variables with arbitrary symbols but with meaningful names. Determine the Boolean functions for each gate output. 2. Label the gates that are a function of input variables and previously labeled gates with other arbitrary symbols. Find the Boolean functions for these gates. 3. Repeat the process outlined in step 2 until the outputs of the circuit are obtained. 4. By repeated substitution of previously defined functions, obtain the output Boolean functions in terms of input variables. 5
6 Determine the function from a given logic diagram to a set of Boolean functions or a truth table FIGURE 4.2 Logic diagram for analysis example 6
7 Truth Table To obtain truth table 1. Determine the number of input variables in the circuit. List the binary numbers from 0 to (2 n  1) in a table. 2. Label the outputs of selected gates with arbitrary symbols. 3. Obtain the truth table for the outputs of those gates which are a function of the input variables only. 4. Proceed to obtain the truth table for the outputs of those gates which are a function of previously defined values until the columns for all outputs are determined Identical to the truth table of the full adder 7
8 4.4 Design Procedure Start from the specification of the design objective Culminate in a logic circuit diagram or a set of Boolean functions 1. From the specifications of the circuit, determine the required number of inputs and outputs and assign a symbol to each. 2. Derive the truth table that defines the required relationship between inputs and outputs. 3. Obtain the simplified Boolean functions for each output as a function of the input variables. 4. Draw the logic diagram and verify the correctness of the design (manually or by simulation). Interpret verbal specifications correctly in the truth table Constraints Number of gates, number of inputs to a gate, propagation time of the signal through the gates, number of interconnections, limitations of the driving capability of each gate, various other criteria 8
9 Code Conversion Example Code converter: transformation Ex. Convert BCD to the excess3 code for decimal digits Four inputs, four outputs 10 combinations except of 6 don t care combinations 9 FIGURE 4.3 Maps for BCDtoexcess3 code converter
10 FIGURE 4.4 Logic diagram for BCDtoexcess 3 code converter 10
11 4.5 Binary AdderSubtractor Digital computer: Perform a variety of informationprocessing tasks Various arithmetic operations Addition of two binary digits 0+0=0, 0+1=1, 1+0=1, 1+1=10 Half adder: perform the addition of two bits Full adder: perform the addition of three bits (two significant bits and a previous carry) Carry: higher significant bit of binary sum of two digits Binary addersubtractor: combinational circuit performs the arithmetic operation of addition and subtraction with binary numbers Hierarchical design Half adder full adder binary adder subtractor 11
12 Half Adder Need two binary inputs (augend, addend) and two binary outputs (sum, carry) FIGURE 4.5 Implementation of half adder 12
13 Full Adder Process of addition: Bitbybit basis, right to left, beginning with the least significant bit Consider the addition at each position and possible carry bit from the previous position Three inputs and two outputs 13
14 FIGURE 4.7 Implementation of full adder in sumofproducts form FIGURE 4.8 Implementation of full adder with two half adders and an OR gate 14
15 Binary Adder Produce the arithmetic sum of two binary numbers Connected full adders in cascade Nbit addition: chain of N full adders or 1 half adder and N1 full adders FIGURE 4.9 Fourbit adder 15
16 Carry Propagation For Nbit adder, 2n gate levels for carry to propagate from input to output Reducing the carry propagation delay time Employ faster gates with reduced delays To increase the complexity of the equipment (in a parallel adder) Principle of carry lookahead logic FIGURE 4.10 Full adder with P and G shown 16
17 Speed of operation Expense of additional complexity FIGURE 4.11 Logic diagram of carry lookahead generator + 17
18 FIGURE 4.12 Fourbit adder with carry lookahead 18
19 Binary Subtractor AB: Adding A to 2 s complement of B 2 s complement: inverters and sum through the input carry 19 FIGURE 4.13 Fourbit adder subtractor (with overflow detection)
20 Overflow Detect from the end carry out of the most significant position When unsigned numbers Consider with the last two carries together When signed numbers (Considering the leftmost sign bit and negative numbers as 2 s complement form) = If not equal, overflow has occurred 20
21 4.6 Decimal Adder BCD adder = 19 21
22 Block diagram of a BCD adder 22
23 4.7 Binary Multiplier J multiplier bits K multiplicand bits (JXK) AND gates (J1) Kbit adders Result: product of (J+K) bits FIGURE 4.15 Twobit by twobit binary multiplier 23
24 FIGURE 4.16 Fourbit by threebit binary multiplier 24
25 4.8 Magnitude Comparator Regularity Algorithm FIGURE 4.17 Fourbit magnitude comparator 25
26 4.9 Decoders Convert binary information from n input lines to a maximum of 2 n unique output lines 2 n (or fewer) minterms of n input variables Generate a unique output NtoM line decoder Code converter FIGURE 4.18 Threetoeightline decoder 26
27 DecoderDemultiplexer 0 A decoder with enable input can function as a demultiplexer Ex) one to four line demultiplexer (E: data input line, A and B: selection inputs) FIGURE 4.19 Twotofourline decoder with enable input 27
28 Larger Decoder Circuit FIGURE decoder constructed with two 3 8 decoders 28
29 Combinational Logic Implementation FIGURE 4.21 Implementation of a full adder with a decoder 29
30 Encoders 2 n (or fewer) input lines and n output lines Assume only one input has a value of 1 at any given time Must establish an input priority Ambiguities of all 0 s inputs 30
31 Priority Encoder V: valid bit indicator FIGURE 4.23 Fourinput priority encoder FIGURE 4.22 Maps for a priority encoder 31
32 Multiplexers (MUX) Select binary information from one of many input lines and directs it to a single output line 2 n input lines and n selection lines, a common destination Electronic switch that selects one of two sources Data selector (providing a path from the selected input to the output) FIGURE 4.24 Twotooneline multiplexer 32
33 Decoder FIGURE 4.25 Fourtooneline multiplexer 33
34 Multiplebit Selection Logic FIGURE 4.26 multiplexer Quadruple twotooneline 34
35 Boolean Function Implementation Bolean function of n variables with a multiplexer with n1 selection inputs and 2 n1 data inputs FIGURE 4.27 Implementing a Boolean function with a multiplexer 35
36 FIGURE 4.28 Implementing a fourinput function with a multiplexer 36
37 ThreeState Gates A multiplexer constructed with threestate gates The third state: high impedance state Behave like an open circuit No logic significance Not affected by the inputs to the gate Buffer gate FIGURE 4.29 Graphic symbol for a threestate buffer Multiplexers with three FIGURE 4.30 state gates 37
Combinational Circuits
Combinational Circuits Combinational circuit consists of an interconnection of logic gates They react to their inputs and produce their outputs by transforming binary information n input binary variables
More informationCombinational Logic. Prof. Wangrok Oh. Dept. of Information Communications Eng. Chungnam National University. Prof. Wangrok Oh(CNU) 1 / 93
Combinational Logic Prof. Wangrok Oh Dept. of Information Communications Eng. Chungnam National University Prof. Wangrok Oh(CNU) / 93 Overview Introduction 2 Combinational Circuits 3 Analysis Procedure
More informationDLD VIDYA SAGAR P. potharajuvidyasagar.wordpress.com. Vignana Bharathi Institute of Technology UNIT 3 DLD P VIDYA SAGAR
DLD UNIT III Combinational Circuits (CC), Analysis procedure, Design Procedure, Combinational circuit for different code converters and other problems, Binary Adder Subtractor, Decimal Adder, Binary Multiplier,
More informationCombinational Logic II
Combinational Logic II Ranga Rodrigo July 26, 2009 1 Binary AdderSubtractor Digital computers perform variety of information processing tasks. Among the functions encountered are the various arithmetic
More informationCOMBINATIONAL LOGIC CIRCUITS
COMBINATIONAL LOGIC CIRCUITS 4.1 INTRODUCTION The digital system consists of two types of circuits, namely: (i) Combinational circuits and (ii) Sequential circuits A combinational circuit consists of logic
More informationEE 8351 Digital Logic Circuits Ms.J.Jayaudhaya, ASP/EEE
EE 8351 Digital Logic Circuits Ms.J.Jayaudhaya, ASP/EEE 1 Logic circuits for digital systems may be combinational or sequential. A combinational circuit consists of input variables, logic gates, and output
More informationNH 67, Karur Trichy Highways, Puliyur C.F, Karur District UNITII COMBINATIONAL CIRCUITS
NH 67, Karur Trichy Highways, Puliyur C.F, 639 114 Karur District DEPARTMENT OF ELETRONICS AND COMMUNICATION ENGINEERING COURSE NOTES SUBJECT: DIGITAL ELECTRONICS CLASS: II YEAR ECE SUBJECT CODE: EC2203
More informationChap.3 3. Chap reduces the complexity required to represent the schematic diagram of a circuit Library
3.1 Combinational Circuits 2 Chap 3. logic circuits for digital systems: combinational vs sequential Combinational Logic Design Combinational Circuit (Chap 3) outputs are determined by the present applied
More informationUNIT II  COMBINATIONAL LOGIC Part A 2 Marks. 1. Define Combinational circuit A combinational circuit consist of logic gates whose outputs at anytime are determined directly from the present combination
More informationCombinational Logic with MSI and LSI
1010101010101010101010101010101010101010101010101010101010101010101010101010101010 1010101010101010101010101010101010101010101010101010101010101010101010101010101010 1010101010101010101010101010101010101010101010101010101010101010101010101010101010
More informationChapter 1. Digital Systems and Binary Numbers
Chapter 1. Digital Systems and Binary Numbers Tong In Oh 1 1.1 Digital Systems Digital age Characteristic of digital system Generality and flexibility Represent and manipulate discrete elements of information
More informationECE 2030D Computer Engineering Spring problems, 5 pages Exam Two 8 March 2012
Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate
More informationDepartment of Electrical and Computer Engineering University of Wisconsin  Madison. ECE/CS 352 Digital System Fundamentals.
Department of Electrical and Computer Engineering University of Wisconsin  Madison ECE/C 352 Digital ystem Fundamentals Quiz #2 Thursday, March 7, 22, 7:158:3PM 1. (15 points) (a) (5 points) NAND, NOR
More informationLOGIC CIRCUITS. Kirti P_Didital Design 1
LOGIC CIRCUITS Kirti P_Didital Design 1 Introduction The digital system consists of two types of circuits, namely (i) Combinational circuits and (ii) Sequential circuit A combinational circuit consists
More informationCombinational Logic Circuits
Combinational Logic Circuits By Dr. M. Hebaishy Digital Logic Design Ch Rem.!) Types of Logic Circuits Combinational Logic Memoryless Outputs determined by current values of inputs Sequential Logic Has
More informationBinary Addition. Add the binary numbers and and show the equivalent decimal addition.
Binary Addition The rules for binary addition are 0 + 0 = 0 Sum = 0, carry = 0 0 + 1 = 0 Sum = 1, carry = 0 1 + 0 = 0 Sum = 1, carry = 0 1 + 1 = 10 Sum = 0, carry = 1 When an input carry = 1 due to a previous
More informationR a) Simplify the logic functions from binary to seven segment display code converter (8M) b) Simplify the following using Tabular method
SET  1 1. a) Convert the decimal number 250.5 to base 3, base 4 b) Write and prove demorgan laws c) Implement two input EXOR gate from 2 to 1 multiplexer (3M) d) Write the demerits of PROM (3M) e) What
More informationAddition and multiplication
Addition and multiplication Arithmetic is the most basic thing you can do with a computer, but it s not as easy as you might expect! These next few lectures focus on addition, subtraction, multiplication
More informationCombinational Logic Use the Boolean Algebra and the minimization techniques to design useful circuits No feedback, no memory Just n inputs, m outputs
Combinational Logic Use the Boolean Algebra and the minimization techniques to design useful circuits No feedback, no memory Just n inputs, m outputs and an arbitrary truth table Analysis Procedure We
More informationCombinational Circuit Design
Modeling Combinational Circuits with Verilog Prof. ChienNan Liu TEL: 342275 ext:34534 Email: jimmy@ee.ncu.edu.tw 3 Combinational Circuit Design Outputs are functions of inputs inputs Combinational Circuit
More informationUNITIII REGISTER TRANSFER LANGUAGE AND DESIGN OF CONTROL UNIT
UNITIII 1 KNREDDY UNITIII REGISTER TRANSFER LANGUAGE AND DESIGN OF CONTROL UNIT Register Transfer: Register Transfer Language Register Transfer Bus and Memory Transfers Arithmetic Micro operations Logic
More informationUNIT V COMBINATIONAL LOGIC DESIGN
UNIT V COMBINATIONAL LOGIC DESIGN NOTE: This is UNITV in JNTUK and UNITIII and HALF PART OF UNITIV in JNTUA SYLLABUS (JNTUK)UNITV: Combinational Logic Design: Adders & Subtractors, Ripple Adder, Look
More informationChapter Three. Digital Components
Chapter Three 3.1. Combinational Circuit A combinational circuit is a connected arrangement of logic gates with a set of inputs and outputs. The binary values of the outputs are a function of the binary
More informationInjntu.com Injntu.com Injntu.com R16
1. a) What are the three methods of obtaining the 2 s complement of a given binary (3M) number? b) What do you mean by Kmap? Name it advantages and disadvantages. (3M) c) Distinguish between a halfadder
More informationCOMPUTER ARCHITECTURE AND ORGANIZATION Register Transfer and Microoperations 1. Introduction A digital system is an interconnection of digital
Register Transfer and Microoperations 1. Introduction A digital system is an interconnection of digital hardware modules that accomplish a specific informationprocessing task. Digital systems vary in
More informationB.Tech II Year I Semester (R13) Regular Examinations December 2014 DIGITAL LOGIC DESIGN
B.Tech II Year I Semester () Regular Examinations December 2014 (Common to IT and CSE) (a) If 1010 2 + 10 2 = X 10, then X is  Write the first 9 decimal digits in base 3. (c) What is meant by don
More informationECE 341 Midterm Exam
ECE 341 Midterm Exam Time allowed: 75 minutes Total Points: 75 Points Scored: Name: Problem No. 1 (8 points) For each of the following statements, indicate whether the statement is TRUE or FALSE: (a) A
More informationPrinciples of Computer Architecture. Chapter 3: Arithmetic
31 Chapter 3  Arithmetic Principles of Computer Architecture Miles Murdocca and Vincent Heuring Chapter 3: Arithmetic 32 Chapter 3  Arithmetic 3.1 Overview Chapter Contents 3.2 Fixed Point Addition
More informationFundamentals of Computer Systems
Fundamentals of Computer Systems Combinational Logic Martha. Kim Columbia University Spring 6 / Combinational Circuits Combinational circuits are stateless. Their output is a function only of the current
More informationBinary Adders: Half Adders and Full Adders
Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order
More informationKorea University of Technology and Education
MEC52 디지털공학 Binary Systems JeeHwan Ryu School of Mechanical Engineering Binary Numbers a 5 a 4 a 3 a 2 a a.a  a 2 a 3 base or radix = a n r n a n r n...a 2 r 2 a ra a  r  a 2 r 2...a m r m
More informationCOPYRIGHTED MATERIAL INDEX
INDEX Absorption law, 31, 38 Acyclic graph, 35 tree, 36 Addition operators, in VHDL (VHSIC hardware description language), 192 Algebraic division, 105 AND gate, 48 49 Antisymmetric, 34 Applicable input
More informationR07. Code No: V0423. II B. Tech II Semester, Supplementary Examinations, April
SET  1 II B. Tech II Semester, Supplementary Examinations, April  2012 SWITCHING THEORY AND LOGIC DESIGN (Electronics and Communications Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions
More informationECE 2020B Fundamentals of Digital Design Spring problems, 6 pages Exam Two Solutions 26 February 2014
Problem 1 (4 parts, 21 points) Encoders and Pass Gates Part A (8 points) Suppose the circuit below has the following input priority: I 1 > I 3 > I 0 > I 2. Complete the truth table by filling in the input
More informationSUBJECT CODE: IT T35 DIGITAL SYSTEM DESIGN YEAR / SEM : 2 / 3
UNIT  I PART A (2 Marks) 1. Using Demorgan s theorem convert the following Boolean expression to an equivalent expression that has only OR and complement operations. Show the function can be implemented
More informationChapter 3: part 3 Binary Subtraction
Chapter 3: part 3 Binary Subtraction Iterative combinational circuits Binary adders Half and full adders Ripple carry and carry lookahead adders Binary subtraction Binary addersubtractors Signed binary
More informationCO Computer Architecture and Programming Languages CAPL. Lecture 9
CO20320241 Computer Architecture and Programming Languages CAPL Lecture 9 Dr. Kinga Lipskoch Fall 2017 A Fourbit Number Circle CAPL Fall 2017 2 / 38 Functional Parts of an ALU CAPL Fall 2017 3 / 38 Addition
More informationREGISTER TRANSFER LANGUAGE
REGISTER TRANSFER LANGUAGE The operations executed on the data stored in the registers are called micro operations. Classifications of micro operations Register transfer micro operations Arithmetic micro
More information3. The high voltage level of a digital signal in positive logic is : a) 1 b) 0 c) either 1 or 0
1. The number of level in a digital signal is: a) one b) two c) four d) ten 2. A pure sine wave is : a) a digital signal b) analog signal c) can be digital or analog signal d) neither digital nor analog
More informationBasic Arithmetic (adding and subtracting)
Basic Arithmetic (adding and subtracting) Digital logic to show add/subtract Boolean algebra abstraction of physical, analog circuit behavior 1 0 CPU components ALU logic circuits logic gates transistors
More informationECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010
Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate
More informationDigital logic fundamentals. Question Bank. Unit I
Digital logic fundamentals Question Bank Subject Name : Digital Logic Fundamentals Subject code: CA102T Staff Name: R.Roseline Unit I 1. What is Number system? 2. Define binary logic. 3. Show how negative
More information2. (a) Compare the characteristics of a floppy disk and a hard disk. (b) Discuss in detail memory interleaving. [8+7]
Code No: A109211202 R09 Set No. 2 1. (a) Explain the purpose of the following registers: i. IR ii. PC iii. MDR iv. MAR. (b) Explain with an example the steps in subtraction of two ndigit unsigned numbers.
More informationChapter 4: Combinational Logic
Chapter 4: Combinational Logic Combinational Circuit Design Analysis Procedure (Find out nature of O/P) Boolean Expression Approach Truth Table Approach Design Procedure Example : BCD to Excess3 code
More informationDE Solution Set QP Code : 00904
DE Solution Set QP Code : 00904 1. Attempt any three of the following: 15 a. Define digital signal. (1M) With respect to digital signal explain the terms digits and bits.(2m) Also discuss active high and
More informationArea Efficient, Low Power Array Multiplier for Signed and Unsigned Number. Chapter 3
Area Efficient, Low Power Array Multiplier for Signed and Unsigned Number Chapter 3 Area Efficient, Low Power Array Multiplier for Signed and Unsigned Number Chapter 3 3.1 Introduction The various sections
More informationNH 67, Karur Trichy Highways, Puliyur C.F, Karur District DEPARTMENT OF INFORMATION TECHNOLOGY CS 2202 DIGITAL PRINCIPLES AND SYSTEM DESIGN
NH 67, Karur Trichy Highways, Puliyur C.F, 639 114 Karur District DEPARTMENT OF INFORMATION TECHNOLOGY CS 2202 DIGITAL PRINCIPLES AND SYSTEM DESIGN UNIT 2 COMBINATIONAL LOGIC Combinational circuits Analysis
More information1. Mark the correct statement(s)
1. Mark the correct statement(s) 1.1 A theorem in Boolean algebra: a) Can easily be proved by e.g. logic induction b) Is a logical statement that is assumed to be true, c) Can be contradicted by another
More informationChapter 3 Part 2 Combinational Logic Design
University of Wisconsin  Madison ECE/Comp Sci 352 Digital Systems Fundamentals Kewal K. Saluja and Yu Hen Hu Spring 2002 Chapter 3 Part 2 Combinational Logic Design Originals by: Charles R. Kime and Tom
More informationPrinciples of Digital Techniques PDT (17320) Assignment No State advantages of digital system over analog system.
Assignment No. 1 1. State advantages of digital system over analog system. 2. Convert following numbers a. (138.56) 10 = (?) 2 = (?) 8 = (?) 16 b. (1110011.011) 2 = (?) 10 = (?) 8 = (?) 16 c. (3004.06)
More informationDigital Fundamentals. CHAPTER 2 Number Systems, Operations, and Codes
Digital Fundamentals CHAPTER 2 Number Systems, Operations, and Codes Decimal Numbers The decimal number system has ten digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9 The decimal numbering system has a base of
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2006 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems
More informationECE 2020B Fundamentals of Digital Design Spring problems, 6 pages Exam Two 26 February 2014
Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate
More informationCONTENTS CHAPTER 1: NUMBER SYSTEM. Foreword...(vii) Preface... (ix) Acknowledgement... (xi) About the Author...(xxiii)
CONTENTS Foreword...(vii) Preface... (ix) Acknowledgement... (xi) About the Author...(xxiii) CHAPTER 1: NUMBER SYSTEM 1.1 Digital Electronics... 1 1.1.1 Introduction... 1 1.1.2 Advantages of Digital Systems...
More informationCS 121 Digital Logic Design. Chapter 1. Teacher Assistant. Hadeel AlAteeq
CS 121 Digital Logic Design Chapter 1 Teacher Assistant Hadeel AlAteeq Announcement DON T forgot to SIGN your schedule OR you will not be allowed to attend next lecture. Communication Office hours (8
More informationECE 341 Midterm Exam
ECE 341 Midterm Exam Time allowed: 90 minutes Total Points: 75 Points Scored: Name: Problem No. 1 (10 points) For each of the following statements, indicate whether the statement is TRUE or FALSE: (a)
More informationPART A (22 Marks) 2. a) Briefly write about r's complement and (r1)'s complement. [8] b) Explain any two ways of adding decimal numbers.
Set No. 1 IV B.Tech I Semester Supplementary Examinations, March  2017 COMPUTER ARCHITECTURE & ORGANIZATION (Common to Electronics & Communication Engineering and Electronics & Time: 3 hours Max. Marks:
More informationDate Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 09 MULTIPLEXERS
Name: Instructor: Engr. Date Performed: Marks Obtained: /10 Group Members (ID):. Checked By: Date: Experiment # 09 MULTIPLEXERS OBJECTIVES: To experimentally verify the proper operation of a multiplexer.
More informationD I G I T A L C I R C U I T S E E
D I G I T A L C I R C U I T S E E Digital Circuits Basic Scope and Introduction This book covers theory solved examples and previous year gate question for following topics: Number system, Boolean algebra,
More informationExperiment 7 Arithmetic Circuits Design and Implementation
Experiment 7 Arithmetic Circuits Design and Implementation Introduction: Addition is just what you would expect in computers. Digits are added bit by bit from right to left, with carries passed to the
More informationR10. II B. Tech I Semester, Supplementary Examinations, May
SET  1 1. a) Convert the following decimal numbers into an equivalent binary numbers. i) 53.625 ii) 4097.188 iii) 167 iv) 0.4475 b) Add the following numbers using 2 s complement method. i) 48 and +31
More informationLecture 6: Signed Numbers & Arithmetic Circuits. BCD (Binary Coded Decimal) Points Addressed in this Lecture
Points ddressed in this Lecture Lecture 6: Signed Numbers rithmetic Circuits Professor Peter Cheung Department of EEE, Imperial College London (Floyd 2.52.7, 6.16.7) (Tocci 6.16.11, 9.19.2, 9.4) Representing
More informationChapter 6 CombinationalCircuit Building Blocks
Chapter 6 CombinationalCircuit Building Blocks Commonly used combinational building blocks in design of large circuits: Multiplexers Decoders Encoders Comparators Arithmetic circuits Multiplexers A multiplexer
More informationENDTERM EXAMINATION
(Please Write your Exam Roll No. immediately) ENDTERM EXAMINATION DECEMBER 2006 Exam. Roll No... Exam Series code: 100919DEC06200963 Paper Code: MCA103 Subject: Digital Electronics Time: 3 Hours Maximum
More informationArithmetic Logic Unit. Digital Computer Design
Arithmetic Logic Unit Digital Computer Design Arithmetic Circuits Arithmetic circuits are the central building blocks of computers. Computers and digital logic perform many arithmetic functions: addition,
More informationVALLIAMMAI ENGINEERING COLLEGE. SRM Nagar, Kattankulathur DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EC6302 DIGITAL ELECTRONICS
VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur603 203 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EC6302 DIGITAL ELECTRONICS YEAR / SEMESTER: II / III ACADEMIC YEAR: 20152016 (ODD
More informationHANSABA COLLEGE OF ENGINEERING & TECHNOLOGY (098) SUBJECT: DIGITAL ELECTRONICS ( ) Assignment
Assignment 1. What is multiplexer? With logic circuit and function table explain the working of 4 to 1 line multiplexer. 2. Implement following Boolean function using 8: 1 multiplexer. F(A,B,C,D) = (2,3,5,7,8,9,12,13,14,15)
More informationArithmetic Circuits. Nurul Hazlina Adder 2. Multiplier 3. Arithmetic Logic Unit (ALU) 4. HDL for Arithmetic Circuit
Nurul Hazlina 1 1. Adder 2. Multiplier 3. Arithmetic Logic Unit (ALU) 4. HDL for Arithmetic Circuit Nurul Hazlina 2 Introduction 1. Digital circuits are frequently used for arithmetic operations 2. Fundamental
More informationII/IV B.Tech (Regular/Supplementary) DEGREE EXAMINATION. Answer ONE question from each unit.
Hall Ticket Number: 14CS IT303 November, 2017 Third Semester Time: Three Hours Answer Question No.1 compulsorily. II/IV B.Tech (Regular/Supplementary) DEGREE EXAMINATION Common for CSE & IT Digital Logic
More informationChapter 4. Combinational Logic. Dr. AbuArqoub
Chapter 4 Combinational Logic Introduction N Input Variables Combinational Logic Circuit M Output Variables 2 Design Procedure The problem is stated 2 The number of available input variables & required
More informationDIGITAL TECHNICS. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute
DIGITAL TECHNIC Dr. Bálint Pődör Óbuda University, Microelectronics and Technology Institute 4. LECTURE: COMBINATIONAL LOGIC DEIGN: ARITHMETIC (THROUGH EXAMPLE) 2nd (Autumn) term 28/29 COMBINATIONAL LOGIC
More informationECE 30 Introduction to Computer Engineering
ECE 30 Introduction to Computer Engineering Study Problems, Set #6 Spring 2015 1. With x = 1111 1111 1111 1111 1011 0011 0101 0011 2 and y = 0000 0000 0000 0000 0000 0010 1101 0111 2 representing two s
More informationIA Digital Electronics  Supervision I
IA Digital Electronics  Supervision I Nandor Licker Due noon two days before the supervision 1 Overview The goal of this exercise is to design an 8digit calculator capable of adding
More informationTHE LOGIC OF COMPOUND STATEMENTS
CHAPTER 2 THE LOGIC OF COMPOUND STATEMENTS Copyright Cengage Learning. All rights reserved. SECTION 2.5 Application: Number Systems and Circuits for Addition Copyright Cengage Learning. All rights reserved.
More informationCOLLEGE OF ENGINEERING DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING QUESTION BANK SUBJECT CODE & NAME: EC 1312 DIGITAL LOGIC CIRCUITS UNIT I
KINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING QUESTION BANK SUBJECT CODE & NAME: EC 1312 DIGITAL LOGIC CIRCUITS YEAR / SEM: III / V UNIT I NUMBER SYSTEM & BOOLEAN ALGEBRA
More informationBINARY SYSTEM. Binary system is used in digital systems because it is:
CHAPTER 2 CHAPTER CONTENTS 2.1 Binary System 2.2 Binary Arithmetic Operation 2.3 Signed & Unsigned Numbers 2.4 Arithmetic Operations of Signed Numbers 2.5 Hexadecimal Number System 2.6 Octal Number System
More informationChapter 4 Arithmetic
Computer Eng 1 (ECE290) Chapter 4 Arithmetic Functions and Circuits HOANG Trang Reference: 2008 Pearson Education, Inc. Lecture note of Prof.Donna J.Brown Overview Binary adders Half and full adders Ripple
More informationNumber Systems. Readings: , Problem: Implement simple pocket calculator Need: Display, adders & subtractors, inputs
Number Systems Readings: 33.3.3, 3.3.5 Problem: Implement simple pocket calculator Need: Display, adders & subtractors, inputs Display: Seven segment displays Inputs: Switches Missing: Way to implement
More informationDIGITAL ELECTRONICS. P41l 3 HOURS
UNIVERSITY OF SWAZILAND FACUL TY OF SCIENCE AND ENGINEERING DEPARTMENT OF PHYSICS MAIN EXAMINATION 2015/16 TITLE OF PAPER: COURSE NUMBER: TIME ALLOWED: INSTRUCTIONS: DIGITAL ELECTRONICS P41l 3 HOURS ANSWER
More informationCS6303 COMPUTER ARCHITECTURE LESSION NOTES UNIT II ARITHMETIC OPERATIONS ALU In computing an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. The ALU is
More informationObjectives: 1. Design procedure. 2. Fundamental circuits. 1. Design procedure
Objectives: 1. Design procedure. 2. undamental circuits. 1. Design procedure Design procedure has five steps: o Specification. o ormulation. o Optimization. o Technology mapping. o Verification. Specification:
More informationLECTURE 4. Logic Design
LECTURE 4 Logic Design LOGIC DESIGN The language of the machine is binary that is, sequences of 1 s and 0 s. But why? At the hardware level, computers are streams of signals. These signals only have two
More informationwww.vidyarthiplus.com Question Paper Code : 31298 B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2013. Third Semester Computer Science and Engineering CS 2202/CS 34/EC 1206 A/10144 CS 303/080230012DIGITAL
More informationChapter 3 Arithmetic for Computers
Chapter 3 Arithmetic for Computers 1 Arithmetic Where we've been: Abstractions: Instruction Set Architecture Assembly Language and Machine Language What's up ahead: Implementing the Architecture operation
More informationSIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road QUESTION BANK (DESCRIPTIVE)
SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road 517583 QUESTION BANK (DESCRIPTIVE) Subject with Code : STLD(16EC402) Year & Sem: IIB.Tech & ISem Course & Branch: B.Tech
More informationCSE140 L. Instructor: Thomas Y. P. Lee January 18,2006. CSE140L Course Info
CSE4 L Instructor: Thomas Y. P. Lee January 8,26 CSE4L Course Info Lectures Wedesday ::2AM, HSS33 Lab Assignment egins TA s JinHua Liu (jhliu@cs.ucsd.edu) Contact TAs if you re still looking for a lab
More informationArithmetic and Logical Operations
Arithmetic and Logical Operations 2 CMPE2c x +y + sum Or in tabular form Binary Addition Carry Out Sum B A Carry In Binary Addition And as a full adder a b co ci sum 4bit RippleCarry adder: Carry values
More informationScheme G. Sample Test PaperI
Sample Test PaperI Marks : 25 Times:1 Hour 1. All questions are compulsory. 2. Illustrate your answers with neat sketches wherever necessary. 3. Figures to the right indicate full marks. 4. Assume suitable
More informationUNIT IV: DATA PATH DESIGN
UNIT IV: DATA PATH DESIGN Agenda Introduc/on Fixed Point Arithme/c Addi/on Subtrac/on Mul/plica/on & Serial mul/plier Division & Serial Divider Two s Complement (Addi/on, Subtrac/on) Booth s algorithm
More information10EC33: DIGITAL ELECTRONICS QUESTION BANK
10EC33: DIGITAL ELECTRONICS Faculty: Dr.Bajarangbali E Examination QuestionS QUESTION BANK 1. Discuss canonical & standard forms of Boolean functions with an example. 2. Convert the following Boolean function
More informationDIGITAL ARITHMETIC: OPERATIONS AND CIRCUITS
C H A P T E R 6 DIGITAL ARITHMETIC: OPERATIONS AND CIRCUITS OUTLINE 6 Binary Addition 62 Representing Signed Numbers 63 Addition in the 2 s Complement System 64 Subtraction in the 2 s Complement
More information(+A) + ( B) + (A B) (B A) + (A B) ( A) + (+ B) (A B) + (B A) + (A B) (+ A) (+ B) + (A  B) (B A) + (A B) ( A) ( B) (A B) + (B A) + (A B)
COMPUTER ARITHMETIC 1. Addition and Subtraction of Unsigned Numbers The direct method of subtraction taught in elementary schools uses the borrowconcept. In this method we borrow a 1 from a higher significant
More informationEXPERIMENT #8: BINARY ARITHMETIC OPERATIONS
EE 2 Lab Manual, EE Department, KFUPM EXPERIMENT #8: BINARY ARITHMETIC OPERATIONS OBJECTIVES: Design and implement a circuit that performs basic binary arithmetic operations such as addition, subtraction,
More informationDIRECTORATE OF TECHNICAL EDUCATION DIPLOMA IN ELECTRICAL AND ELECTRONICS ENGINEERING II YEAR M SCHEME IV SEMESTER.
DIRECTORATE OF TECHNICAL EDUCATION DIPLOMA IN ELECTRICAL AND ELECTRONICS ENGINEERING II YEAR M SCHEME IV SEMESTER 2015 2016 onwards DIGITAL ELECTRONICS CURRICULUM DEVELOPMENT CENTRE Curriculum Development
More informationHours / 100 Marks Seat No.
17333 13141 3 Hours / 100 Seat No. Instructions (1) All Questions are Compulsory. (2) Answer each next main Question on a new page. (3) Illustrate your answers with neat sketches wherever necessary. (4)
More informationFundamentals of Computer Systems
Fundamentals of Computer Systems Combinational Logic Stephen. Edwards Columbia University Summer 7 Combinational Circuits Combinational circuits are stateless. Their output is a function only of the current
More informationNumber System. Introduction. Decimal Numbers
Number System Introduction Number systems provide the basis for all operations in information processing systems. In a number system the information is divided into a group of symbols; for example, 26
More informationDepartment of Computer Science & Engineering. Lab Manual DIGITAL LAB. Class: 2nd yr, 3rd sem SYLLABUS
Department of Computer Science & Engineering Lab Manual 435 DIGITAL LAB Class: 2nd yr, 3rd sem SYLLABUS. Verification of Boolean theorems using digital logic gates. 2. Design and implementation of code
More informationEX4 DIGITAL ELECTRONICS After completing the task and studying Unit 1.6, students will be able to: (check all that apply):
EX4 DIGITAL ELECTRONICS G After completing the task and studying Unit 1.6, students will be able to: (check all that apply): Design and use standard combinational circuit building blocks: multiplexers
More informationRegister Transfer and Microoperations
Register Transfer Language Register Transfer Bus Memory Transfer Microoperations Some Application of Logic Micro Operations Register Transfer and Microoperations Learning Objectives After reading this
More information