Introducing a Target-Based Approach to Rapid Prototyping of ECUs

Transcription

1 Introducing a Target-Based Approach to Rapid Prototyping of ECUs FEBRUARY, 1997 Abstract This paper presents a target-based approach to Rapid Prototyping of Eectronic Contro Units (ECUs). With this approach, the constraints of actua production ECUs are introduced eary in the deveopment cyce. This reduces the cost impact of software defects and fosters a more quaity-assured software engineering process. This paper aso presents ADvantage, a Computer Aided Contro System Design (CACSD) tooset. ADvantage is used to impement the target-based approach to Rapid Prototyping of ECUs (RPE). ADvantage aso fuy supports other methods of rapid prototyping such as the ideaized environment RPE approach often used today. 1. Introduction Contros engineers commony use RPE to deveop and assess contro strategies and to provide software engineers with controer agorithm requirements. RPE is usuay performed using graphica controer design packages that automaticay generate code for execution on portabe computers. The computers simuate the contro aws, and interface directy to the actua (or emuated) pant often an automobie driven on a test track. Because it executes foating-point code on generic processors, this approach is sometimes termed ideaized RPE. There is a growing recognition within the automotive industry that whie RPE in an ideaized environment is better than earier methods (described beow), it is sti not the idea prototyping paradigm. The main probem with this approach is that controer agorithms deveoped in an ideaized environment behave differenty when executed in the constrained production environment. Constraints such as fixed-point arithmetic, RTOS scheduing overhead, and CPU performance are considered by many RPE practitioners as too important to ignore. Another area of concern is that the controer agorithms suppied by contros engineers using ideaized RPE often undergo significant changes during target impementation by the software engineers. The changes incude conversions such as foating-point to fixedpoint, Lapace to Z-domain to discrete equations, and optimizations for ess memory and faster execution. In many cases, these changes either are not documented or are not made known to the contros engineer. But for a its fauts, the advantages of rapid, automated deveopment far outweigh the benefits of earier prototyping methods, which did execute the code on the target. This is because the earier methods required software engineers to convert the controer agorithms by hand to target-specific assemby code. Whie accurate, this was a painfuy sow and error-prone procedure Stone Schoo Road Ann Arbor, MI USA

2 INTERNATIONAL FEBRUARY, The Throwaway Prototype Mode In a paper presented at the 1996 IEEE CACSD Symposium [1], Dephi Chassis Systems concuded that: Rapid prototyping is not efficient for making minor modifications to existing production contro systems or for specifying requirements for production intent fixed-point processors ate in the deveopment cyce. On the positive side, Dephi found that RPE shortens deveopment cyces by using an automated approach (i.e., Rapid Prototyping) and that RPE is appropriate for new concept evauation or feasibiity studies. It is generay agreed that RPE faciitates the process of deriving initia software requirements by aowing contros engineers to quicky buid and assess working prototypes. Unfortunatey, after the prototype assessment is finished, the prototype modes are not used for subsequent ECU software deveopment steps, such as fixed-point requirement specification, design, coding, testing, and maintenance. In essence, the ideaized RPE modes are thrown away eary in the deveopment cyce. 3. The Evoutionary Prototype Mode A more efficient RPE paradigm woud sti provide an ideaized RPE capabiity, but it woud then aow for rapid impementation and execution of fixed-point code on the target CPU. Either the actua or a functionay-equivaent RTOS woud be used. The target-based RPE modes coud be reused and refined as the ECU deveopment cyce evoves. target-based RPE mode as the first design iteration. During the ast few years, the Evoutionary Rapid Prototyping mode has gained much support within the software engineering community at arge. Refer to the Proceedings of the Internationa Workshop on Rapid System Prototyping, sponsored by IEEE Computer Society, for recent advancements in Rapid Prototyping technoogy. 4. The Accuracy Question Another concern with ideaized RPE is that the prototyping mode wi behave differenty than the production unit, but how differenty? In their paper describing a Virtua Engine RPE approach [2], Toyota Motor Corporation identified discrepancies between engine data cacuated by the production CPU and engine data cacuated by the prototype CPU. Toyota attributed these sight differences to foating versus fixed-point impementations, poor contro-fow modes, and inadequate interrupt capabiity. Target-based RPE greaty reduces these differences and, in some cases, eiminates them. 5. Expanding Engineering Roes In the future, market forces wi require more sophisticated controer agorithms with enhanced functionaity. At the same time, the market wi resist added costs due to increases in processor size and speed. Thus, contros and software engineers wi need to work more cosey together from project inception, as they estimate word size effects and the computationa deay associated with each new contro strategy. These estimates wi require accurate timing and memory usage studies and truncation/round-off error anayses. It is at this point, that target-based RPE wi no onger be merey optiona. Evoutionary Rapid Prototyping is an iterative software deveopment method that uses the PAGE 2

3 INTERNATIONAL FEBRUARY, The ADvantage Soution In an often cited paper [3], Barker et a., presented a framework mode for a CACSD working environment. The authors repeatedy stressed the importance of an open system architecture: Open systems aow [users] to choose the products with the best price/performance features knowing that they wi work as expected. With a cosed proprietary system it is the deveoper who has contro over the system deveopment, so the user is... ocked into a singe suppier. Appied Dynamics Internationa (ADI) has deveoped a CACSD environment, ADvantage, which embraces many aspects of the framework mode mentioned above. In particuar, ADvantage is based on many pubished standards and provides automated inks, or bridges, to popuar commercia CACSD packages. ADvantage adheres to the foowing pubished standards: ANSI C and FORTRAN 77 anguage standards IP Modue standard (ANSI/VITA ) VMEbus hardware standard (incuding the recent high bandwidth VME64 addendum) The ADvantage Integrated Deveopment Environment (IDE) is the software manifestation of the ADvantage CACSD framework. The ADvantage IDE provides a common project patform and integrated too inks, as shown in Figure 1. The ADvantage open architecture benefits RPE engineers in many ways. It aows engineers to: maintain their existing mode investments as they migrate to a target-based RPE method deveop their own custom RPE environment by mixing products from four of the top CACSD vendors and more than tweve major hardware suppiers easiy incorporate an unimited variety of standards-based I/O devices and software modes, either deveoped in-house or provided by other commercia vendors Figure 1. The ADvantage IDE PAGE 3

4 INTERNATIONAL FEBRUARY, ADvantage Architecture The ADvantage software architecture uses a host/ target approach rather than a sef-hosted method. With host/target architecture, the kerne needed for a target processor is sma and can easiy be ported to any processor or microcontroer. In such a system, it is aso easier to ensure deterministic behavior and give users meticuous contro of the code execution, shoud they desire it. Figure 2 shows the target software architecture that executes on each processor within the Appied Dynamics Rea-Time Station (AD RTS). The targets incude foating-point CPUs such as PowerPC 604 and fixed-point microcontroers such as MC Thus, both ideaized and target-based RPE are supported. Production BEACON Hand Code RTOS Scheduer Thread Libraries Rea-Time Services Nanokerne Figure 2. Target Architecture 7.1. CACSD CACSD SIMULINK SystemBuid ACSL ADSIM EASY5 The CACSD software interface shown in Figure 2 is based on the source code output from each too s automatic code generator (e.g., ISI s AutoCode, TM and The MathWorks Rea-Time Workshop TM ). With the ADvantage IDE, modes from different CACSD packages are easiy connected for mutipe processor execution (e.g., a SIMULINK pant mode output can be sensed by a controer deveoped in SystemBuid) BEACON BEACON differs from most CACSD toos in that its design intent was to automate the deveopment and testing of software for embedded microcontroers, and not to generate code for simuation on genera-purpose CPUs. BEACON can be used for both ideaized and target-based RPE because it generates either foating or fixedpoint software for every bock in its paette. But target-based RPE requires much more than efficient fixed-point capabiity. For exampe, software deveopers need, and BEACON provides, fine-grain contro over the code generation with itte intervention from an under-the-scenes sorter (i.e., no surprises). deveopers aso need a diverse controfow capabiity; BEACON s contro-fow paette contains bocks for sequentia fow, conditiona/ predicate ogic, and repetition. One of BEACON s most important features is that it produces diagrams that can be shared and reviewed by contros and software engineers as precise, unambiguous software requirements and design specification. As the Engineering Institute and many others beieve, software reviews are one of the most important parts of any software deveopment process [4] RTexec RTexec is ADvantage s instrumented rea-time kerne. RTexec provides standard rea-time ibraries, device drivers, and mutithread faciities. A set of basic thread ibraries is provided to et programmers deveop their own schedue schemes. In addition, an RTexec scheduer is avaiabe that performs Rate Monotonic Scheduing and aows for eventtriggered tasks. PAGE 4

5 INTERNATIONAL FEBRUARY, 1997 The priority of any task, whether rate or event based, can be set by the programmer. RTexec aso has mechanisms for mutua excusion, exception handing, and thread profiing Host-based The host environment is the patform for the CACSD packages, BEACON, and ADvantage IDE. The host environment aso provides a fu-featured suite of software support toos. Interact for source-eve debugging (such as breakpointing, singe stepping and dispay of the function ca stack). SIMpane for an animation, caibration and data acquisition environment based on the popuar software from DataViews. Onine hep for quick information access. These support toos are very fexibe and can be used to perform a wide range of anayses. The SIMpane dispay that profies thread timing statistics (Figure 3) is just one exampe. Figure 3. Thread Profiing 8. ADvantage Hardware Architecture The ADvantage RPE hardware component is the AD RTS famiy of products, and in particuar, the portabe In-Vehice System (IVS). The AD RTS has a VMEbus that provides a mutipe processing, distributed execution environment via Singe Board Computers (SBC). These SBCs incude: User Interface Processor (UIP) for host/target communication. Compute Engines (CEs) for executing pant modes or ideaized RPE controers. Parae Inteigent Resources (PIRs) for high and ow speed I/O on a ocaized bus. Target ECU (an IP Modue) for target-based RPE and I/O servicing. The target ECU device contains the target microcontroer on an IP Modue. Dua Ported Memory (DPM) provides an interface between the microcontroer and the IP Modue Bus (IP Bus). Information on the IP Bus is then avaiabe to any other board within the AD RTS. For exampe, the User Interface Board (UIB) can be used to send/receive data between the microcontroer and host, and thus the RPE engineer. In another case, a compute engine may be used to simuate a pant s response to the controer signas for simuation studies. See Figure 4. In addition to the DPM, the target microcontroer aso has access to oca SRAM and PROM, currenty 256KB each, but subject to change. This isoates the target microcontroer from the IP Bus. Thus, the IP Bus (and the entire AD RTS system) cannot interfere with the target microcontroer during execution except in a controed manner via the DPM. PAGE 5

6 INTERNATIONAL FEBRUARY, 1997 The I/O between the externa hardware (or test vehice) and AD RTS is possibe in many forms incuding custom pod (such as DPM), specia purpose communication buses (incuding J1850 or CAN), or directy from the target ECU using its own I/O faciities. Using I/O directy from the target ECU is preferred when performing target-based RPE. The other I/O methods are most appicabe when performing ideaized RPE. If these I/O options are not adequate, ADI s Systems Integration Services is avaiabe to provide custom I/O soutions. Host / User Target ECU TCP/IP Specia I/O IP Sots IP bus User Interface Board Digita I/O Anaog I/O I/O Cabes Vehice Under Test (with or w/o production ECU) Figure 4. Hardware Architecture Compute Engine IP bus via VMEbus or CE oca bus 9. Concusions Target-based rapid prototyping is ikey to become the preferred approach for the next generation of RPE. ADI has deveoped a product ine, ADvantage, which provides a target-based capabiity whie preserving and maintaining a customer s existing RPE modeing investments. The AD RTS aso supports mutipe processors and high bandwidth communications such that a mutitude of rea-time anayses can be performed within the same environment. Anayses can range from ow-speed ideaized RPE to high-fideity, asynchronous engine simuation for hardware-inthe-oop testing. 10. References [1] M. R. DePoyster, J. F. Hoying, K.N. Majeed, Rapid Prototyping of Chassis Contro Systems, Proceedings of the 1996 IEEE Internationa Symposium on Computer-Aided Contro System Design. [2] A. Kimura, I. Maeda, Deveopment of Engine Contro System Using Rea Time Simuator, Proceedings of the 1996 IEEE Internationa Symposium on Computer-Aided Contro System Design. [3] H.A. Barker, M. Chen, P.W. Grant, C.P. Jobing, P. Townsend, Open Architecture for Computer-Aided Contro Engineering, IEEE Contro Systems, Apri [4] M. Pauk, et a., Capabiity Maturity Mode for, Engineering Institute, Carnegie Meon University, Pittsburgh, PA, About ADI Appied Dynamics Internationa provides hardware, software, and engineering services for embedded software deveopers and contro system engineers. Since 1957, ADI rea-time computer systems have been used extensivey in advanced contro system appications in the aerospace, defense, training, and automotive industries. For more information on the compete ADI product famiy, pease contact us at: Appied Dynamics Internationa, Inc Stone Schoo Road Ann Arbor, MI USA Teephone: (313) Facsimie: (313) E-Mai: adinfo@adi.com Appied Dynamics Internationa Limited Oxford House, Oxford Street Weingborough Northamptonshire NN8 4HG United Kingdom Teephone: Facsimie: E-Mai: adinfo%appdyn.uucp@britain.eu.net

7 Production RTOS CACSD BEACON Hand Code Scheduer Thread Libraries Rea-Time Services Nanokerne Simuink SystemBuid ACSL ADSIM EASY5 11. About ADI Appied Dynamics Internationa provides hardware, software, and engineering services for embedded software deveopers and contro system engineers. Since 1957, ADI rea-time computer systems have been used extensivey in advanced contro system appications in the aerospace, defense, training, and automotive industries. For more information on the compete ADI product famiy, pease ca us at (313) or visit our web site:. Appied Dynamics Internationa, Inc Stone Schoo Road Ann Arbor, MI USA Teephone: (313) Facsimie: (313) E-Mai: Appied Dynamics Internationa Limited Oxford House, Oxford Street Weingborough Northamptonshire NN8 4HG United Kingdom Teephone: Facsimie: E-Mai: