Beyond-CMOS Technology Roadmap. An Chen Emerging Research Devices (ERD), ITRS

Transcription

1 Beyond-CMOS Technology Roadmap An Chen Emerging Research Devices (ERD), ITRS

2 2 For slides, questions, and comments, please contact me at:

3 Outline Introduction Emerging logic devices CMOS extension vs. beyond-cmos devices Beyond-CMOS device assessment Emerging memory devices Emerging memory taxonomy and assessment Promising emerging memories: STTRAM, RRAM, FeFET Emerging architectures Beyond von-neumann architectures Non-volatility information processing From scaling driver to function/application driver More-than-Moore: functional diversification Summary 3

4 Technology Innovations Driven by Scaling 4 Beyond-CMOS technologies J. Y.C. Sun, VLSI Tech., T2 (2013)

5 A Roadmap from ITRS PIDS 5 Courtesy of: Yuzo Fukuzaki, cited from M. Badaroglu, More Moore scaling: opportunities and inflection points, ERD Meeting: Bridging Research Gap between Emerging Architectures and Devices, Feb 27, 2015?

6 Power density (W/cm 2 ) Energy Crisis on Chip 6 Scaling increasing power density Low-power design and multi-core introduced Beyond-CMOS devices for low-power solution? Processor peak power density 60 Suppliers: AMD, Intel, SPARC Symbol size = # of cores Year Courtesy of Jonas Wei-ting Chan, Andrew Kahng (UCSD) Source: Bernard S. Meyerson (IBM) Beyond-CMOS?

7 ITRS Emerging Research Devices (ERD) 7 Emerging Research Devices Emerging devices Emerging architectures More-than- Moore New directions Memory Embedded NVMs Storage class memory Emerging devices for RF Sensor applications Logic Low power Devices with learning capabilities Security applications.. A. Chen, J. Hutchby, V. Zhirnov, G. Bourianoff (Ed s) Emerging Nanoelectronic Devices (Wiley, Jan. 2015) ,subjectCd-EE13.html

8 ERD Methodology 8 Selection Criteria to select technology entries to be added or removed in the ERD chapter Transition of technology entries in and out of the chapter Categorization Categorize technology entries based on the types and mechanisms Important considerations for materials, e.g., Si, III-V, carbon-based, 2D materials, etc. Evaluation Conduct survey-based critical review among ERD experts Reference to quantitative benchmark from research community

9 Outline Introduction Emerging logic devices CMOS extension vs. beyond-cmos devices Beyond-CMOS device assessment Emerging memory devices Emerging memory taxonomy and assessment Promising emerging memories: STTRAM, RRAM, FeFET Emerging architectures Beyond von-neumann architecturess Non-volatility information processing From scaling driver to function/application driver More-than-Moore: functional diversification Summary 9

10 Charge Non-charge Emerging Logic Devices 10 ITRS ERD categorizes emerging logic devices into three groups based on state variables and mechanisms State variable Non-charge, beyond-cmos Spin wave Nanomagnet DW logic BiSFET ExFET Spin-torque All spin logic Si FET FinFET SpinFET Atomic sw. RTD Ge & III-V NW FET TFET SET NEMS QCA Graphene FET CNT FET Mott FET Neg-C g IMOS CMOS extension Conventional Novel Charge, beyond-cmos Mechanism

11 CMOS Extension and Beyond-CMOS A basic electronic switch model a E b CMOS extension: New materials Strain, SiGe, Ge, III-V, CNT, New structures FinFET, gate-all-around, Beyond-CMOS devices: new mechanism K. Kuhn, IEDM, 171 (2012) 11 New transport mechanisms E.g., tunneling New gating mechanisms E.g., mechanical ferroelectric New state variables E.g., spin Source Gate Drain

12 Percentage of vote Emerging Logic Device Survey 12 20% Only showing devices with more than 10% vote Most promising Most need of resources 15% 10%

13 Carbon Nanotube (CNT) FET S.J. Han, ERD Emerging logic device assessment workshop Advantages: Scalability Ultra-thin body Ballistic transport Gate-all-around Challenges: Purity, placement, density Variability Contact resistance NFET for CMOS Rc 9nm L ch FET Size-exclusion chromatography

14 Tunnel Field-Effect-Transistor (TFET) 14 QM band-to-band tunneling enables steep sub-threshold slope for low-power operation Challenges: Improve I on while keeping SS and I off low More stringent material, device, and fabrication requirements Reduce interface state density Body thickness scaling at advanced nodes Device variation (body thickness, G-S overlap) TFET surpasses MOSFET in energy at low V dd S. Datta, ERD Emerging logic device assessment workshop. 2014

15 Outline Introduction Emerging logic devices CMOS extension vs. beyond-cmos devices Beyond-CMOS device assessment Emerging memory devices Emerging memory taxonomy and assessment Promising emerging memories: STTRAM, RRAM, FeFET Emerging architectures Beyond von-neumann architectures Non-volatility information processing From scaling driver to function/application driver More-than-Moore: functional diversification Summary 15

16 Emerging Memory Devices 16 Memory Volatile SRAM Baseline DRAM Flash Stand-alone NOR Embedded NAND 4F 2 footprint Nonvolatile Prototypical FeRAM PCM MRAM STT-RAM PIDS Two terminal structures Emerging Ferroelectric Memory FeFET FTJ ReRAM ERD Electrochemical Metallization Bridge Metal Oxide - Bipolar Filamentary Metal Oxide - Unipolar Filamentary Metal Oxide - Bipolar Nonfilamentary Mott Memory Carbon Memory Macromolecular Memory Molecular Memory

17 Percentage of vote Emerging Memory Device Survey 17 40% 30% Only showing devices with more than 10% vote Most promising Most need of resources 20% 10% 1st 2nd 1st 2nd

18 STTRAM: Spin-Transfer-Torque RAM 18 Nonvolatile memory with endurance and speed comparable to those of DRAM and SRAM Challenges: Perpendicular-MTJ with sufficient parameters Integration and manufacturability Variability control Cost and commercial factors J. M. Slaughter, IEDM, 29.3 (2012) C. Yoshida, VLSI Tech., 59 (2012)

19 RRAM: Resistive RAM (Including CBRAM) 19 Advantages: Potentially low-cost Potentially high-density Reasonable speed and endurance Versatile devices, materials and structures (difficulties in down-selection and focus?) Challenges: Stochastic mechanisms Intrinsic variability Controllability and repeatability Failure mechanisms Forming requirements 16Gb CBRAM (Micron/Sony) G. Jurczak, ERD Emerging logic device assessment workshop Rich Fackenthal, ISSCC (2014)

20 Emerging NVMs toward Commercialization 20 Active industry R&D Testchip reports Early production 8Mb RRAM, Gb RRAM, kB RRAM in 8-bit microcontroller (2013) 16Gb CBRAM, 2014 RRAM 32Mb, in-plane, Mb, in-plane, Mb DDR3 STTRAM (2013) 64Mb, p-mtj, 2010 STTRAM

21 physical gate length ( m) Ferroelectric-FET (FeFET) RAM 21 ON: I D > 0 OFF: I D ~ 0 A key breakthrough: Ferroelectric HfO x J. Muller, ERD Emerging logic device assessment workshop Fe-HfOx closes FeFET gate length scaling gap perovskite organic FE-HfO publication year

22 Outline Introduction Emerging logic devices CMOS extension vs. beyond-cmos devices Beyond-CMOS device assessment Emerging memory devices Emerging memory taxonomy and assessment Promising emerging memories: STTRAM, RRAM, FeFET Emerging architectures Beyond von-neumann architectures Non-volatility information processing From scaling driver to function/application driver More-than-Moore: functional diversification Summary 22

23 Emerging Architectures 23 Conventional von Neumann architecture: dominant in today s computing systems Novel architectures beyond von Neumann Cellular automata Co-located memory-logic (e.g., processor-in-memory, Memory-in-logic, computational memory, nonvolatile logic) Reconfigurable computing Cognitive computing (e.g., neuromorphics, machine learning) Statistical and stochastic computing (e.g., statistical inference, approximate computing) Collective-effect computing (e.g., coupled oscillator network)

24 Brain-Inspired Architectures 24 P.A. Merolla, et al, Science 345, 668 (2014)

25 Emerging Logic Device Benchmark 25 Graphene P-N junction D.E. Nikonov, IEDM, p. 576 (2012) Spin-torque oscillator logic Spin-transfer-torque domain-wall Alll-spin-logic device Nano-Magnet Logic Hetero-junction tunnel FET Graphene nanoribbon tunnel FET Spin-torque majority gate Spin-wave device Benchmark emerging devices at logic gate levels (e.g., 32bit adder) Energy-delay tradeoffs extend to beyond-cmos devices

26 Unique Properties of Beyond-CMOS Devices 26 Nonvolatility Built-in memory in logic devices Efficient logic implementation E.g., majority gate Structural / layout regularity E.g., Quantum Cellular Automata (QCA), crossbar arrays Self-adaptive property Coherent or collective behaviors Low-power switching, robustness Novel architectures and designs enabled by these unique device characteristics?

27 Non-Volatile Information Processing (NVIP) 27 NVM MTJ, ReRAM, FRAM, FeFET, PCM, Flash NV gates and logic CMOS logic SRAM, FF, adder, CAM, LUT, FPGA, Leverage fast-growing emerging NVM technologies E.g., STTRAM, RRAM, FeFET, Reduce/eliminate standby power Run-time power-gating Increase throughput and lower power Reduced data movement; immediate data availability Enable novel architectures Non-von-Neumann architectures (e.g., cellular automata), computation-in-memory, latch-less pipeline design,... Nonvolatile switches FF: flip-flop LUT: look-up table CAM: content-addressable memory

28 NVIP: Examples Ferroelectric flip-flop ReRAM-based NV SRAM P.F. Chiu, et al, JSSC 47, 1483 (2012) 28 MTJ-based NV adder S. Matsunaga, et al, APE 1, (2008) M. Koga, et al, TENCON, 317 (2010) Magnetic LUT ReRAM-based programmable interconnect W.S. Zhao, et al, ICVSC, 37 (2011) J. Cong, et al, IEEE TVLSIS 22, 864 (2014)

29 Emerging Architecture Roadmap 29 Challenges Numerous applications and architecture concepts Different performance assessment methods and criteria General-purpose vs. application-specific computing Research gap between emerging architectures and devices A proposed approach Identify common tasks/applications Develop a uniform set of figure-of-merits (FOMs) Assess performance Map with underlying technologies

30 Outline Introduction Emerging logic devices CMOS extension vs. beyond-cmos devices Beyond-CMOS device assessment Emerging memory devices Emerging memory taxonomy and assessment Promising emerging memories: STTRAM, RRAM, FeFET Emerging architectures Beyond von-neumann architectures Non-volatility information processing From scaling driver to function/application driver More-than-Moore: functional diversification Summary 30

31 Booming Mobile and IoT Applications 31

32 More-than-Moore: Functional Diversification 32 ITRS More-than-Moore whitepaper (2011)

33 Emerging Devices for Sensor Node/Network 33 Sensor materials Graphene, 2D materials, functional oxides, Ultra-low power devices and design Sub-threshold and near-threshold design Steep sub-threshold slope devices (e.g., TFET) Nonvolatile memories Low-power, low-cost, high-density RRAM vs. STTRAM Communication components Power management Extremely tight power budget in highly scaled sensor nodes D. Sylvester, Cubic millimeter sensor nodes, Workshop on Rebooting the IT Revolution, March, 2015

34 Address(b) Challenge Address(a) Emerging Devices for Hardware Security 34 Connectivity = vulnerability Utilize ambipolarity of Si nanowire FET for: Logic camouflaging: layout-level obfuscation with similar layouts for different gates Polymorphic gates: multiple functionalities in the same cell Y. Bi, et al, "Emerging Technology based Design Primitives for Hardware Security", submitted. RRAM-based physical unclonable functions (PUF) Random number generator based on random telegraph noise in RRAM 1T1R RRAM cells C.Y. Huang, et al, IEEE EDL 33, 1108 (2012) Eg: R i = 1 if a i > b i R i = 0 if a i < b i (1 i n) n a n Response b Bit-wise comparison A. Chen, IEEE EDL 36, 138 (2015)

35 Align Beyond-CMOS Technologies with New Application Drivers 35 Computing/ Communication 1. Memory 2. Logic 3. Architectures 4. More-than- Moore (RF) Internet-of- Things 1. Low-power devices, e.g., TFET, NEMS 2. Embedded NVM 3. Security, e.g., TRNG, PUFs 4. RF and wireless 5. Sensors integrated with CMOS 6. Energyharvesting devices Cloud/Big Data 1. Optical interconnects 2. Storage Class Memory 3. Efficient DC- DC converters 4. Data driven computing (accelerators for Hadoop, etc) 5. Security Focus of beyond- CMOS technology: Today Emerging Logic Emerging Memory Future Novel architectures Sensor integration Hardware security Energy-harvesting Circuit blocks and architectures for IoT and cloud

36 Summary 36 Beyond-CMOS logic devices focus on low-power and may utilize novel switching mechanisms and/or state variables. Emerging nonvolatile memories have made significant progress and some promising candidates may enable new applications and overcome memory performance bottleneck. Opportunities exist in the research gap between emerging architectures and device technologies. Technology drivers are transitioning from scaling to functions and applications. Technology roadmap needs to be aligned with new market opportunities and technology drivers.