Best Practices of SoC Design

Transcription

1 Best Practices of SoC Design Electronic Design Process Symposium 2014 Kurt Shuler Vice President Marketing, Arteris Copyright 2014 Arteris

2 Arteris Snapshot Founded in 2003; headquarters in Silicon Valley Awards Customer Adoption Timeline of Key Events* Arteris is founded by Philippe Boucard, Alain Fanet and César Douady in Paris. Charlie Janac joins Arteris as CEO. Arteris secures funding in a round led by Synopsys and moves headquarters from Paris to Silicon Valley. Arteris ships second-generation NoC: FlexNoC. It closes funding from Qualcomm Ventures (Europe), ARM (UK) and Innotech (Japan) plus existing investors. Arteris becomes profitable. Leading smartphone models ship using Arteris interconnect technology. Arteris announces hiring of new engineering leadership team Arteris receives first funding from Crescendo Ventures, Ventech and TVM Capital. Arteris ships its first interconnect product called NoCSolution and closes US$ 1 million in licenses almost immediately. Texas Instruments selects the Arteris NoCSolution for OMAP4 Application Processor development. TI works with Arteris to productize NoC technology. Arteris starts customer relationships with Samsung and Qualcomm, ships FlexLLI Interchip Link products. A majority (~60%) of the world s mobility system-on-chip projects adopt Arteris FlexNoC Interconnect. Arteris receives Inc. 500 and other awards for rapid growth Qualcomm purchases Arteris and engineering team in unique transaction. *Timeline graphic courtesy of World Economic Forum Copyright 2014 Arteris 2

3 Active Customers +9 Unannounced Customers Copyright 2014 Arteris 3

4 is key to SoC assembly success CPU Subsystem A15 A15 A15 A15 A7 A7 A7 A7 Design-Specific Subsystems GPU Subsystem 3D Graphics DSP Subsystem (A/V) FlexWay Interconnect Application Subsystem FlexWay Interconnect AES 2D GR. MPEG L2 cache L2 cache Etc. Coherent Interconnect FlexNoC Top Level Interconnect InterChip Links TM Memory Scheduler Memory Controller Wide IO PHY LP DDR DDR3 PHY USB 3 USB 2 PHY 3.0, 2.0 Subsystem Interconnect PCIe PHY High Speed Wired Peripherals Ethernet PHY WiFi GSM LTE LTE Adv. Wireless Subsystem CRI Crypto Firewall (PCF+) RSA- PSS Cert. Engine HDMI MI Display PMU JTAG Memory Subsystem Arteris Interconnect Products Security Subsystem I/O Peripherals Copyright 2014 Arteris 4

5 Accelerate TTM by 9 to 12 months FlexNoC Exploration Structural NoC Synthesis Automated NoC Verification FlexVerifier Observability System Verilog-based assertions can be reused at system level Standard TTM is Months Interconnect Interconnect Architecture Design Verification A D V S SoC system Verification Design Integration P Physical Design T/O Platform Debug Actual Customer Experience with Arteris NoC A D V S months 1-2 days iteration P T/O FPGA Emulation Software Development 9 12 months Copyright 2014 Arteris 5

6 Best Practices Lessons learned from the most successful SoC companies 1. Internally-develop only your most important 2. Create a corporate library 3. Develop corporate design and verification methodologies 4. Use a platform and derivatives approach Copyright 2014 Arteris 6

7 1. Internally-develop only your most important Copyright 2014 Arteris 7

8 2. Create a corporate library Copyright 2014 Arteris 8

9 3. Develop corporate design and verification methodologies FlexNoC Exploration Structural NoC Synthesis Automated NoC Verification FlexVerifier Observability System Verilog-based assertions can be reused at system level Example Design and Verification Flow Interconnect Interconnect Architecture Design Verification A D V S SoC system Verification Design Integration P Physical Design T/O Platform Debug Copyright 2014 Arteris 9

10 4. Use a platform and derivatives approach Copyright 2014 Arteris 10

11 Semi vendors aren t the only one who make chips! Design Vendor Semiconductor Vendor System House or OEM Service Provider or Channel Copyright 2014 Arteris 11

12 Cash on Hand Systems Houses, Semiconductor and Design Vendors, Billions ($B) Apple Microsoft Google Samsung Sony Intel Qualcomm Amazon Ebay TI AMD Toshiba STMicroelectronics Broadcom Renesas Electronics ARM Synopsys Cadence Imagination $19.07 $18.16 $13.28 $11.45 $9.41 $3.96 $2.94 $2.59 $2.49 $2.37 $1.60 $0.91 $0.89 $0.72 $0.08 $35.16 $48.09 $68.31 $ Sources: Morningstar, Forbes, Yahoo Finance, Wikinvest Copyright 2014 Arteris 12

13 Efficient SoC assembly & reuse must become core skills for all semi vendors SoC assembly is more critical to success than creating custom s Best practices can enable semi vendors to make more and better chips, more efficiently Semi customers are becoming competitors as chip design democratizes Copyright 2014 Arteris 13

14 Copyright 2014 Arteris 14