MemCon 2014 October 15 th, Achieving End- to- E nd QoS Poonacha K ongetir a

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1 MemCon 2014 October 15 th, 2014 Achieving End- to- E nd QoS Poonacha K ongetir a (poonacha@netspeedsystems.com)

2 Problem Statement NetSpeed Platform Overview AGE NDA QoS Primer Achieving End- to- end QoS E xample: B uilding R apid Vir tual SoC Platfor ms Summary Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 2

3 Problem Statement NetSpeed Platform Overview AGE NDA QoS Primer Achieving End- to- end QoS E xample: B uilding R apid Vir tual SoC Platfor ms Summary Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 3

4 Problems Faced in Moder n Day SoCs Changing Abstraction Levels 1980s 1990s 2000s Now Sea of transistors Sea of Cells Sea of B locks Sea of IPs CUS TOM ASIC S OC NEXT- GEN S OCS Time- to- Market Pressure Performance Analysis from Day # 1 Create Differentiated Platforms Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 4

5 Time- to- market Pressure Decreas ing TTM even with exploding complexity Sophisticated Functionality Increasing Design Complexity Ever Increasing Number of IP B locks in an SoC +135% % nm 65 nm 28 nm 22 nm (Est) 14 nm (Est) S ource: Qualcomm S napdragon S oc Source: IB S report, 2012 Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 5

6 Creating Differentiated Platforms Core Architecture and Derivative Products MIPI SPI I2C L3 CACHE CPU: 32, 64, DUAL, QUAD, OCTA? MEMORY: DDR, LPDDR, 2, 3,4? COHERENCY: WHAT L EVEL? DSP VIDEO ENCODER 9 10 VIDEO DECODER AUD CPU LPDDR CPU OTHER IP BLOCK S: WHAT, WHO, HOW? IMPACT ON PPA, TTM? DISPLAY PCIe I2C SATA GPU HDMI NAND USB S ource: Google Project AR A Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 6

7 Performance Analysis Multiple Agents Contending for Memor y Multiple traffic profiles with sophisticated B andwidth, QoS requirements CPU Video Cluster GPU E ncode Dis play USB L1/L2 /Decode SoC Interconnect Memor y Controller Heavy Traffic Medium Traffic L ight Traffic Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 7

8 Problem Statement NetSpeed Platform Overview AGE NDA QoS Primer Achieving End- to- end QoS E xample: B uilding R apid Vir tual SoC Platfor ms Summary Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 8

9 SoC Architecture Synthesis Platform Next- Gen Platfor m to help Build Faster, Efficient SoCs Redef i n i n g S oc Desi gn Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 9

10 NetSpeed Platform SoC Architecture Synthesis P ERFORMANCE, P OWE R, AREA SYSTE M- L EVEL USE CASES IP B LOCK S B RINGING THE P OWE R OF SYNTHE SIS TO S OC DE SIGN NETS PEED P L ATF OR M S OC ARCHITECTURE SYNTHE SIS HIGH P ERFORMANCE, CORRECT- BY- CONS TRUCTION IP NETS PEED SYSTE MS IP ON- CHIP INTERCONNECT CACHE COHERENCY S CALAB LE, COHERENT NOC PL ATFOR M Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 10

11 NetSpeed Technology B reakthrough Innovation 100+ Sophisticated Algor ithms Scalable Cache Management Patentable Ideas 50+ Patents filed Networ king Concepts Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 11

12 Des ign F low Step 1: Specify Step 2: Customize Step 3: Generate Components, Connectivity PPA, QoS Requirements SoC Level Use Cases Rapid Architecture Exploration Real- time Customization Power Estimation & Optimization Customized SoC Interconnect IP Synthesizable R TL Verification IP C++ Functional Models PPA Statistics IPXACT, Custom Reference Manual Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 12

13 Key Components of the NetSpeed Solution E ss ential Toolkit for SoC Architecture Application- level Deadlock Avoidance End- to- end R obust QoS Multi- L ayered Security Sophisticated Power Management Complete Physical Awareness SoC Architecture Synthesis Platform Performance Analys is Flexible, Scalable Coherency Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 13

14 Problem Statement NetSpeed Platform Overview AGE NDA QoS Primer Achieving End- to- end QoS E xample: B uilding R apid Vir tual SoC Platfor ms Summary Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 14

15 NetSpeed s QoS Approach Automated, User - Controlled QoS Automated, User - controlled QoS implementation QoS implementation par t of des ign flow Strict priority & weighted bandwidth allocation schemes NetSpeed Flow SoC Requirements NocStudio Fully automated flow Advanced algorithms to achieve QoS specifications Optimal allocation of Virtual channels Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 15

16 NetSpeed NoC QoS Details NoC QoS 4 Fixed Priority levels ; higher priority wins Weighted BW allocation within a priority level Weights are configurable at run time QoS set up during Noc Constr uction QoS value for each transaction, applies to all hops Amba QoS optionally mapped to Noc QoS CPU Cluster L1/L2 Video GPU E ncode Dis play USB /Decode SoC Interconnect Memor y Controller QOS - 1 QOS - 2 QOS - 3 add_tr affic_b qos 1 profile video cpu/m.ar bw 0.1 peak 0.2 mem/s.ar/ add_tr affic_b qos 1 profile video cpu/m.aww bw 0.1 peak 0.2 mem/s add_tr affic_b qos 2 profile video vid/m.ar bw 0.5 peak 1 mem/s.ar/s.r add_tr affic_b qos 2 profile video vid/m.ar bw 0.5 peak 1 mem/s.aww add_tr affic_b qos 2 profile video cse/m.ar bw 1 peak 2 mem/s.ar/s.r add_tr affic_b qos 2 profile video cse/m.ar bw 1 peak 2 mem/s.aww add_tr affic_b amba_qos { 0 1} qos 2 profile video dis p/m.ar bw 2 peak 4 add_tr affic_b amba_qos { 4 5} qos 3 profile video dis p/m.ar bw 2 peak 4 Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 16

17 Providing End- to- end QoS Match Gear Ratios For Optimal Results NoC QoS K nobs 4 Fixed Priority levels Higher priority wins Weighted B W allocation within a priority level Configurable at run time DDR QoS K nobs Port Arbitration Fixed P r ior ity among por ts B W allocation by rate limiting Command Ar bitration Commands from a higher priority executed first Match Gear ratios for Optimal End to End QoS Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 17

18 Problem Statement NetSpeed Platform Overview AGE NDA QoS Primer Achieving End- to- end QoS E xample: B uilding R apid Vir tual SoC Platfor ms Summary Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 18

19 Achieving End- to- end QoS Uniform Weights Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 19

20 Achieving End- to- end QoS Different Weights Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 20

21 Achieving End- to- end QoS Memor y Cons er vation Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 21

22 Problem Statement NetSpeed Platform Overview AGE NDA QoS Primer Achieving End- to- end QoS E xample: B uilding R apid Vir tual SoC Platfor ms Summary Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 22

23 Example Use Case: Building Rapid Virtual SoCs A Phas ed Approach Phase 1 MC + NoC + Transactors NS Phase 2 Controller IP, MC + NoC Phase 3 CPU, MC + NoC Phase 4 CPU, MC, DSP, Display + NoC Exercise the mem controller Take frames from agent to memor y Take frames from CP U to memor y Fr ames from CP U to Mem to on- screen dis play Phased approach in enabling virtual chip Phase 1: Exercising the memory controller Phase 2: Exercising controller IP, MC and NoC Phase 3: Taking frames from CPU to memory Phase 4: Frames from CPU to Mem to on- screen display Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 23

24 E xample Platfor m: Mobile S oc S ubs ystem Bare-metal SW test environment with pre-built basic IP integration tests Cadence Palladium P latfor m EVOS SoC Subsystem C Tests AR M CPU Subsystem SR AM0 SR AM1 PHY CLK RST A9 CPU RTL SR AM Controller SR AM Controller LPDDR Controller RTL0 Shell RTL1 Shell APB B ridge 64- B it Interconnect - NetSpeed NoC SoC IP B as ic IOs High- s peed IOs Automatically generated Accelerated Embedded Testbench E VOS AR M Cortex M3 Testbench CPU PIC Timer GPIO GPIO AVIP UAR T UART TBA I2C I2C AVIP I2C AVIP CSI2 CSI2 AVIP CSI2 CSI2 AVIP DSI DSI AVIP USB2 USB2 AVIP Testbench Interconnect UART TBA UAR T AVIP Supports SoC integration tests to use cases and peripheral modeling Dis play Controller R GB TBA Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 24

25 Problem Statement NetSpeed Platform Overview AGE NDA QoS Primer Achieving End- to- end QoS E xample: B uilding R apid Vir tual SoC Platfor ms Summary Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 25

26 Summary Problems Faced in Modern Day SoCs Changing Abstraction Levels NetSpeed Platform 1980s Sea of transistors 1990s Sea of Cells 2000s SoC Architecture Synthesis PERFORMANCE, POWER, AREA SYSTEM-LEVEL USE CASES Sea of Blocks Now Achieving End-to-end QoS IP Memor y Conser vation BLOCKS Sea of IPs BRINGING THE POWER OF SYNTHESIS TO SOC DESIGN CUSTOM ASIC SOC NETSPEED PLATFORM SOC ARCHITECTURE SYNTHESIS NEXT-GEN SOCS HIGH PERFORMANCE, CORRECT-BY-CONSTRUCTION IP NETSPEED SYSTEMS IP ON-CHIP CACHE INTERCONNECT COHERENCY Time-to-Mar ket Pressure Per for mance Analysis from Day # 1 Create Differentiated Platfor ms Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 2 SCALABLE, COHERENT NOC PLATFORM Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 7 Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 15 Poonacha Kongetira, MemCon 2014 Copyright 2014 NetSpeed Systems 26

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