INDUSTRY REVIEW FOCUS ON MEMS PACKAGING. Two very different approaches to MEMS packaging

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1 F e b r u a r y I S S U E N 2 6 Packaging beyond the mainstream By 3D Packaging Editorial Team Emerging volume markets in MEMS, LEDs, power devices and even silicon photonics mean an increasing diversity of demands and opportunities for semiconductor packaging technology. Despite some bumps along the way, MEMS, LEDs and power devices are maturing into high volume consumer markets on track to reach a combined $40 billion over the next five years. Silicon photonics is emerging towards commercial growth. That means growing demand for more standard and lower cost packaging solutions for volume production across these markets, and also plenty of new, high value technical problems to solve for their highly diverse requirements. This issue we look at some key developments and trends across these growth markets outside of the mainstream IC world. INDUSTRY REVIEW FOCUS ON MEMS PACKAGING Two very different approaches to MEMS packaging Bosch roadmap is mostly wire bonding, while Silex aims to facilitate use of TSV. While MEMS is clearly moving towards smaller, lower cost, more standard packaging solutions, there are widely different paths to these same ends. Robert Bosch (Bosch) and Silex Microsystems (Silex) epitomize the wide variation in possible successful approaches to MEMS packaging. While the major IDM continues to push traditional wire bonding to new limits, the leading MEMS foundry now supplies half its customers with through-silicon-via solutions. As one of the top three MEMS producers, Robert Bosch fabs well over a 1.5 million MEMS devices a day for annual sales approaching $800 million. And it s turned that well developed in-house expertise to pushing fairly conventional packaging technology to new generations of smaller devices, co-designing the MEMS, the ASIC and the packaging to allow stacking and wire bonding ASIC to MEMS to laminate substrate in a plastic LGA package for almost all its products. The WLCSP magnetometer BMM150. (Courtesy of Robert Bosch) It s been a question of how far you can push the limits of the package and its manufacture, says Georg Bischopink, Bosch VP of engineering, who s responsible for MEMS packaging. We ve found we can push further than we thought before. Two to three years ago we thought that a 2 x 2mm 2 package was the absolute limit, but now 2 x 2mm 2 is standard and our newest mold package with wire bonding is 1.2 x 1.5mm 2. The IDM can improve the MEMS design and tune its volume manufacturing processes to tighter tolerances, while also driving the ASIC design to better handle smaller signals from the smaller structures. Then it works closely with its assembly subcontractors to simulate all the effects and adjust the molding compounds, temperatures and pressures to manage the stresses. It has outsourced all assembly of mold packages since the mid 1990s to its own lines at subcontractors in Asia, starting with mold technology for automotive sensors. It would be too expensive to do it in Germany, notes Frank Schaefer, product manager, automotive sensors. 6

2 I S S U E N 2 6 F e b r u a r y The company expects stacking of chips with wire bonding to continue to be its main approach even as sensors move increasingly to multichip combinations in single packages, that integrate some combination of accelerometers, gyroscopes, and magnetometers for full motion sensing, plus a microcontroller for more sophisticated processing and perhaps a RF chip for wireless. That means more thinning of the chips of the CMOS more readily than the more sensitive MEMS for triple stacking to still stay under the 1mm package height limit expected for mobile consumer products. Our roadmap is that the standard LGA works fine, says Schaefer, arguing that direct wafer-to-wafer or chip-to-wafer bonding or bumping won t work well with multiple chips of very different sizes. And TSV is too expensive, he notes. We re still fine with wire bonding. On the automotive side, customers are discussing alternatives to SOIC packages, but concern for the reliability of the soldering in smaller packages outweighs the limited interest in reducing size. Here too the main emphasis is on pushing the conventional technology, to eliminate pre-mold and optimize the molding compound and process specifications. Bosch has, however, recently made its first foray into wafer-level chip sized packaging, with its latest tiny 3-axis magnetometer. The magnetic sensor elements are integrated into the ASIC and solder bumps added on top. The combination of ASIC and solder bumps has a height of 0.6mm. This is our only WL CSP so far without any mold, notes Bischopink, suggesting some caution about how widely applicable the technology will be, as it requires more robust sensors than for an LGA. Silex pushes low-density TSVs to next generation At the other end of the spectrum, the leading pureplay MEMS foundry Silex Microsystems has seen double digit growth in recent years, to close to $40 million in annual sales, in large part by providing its small fabless MEMS customers with an established through-silicon via interconnect to distinguish their products. Peter Himes, Silex VP of marketing and strategic alliances, says that about half its customers now use its low density, all-silicon TSV process, either for an interposer between the MEMS and ASIC chips, or as an element of the MEMS for its I/O to the ASIC or the board, allowing reduction of the pad area for smaller, lower cost devices. These via-first connections are made in full-thickness wafers by isolating plugs of low-resistance silicon by etching around them and filling the trench with dielectric. TSVs for MEMS are generally low density, with typical pitches of 100 to 200µm and anywhere from 2 to 20 TSVs per device, on full-thickness wafers that avoid the need for thin wafer handling or special carriers, a much simpler and lower cost solution than the thin interposers for high density ICs. The Swedish company is now introducing a new generation of copper-filled vias in full thickness wafers, pushing the low-density TSV approach towards smaller pitch and lower resistance, to extend application to smaller MEMS devices, and potentially to other analog, mixed signal, LED and power devices that also need 10s or 100s, not 1000s of vias. These 90µm-diameter copper vias use technology licensed from Swedish supplier ÅAC Microtec. A small etch from the front and a deep etch from the back create a waist in the middle of the full-wafer via profile that serves as a locking pin to prevent the relatively large plug from popping out during temperature cycling. The copper filling has a hollow core to compensate for the TCE mismatch between the copper and the silicon to improve reliability. Next on the roadmap is a 50µm version, and a technology to build embedded passives into the silicon along with the copper vias, developed in conjunction with an European-funded research program. An inductor, for example, could be built through the vertical TSV to take up less substrate surface area than the usual horizontal coil, providing high inductance-per-unit-area integrated passive capabilities. Silex is currently working to develop complete characterization of the thermal and frequency and other properties for the final packaging and assembly of these wafer-level TSV stacks, to offer customers a complete engineered solution of the whole system to ease design and speed transfer to production of the packaged device. Paula Doe for Yole Développement (Courtesy of Silex Microsystems) Our roadmap is that the standard LGA works fine. We re still fine with wire bonding, says Dr Frank Schaefer, Bosch. Dr. Georg Bischopink, Vice President, Bosch Engineering Sensors for External Customers and Sensor Packages, Bosch Georg hold in 1992 a Ph. D. in semiconductor physics, University of Freiburg, Germany. He has worked at Bosch since 1992 at various positions such as Section Manager - Development MEMS Sensor Products, Director, Bosch MEMS-Production or Vice President, Bosch Corporate Research Microsystem-Technology. Peter Himes, VP Marketing & Strategic Alliances, Silex Microsystems Peter has over 25 years experience in helping startups and public companies establish their strategic direction and industry position. Experienced in IC and MEMS alike, Peter has held VP of Sales and/or Marketing positions at QuickSil, SiTime, and Winbond Corporations. Dr. Frank Schaefer, Senior Manager for Product Management Automotive MEMS, Bosch Franck hold in 1999 a Ph.D. in semiconductor physics, University of Wuerzburg, Germany. He has been working with Bosch since 1999 at various positions in the field of MEMS. Since 2012, he is head of product management for automotive MEMS sensors. 7

3 F e b r u a r y I S S U E N 2 6 Instead of putting the high value ASIC on a blank silicon interposer with vias and interconnects, we could put the photonics on the interposer and connect it directly to the upstairs die, says Chris Bergey, Luxtera. INDUSTRY REVIEW FOCUS ON SILICON PHOTONICS PACKAGING Silicon photonics looks for 2.5D assembly at OSATs Though silicon photonics has so far relied on one-chip integration of optics with electronics to start to get real traction in the data communications market, sector pioneer Luxtera sees the evolving packaging technology for heterogeneous 2.5D integration as the next generation solution to scale integrated photonics to high volume production. The company is working to build up a scalable back end silicon photonics infrastructure with OSATs and assembly and test tool suppliers. Silicon photonics is still a small emerging market, but growing demand for high speed data communication is starting to spur serious interest. Yole Développement sees silicon photonic systems sales of some $215 million by The sector got a recent boost when Facebook announced plans to move to silicon photonics for its server interconnect, to enable disaggregation of computing into separate units for more efficient sharing of memory among multiple processors. Leading supplier Luxtera says it has shipped more than half a million of the optics-and-transistors-on-silicon devices to date, primarily for active optical cables in data centers, and sees demand for >10M units a year by One key enabler of this growth will be moving from the electrical system-on-a-chip approach to an electrical and optical system in a package solution, made possible by the recent advances in 3D packaging technology. The silicon infrastructure s development of 2.5D heterogeneous integration is a key technology path forward for photonics, says Chris Bergey, Luxtera VP of marketing. Instead of putting the high value ASIC on a blank silicon interposer with vias and interconnects, we could put the photonics on the interposer and connect it directly to the upstairs die. This allows the silicon to have optical I/O with much lower system power consumption, terabits of speed and >100 meters of reach. Cisco Systems recently similarly announced that it was prototyping such a 2.5D silicon interposer solution. Integrating optics into electronics for higher speed transmission requires optical waveguides, modulators and receivers in silicon, integrated with CMOS transistors, which silicon photonics suppliers now make on a single chip. More complicated is getting the optical power supply of light into the system, whether by also integrating III-V laser devices into the silicon, or bonding on the compound semiconductor devices, or micro packaging a MEMS mirror device on top, or by connecting a separate laser component to the chip by optical fiber. Getting the light out of the system means connecting the chip to optical fiber. Integrating the diverse optics and electronics at the package level could be a simpler volume production solution, now that 2.5D heterogeneous integration technology for short, fast connections is emerging. A silicon photonics foundry could process the large photonic device, making waveguides, modulators, receivers, optical I/Os to connect to the ASIC, and Optical coupler: interfaces between interposer and MT-ferrules Optical fibers provide high-speed interconnect and provide supply of DC light to transmitters Photonic Interposer Package Substrate: High & low speed IO Power supply and Mechanical support to interposer Heat sink mounted on package MT-Ferrules as example for pluggable fiber (MCF) interconnect Optical ASIC foor plan & packaging. (Courtesy of Luxtera) 8

4 I S S U E N 2 6 F e b r u a r y Optical ASIC foor plan & packaging. (Courtesy of Luxtera) adding a limited number of TSVs for power and ground to the printed circuit board. The interposer wafer could be full thickness or thinned, depending on application requirements. A packager could then micro bump an advanced CMOS control die and a little glass connector component on to the photonic/interposer-- either chipon-chip or chip-on-wafer--then plug in and align the optical fiber bundle to that connector. Very little new needs to be developed beyond the natural evolution of the mainstream 2.5D packaging processes, argues Bergey. The vias would need to be made through SOI wafers for the photonics/interposer, but there don t appear to be major issues there. Assembly equipment will need to be modified to very precisely align the glass plug to the photonics substrate, and then to align the fiber into the connector. The required precision is on the order of that of copper pillar bumping, more precise than that for flip chip. Bergey figures commercial die attach tools could be customized to do the job, doing first pass alignment by machine vision, then running light though the fibers for final optical alignment. Luxtera has been busy finding partners to help in its strategy of leveraging the existing semiconductor manufacturing infrastructure to ramp silicon photonics quickly to low-cost volume production, including for packaging, assembly and test. It has designed its photonics to use standard processes and tools, and is licensing its technology to encourage others to develop products to add to the volumes as well. The company is now producing on 200mm wafers at Freescale Semiconductor, and developing a 300mm process at STMicroelectronics. ST plans to design and manufacture its own products for its customers with the process, as well as fab devices for Luxtera. Luxtera also has supplied its process to OpSIS for an open foundry service with design kit and multi-product wafers run at IME in Singapore and at Luxtera s own fab, to help bring down the cost of photonics development for other users. It s working with an OSAT to build a standard process for optical attach and test. It has partnered with Tokyo Electron to customize a standard probe tool for high speed wafer-scale optical testing, with fast alignment using prober cameras. After developing the needed volume technologies with the first key partner, Luxtera expects that partner to sell to other users as well, while Luxtera rolls the technologies out to more suppliers to create a more robust supply chain. There s a whole ecosystem that has to be built out as systems move from copper to optical interfaces for 25Gbps and beyond it s a big transition, says Bergey. Paula Doe for Yole Développement Chris Bergey, Vice President of Marketing, Luxtera Prior to joining Luxtera, Chris was a Vice president at Broadcom, responsible for establishing and managing Broadcom s WLAN combo business, which he grew into one of Broadcom s largest lines of business. Prior to spending nine years at Broadcom, Bergey worked for Multilink Technology Corporation and Advanced Micro Devices. Chris received his MBA from the University of Maryland and a BS in Electrical and Computer Engineering from Drexel University. 9

5 F e b r u a r y I S S U E N 2 6 INDUSTRY REVIEW FOCUS ON POWER DEVICE PACKAGING New packaging technology and new business models impact power module design Potential volume markets in alternative energy applications have attracted investment into both new packaging technologies and new business models that could have a big impact on the power device market. We check in with International Rectifier on technology for replacing wire bonding with modular solderable components, and with iqxprz on the rise of the fabless/foundry option. The potentially high volumes and extreme performance demands of the hybrid and electric vehicle market will have significant impact on power device technology. One recent example of the innovation being driven by this market is International Rectifier s new modular IGBT and diode co-pack building block that can be surface mounted in different combinations, simplifying power module construction and allowing systems makers to more easily create their own optimized power circuit topologies. IR has replaced the wire bonds with solderable metal on both sides of the thin IGBT and diode dies, and attached both to a direct bonded copper substrate. These pre-assembled and pre-tested building blocks are then attached to a DBC singly or in multiples, either face up, or face down flip-chip style for shorter connections and flexible design. Eliminating the wire bonds improves reliability and makes a more compact device, while the IGBT and diode dies with solderable metal on both sides can be easily assembled into co-packs and modules. (Courtesy of International Rectifier) double-sided cooling signifiantly improves thermal performance. After attaching the leadframe, this compact unit is then overmolded. Compared to a conventional module wirebonded in a gel-sealed plastic package, this process adds a top layer of DBC, but eliminates the wirebonds, gel and base plate, although a base plate can be added as an option. Jack Marcinkowski, Sr. Technical Marketing and Applications Manager for International Rectifier s Automotive Business Unit, says this buildingblock approach significantly reduces overall system cost, by improving mechanical, electrical and thermal performance, but especially by providing a standardized and tested building block that simplifies power module customization and assembly and improves yields. IR will both use the technology in its own modules and sell the devices to outside customers. This intermediate co-pack fills the gap between discretes and modules, he says, noting that the compact modules can replace a number of discrete packaged devices. There s no precedent in the industry. Manufacturers can use the co-pack like a surface-mounted component to create their own optimized custom topology, instead of trying to design their system around an existing commercial module. The compact module is reportedly roughly half the size and a quarter of the weight of a similarly-rated wire-bonded gel package, opening design possibilities such as putting the inverter inside the electric motor housing, for example. Key to the development was selecting proper device metallization, die attach, materials with well matched thermal expansion properties, and devising a high yielding manufacturing process. The company says the payoff is major improvements in performance for EV/HEV inverter demands. Marcinkowski reports the devices have held up through some one million thermal cycles so far in company tests, while wirebonds the most common failure mechanism for power devices may start to crack or delaminate at 100,000 cycles. 10

6 I S S U E N 2 6 F e b r u a r y The lower resistance of these direct soldered interconnects also reduces losses and means about a 5%-7% decrease in power dissipation, he says. The DBC sandwiching the dies provide doublesided cooling capability, though initial applications using conventional heat sink approaches won t get the full advantage of it. To switch to double-sided cooling, the mechanical design of the inverter cooling system will have to be adapted, notes Marcinkowski. But it will soon be necessary to do that, to improve the heat transfer from more compact packages. The IBGT-and-diode co-pack can run at a 25 C higher junction temperature than the current typical 150 C. With the doublesided cooling, IR figures the device can potentially achieve as much as 80% higher current rating than a single-side cooled device with a maximum junction temperature rating of 150 C. Fabless iqxprz designs power modules for foundry production Also relatively new to the traditionally IDMdriven power device business is the rise of fabless companies and foundries, also expanding the options for module design and manufacture. The boom of investment in solar and wind energy in China attracted a crowd of new entrants to the market for inverters and their component power devices and modules. Many of these players had the expertise and capital to focus on only one step in what looked to be a big volume opportunity to bring down manufacturing costs in the power sector. Though the recent downturn in the renewable energy sector has hurt these suppliers, some are successfully expanding the power sector s options for lower cost production. One of these fabless module design companies now breaking into the European market is QXPRZ (pronounced IQ Express). The Manila-based company works closely with a local established power device assembly subcontractor to prototype and manufacture the devices in low volume. The business got its start in the alternative energy bubble five years ago, designing complex power modules using off-the-shelf discrete devices SuperSOT (Courtesy of iqxprz Power) for small inverter makers. With the plunge in renewable energy demand, the company has lately been focusing largely on smart power modules for the home appliance sector, integrating IC drivers with IGBTs and MOSFETs into compact packaging. VP and COO Cherie Sasan says the company strategy is targets small companies who need complex customized power modules in very small quantities, aiming to offer lower cost products than the technology-leading European module makers, but better quality than its fabless/foundry Chinese competitors. Most of our customers are in Europe, says Sasan. And most of our competition is in China. Most of our customers have used Chinese products before they turned to us. To make manufacture of the custom products more efficient, the company aims to use a standard plastic housing which has multiple different holes to accommodate different leads for different products, and a standard leadframe inside, whose different pins can be connected or not as needed. It also sticks to conventional technologies, producing some legacy products obsoleted by the big IDMs. We re not innovators, says Sasan, though she does note that the company is working on developing an alternative substrate material to AlN. Paula Doe for Yole Développement Jack Marcinkowski, Sr. Technical Marketing and Applications Manager, International Rectifier s Automotive Business Unit. Jack is responsible for development of power modules with focus on HEV and EV applications. Jack first joined IR in 2003 as an Applications Design Manager working for the Automotive Business Unit for 4 years and re-joined IR in July of Jack holds a MSEE degree from Technical University in Warsaw, Poland as well as an MBA degree from UCLA in Los Angeles, California. Cherie Sasan, Vice-president & COO, iqxprz Power Cherie worked in the semiconductor industry for more than 20 years. She joined iqxprz Power Inc in 2008 and is responsible for corporate strategy, business development and commercial operations. Prior joining iqxprz Power Inc, she was the Development Engineering Manager of Team Pacific Corporation. She holds a degree in Electronics and Communications Engineering from the Mapua Institute of Technology and is currently taking up MBA at the Ateneo de Manila-Regis University. 11