X-MAX-1: the world s smallest PC

Transcription

1 : the wrld s smallest PC The MAX mdule cntains a cmplete PC with 100-MHz 486-CPU and memry n a mdule n bigger than a matchbx. The numerus n-bard functins are led ut thrugh tw r three 40-ple plug cnnectrs: Cnnectr A (= Outside wrld) prvides sme standard interfaces and basic functins. Cnnectr B (= Bus) interfaces with the X-Bus, and Cnnectr C (= Cntrl) is ptinal, essentially intended fr graphics, keybard and the tw PCMCIA-Slts. Special hardware cnfiguratins can als be prvided frm certain quantities upwards. A versin with n-bard 10-Base T Ethernet cnnectin, up t 32 MByte RAM and 8 MByte flash will be available shrtly. All ther interfaces are identical. 486 CPU with 100 MHz and 8 kbyte Cache (33, 66 r 100 MHz) 16 MByte RAM (2, 4, 8 r 16 MByte) <1> 4 MByte Flash (0.5, 1, 2 r 4 MByte) <1,2> Keybard cnnectin fr XT (AT keybard is emulated) LCD graphics interface up t 640x480 <3> PCMCIA cntrller fr 2 PC cards <3,4> Parallel-Prt EPP (LPT1 r LPT2) <4> RS-232 (COM1 r COM2) <5> irda-interface (infra-red) <5> 2 Interrupt-Cntrllers, 2 DMA cntrllers Watch-dg, ext. reset, RTC, 3 x 16-bit timer Cnnectins fr battery and dig. ludspeaker Vltage mnitr A fr NMI, vltage mnitr B fr reset On-bard LED with ext. cnnectin Varius digital inputs and utputs Ext. interrupt inputs Serial debug interface X-Bus cnnectin with multi-prcessr capability Measures nly 29 x 58 x 10 mm... <1> Versin with 64 MByte and 8 MByte flash under preparatin <2> On-bard flash can be used as a flash-file system <3> Optinally available withut graphics and PCMCIA interface <4> PCMCIA-Slt B and parallel prt cannt be used simultaneusly <5> Serial interface can be used as RS-232 r irda SORCUS Cmputer GmbH Page 1

2 The sftware f the MAX-PC The mdule is a cmplete PC. All n-bard interfaces cnfrm t the standard PC architecture, unless therwise stated. It can therefre safely be assumed that a prgram develped n a PC under ne f the custmary PC perating systems will als run withut mdificatins n the "MAX-PC". Nnetheless, a test is advisable, e.g. using the evaluatin bards available frm SORCUS. The perfrmance crrespnds t that f a 100-MHz 486 PC. Each mdule is supplied with SORCUS s wn realtime multi-tasking OsX perating system. Alternatively. a BIOS can als be pre-installed, frm which all custmary PC perating systems, such as DOS, Windws 3.x, 95, 98, Windws NT, Embedded NT, Windws CE, QNX r Linux can be started. All perating systems have their specific memry requirements, which will depend n the integrated drivers and f curse n the size f the applicatin prgrams invlved. Examples fr minimal memry requirements are specified in an Applicatin Nte. Develping yur wn prgrams This is dne using the same develpment envirnments custmarily fund n PCs. Libraries fr the mdule s SORCUS-specific functins are supplied as standard. There is als an ptin fr using the MAX-PC in stand-alne mde. Fr this purpse, t, prgrams can be develped n an(ther) PC. They are then dwnlad int the n-bard RAM r flash via ne f the MAX-PC s interfaces. This als applies fr prgrams running under the realtime multitasking OsX perating system, which are like wise develped like PC prgrams. The prgrams created are laded as.exe files frm a hst cmputer nt the mdule, and installed as tasks there. Bting the system: 2 phases must be distinguished here: Phase H (hardware bt) and Phase S (sftware bt). Phase H: the n-bard flash is empty (blank) r incrrectly prgrammed. T ensure that after a reset the CPU des nt fetch the firs cmmands frm the n-bard flash, the BOOT pin at Cnnectr A must be set t lg. 1. This means that bting can be run using a memry card in PCMCIA Slt A. Fr this purpse, tw precnditins must be met: 1) The mdule must be prvided with a PCMCIA cntrller. 2) A memry card with a bt prgram must be inserted in PCMCIA Slt A. If n PCMCIA Slt A is prvided, and yu nevertheless want t bt in Phase H, then an X-Bus interface must be prvided n the carrier bard card nt which the mdule is plugged. A ROM r flash cntaining the actual bt prgram must be directly cnnected t this X-Bus interface. The NOPCA pin at this X-Bus interface and the BOOT pin at Cnnectr A must bth be set t lg. 1. The X-Bus interface will then switch t the externally cnnected ROM, irrespective f whether PCMCIA-Slt A is prvided r nt. Bt frm PCMCIA-Slt A Pin BOOT Pin NOPCA prvided (at Cnnectr A) (at X-Bus interface) On-bard Flash yes n.c. r 0 n.c. r 0 PCMCIA-Slt A yes 1 n.c. r 0 Ext. ROM yes 1 1 On-bard Flash n n.c. r 0 n.c. r 0 Ext. ROM n 1 1 n.c.: = nt cnnected Phase S: the n-bard flash cntains a bt prgram, in which a decisin is made n hw the further bt peratin is t prceed. Nrmally, after a reset, the system starts frm the n-bard flash (BOOT pin at Cnnectr A uncnnected r at lg. 0) and starts Phase S. Here, it then lads the desired perating system likewise frm the n-bard flash r frm an external medium, e.g. frm a hard disk in the PCMCIA slt r at an IDE interface, frm a flppy, etc. The executin f the bt peratin in Phase S can be influenced by a variety f mechanisms, e.g. by the prgram in the n-bard flash, by entries in the n-bard serial EEPROM, by whether a card is inserted in PCMCIA Slt A, etc. Page 2 SORCUS Cmputer GmbH

3 The hardware f the MAX-PC The CPU The MAX-PC can be delivered with the AMD-CPU SC400 with graphics and PCMCIA cntrllers r with the SC410 withut these tw cntrllers. In bth cases, the CPU invlved is a 486 type, withut an arithmetical cprcessr, with 8 kbyte cache. Bth CPUs are available in 3 speed variants: 33 MHz, 66 MHz and 100 MHz. The external CPU clck pulse is 33 MHz at maximum, but can be reduced in steps dwn as far as 2 MHz by the sftware in rder t reduce pwer cnsumptin. The internal clck pulse, t, (max. 100 MHz) can be set using the sftware. It can be switched ver at any time during peratin. Memry The MAX-PC cntains 4 different types f memry: DRAM (dyn. RAM) Flash-ROM Serial EEPROM (SPI) CMOS-RAM in the RTC, bufferable with an external battery The n-bard DRAM can be prvided in the fllwing size variants: 2 MByte, 4 MByte, 8 MByte and 16 MByte. 32 and 64 MByte ptins are under preparatin. Here, t, the size f the memry can be custmized frm a certain quantity f units upwards. RES WDO BAT LEDs HOST RBS PRESS98 Seite 1-1 RAM (bis 64 MByte) Flash (bis 16 MByte) Pwer Fail Reset Watchdg Uhr LED (int./ext.) serielle Debug- Schnittstelle PC-Card Interface (2 x PCMCIA) Blckschaltbild 486-CPU RES NMI 4 Interrupt- Cntrller DMA- Cntrller 1 X-Bus Interface EEPROM (bis 32K) ser. Schnittst. parallel (EPP) Tastatur- Interface Lautsprecher- Ausgang 3 Timer LCD-Graphik- Cntrller The n-bard flash ROM variants currently available are 512 kbyte, 1 MByte, 2 MByte and 4 MByte. A versin with 8 MByte flash is under preparatin. Via an external X-Bus mdule, the flash-rom memry can at present be expanded by 32, 64 r 128 MByte fr each X-Bus mdule. The limitatin t 64 MByte entailed by the prcessr s addressing space des nt cnstitute a restrictin fr a flash file system, fr example. Mre than ne flash mdule can be plugged n, t. The SORCUS flash-file system administers the flash memry like ne r mre hard disk drives. A serial EEPROM (SPI-Bus) can at present be up t 16 kbyte in size. It cntains cnfiguratin data fr the mdule. It can be accessed bth by the n-bard CPU and via the X-Bus. The CMOS-RAM is, as is custmary with PCs, incrprated in the RTC. It is 114 bytes in size. Its use crrespnds t that in a PC. Like the RTC as well, it can be buffered by an external battery. Serial interfaces The MAX-PC cntains tw serial interfaces, ne f which is cmpatible. It can be cnfigured as COM1 r COM2, and perated as an RS-232 r infra-red interface. Bth interfaces can be prvided simultaneusly in ne system; the user can switch ver between them at any time using the sftware. The RS-232 drivers (3x) and receivers (5x) are prvided n the MAX-PC. The max. baudrate prgrammable is kbaud. The interface als senses whether a remte statin is cnnected. If n signal is being received, int ges t a pwer-dwn state. In rder t save current, it can be switched ff cmpletely using the sftware. As an infra-red interface it supplies the signals fr direct cnnectin f an infra-red transmitter/receiver. The baudrate can likewise be prgrammed here up t max kbit/s r in DMA mde fixed at MBit/s. The secnd serial interface is very simple, and merely prvided as a debug interface. It cnsists nly f a transmit/receive line with lgic levels. The level cnverters, e.g. fr RS-232 r RS-485, must be prvided externally. The parallel interface This can be used as LPT1 r LPT2 in 3 mdes f peratin: first f all in the custmary mde as a printer interface (as with the PC/AT), then 8-bit bidirectinal (as in PS/2 systems) and finally as an Enhanced Parallel Prt (EPP). Simultaneus use f the parallel interface and the PCMCIA-Slt B is nt pssible. RS-232 irda LCD- Display SORCUS Cmputer GmbH Page 3

4 Graphics interface This prvides fr direct cnnectin f an LCD display with up t 8-bit data. It supprts Single-Scan and Dual-Scan Mnchrme LCDs and Clr STN-Displays. The interface is sftware-cmpatible with CGA, MDA and HGA text and graphics mdes. Typical reslutins, fr example, are 640x480, 480x320, 320x240 with up t 16 gray levels r clrs. Drivers fr special displays and different reslutins can be created n request. We als ffer slutins fr displays featuring a tuch-screen. Inquiries are welcmed. Keybard interface The MAX-PC prvides a direct cnnectin fr an XT keybard. An interface can be emulated fr cnnecting an AT keybard. The interface prvided by the micrcntrller fr a matrix keybard is nt available n the MAX-PC. Interrupt and DMA cntrllers The use f interrupts is largely identical t that in the PC/AT architecture, r can be crrespndingly cnfigured. Fur interrupts can be cnnected t the X-Bus. They can additinally be multiplied by means f interrupt-sharing. Each f them can be cnnected t ne f the MAX-PC s 15 interrupt inputs. Anther interrupt is cnnected t the MAX-PC s mailbx register, and is triggered if anther X-Bus master writes smething int the mailbx register. Tw further interrupts are cnnected t external inputs at Cnnectr A. The DMA cntrllers likewise cnfrm t the PC/AT architecture. One channel (prgrammable t 8 r 16 bits) is cnnected t the X-Bus. Others can be used fr the n-bard peripherals, fr example. It shuld be nted that the limitatin n the specified number f interrupt and DMA channels n the X-Bus relates nly t the mdule. In multi-prcessr systems with several f these mdules, each f them pssesses this number independently f the thers. Vltage mnitring, watch-dg, NMI In cntrast t a standard PC, the MAX-PC pssesses expanded safety features, specifically fr industrial applicatins. The 3.3V supply vltage is mnitred with tw vltage threshlds. If the supply vltage drps belw the upper threshld, an NMI (Nn-Maskable Interrupt) is requested. This gives the CPU time t start an emergency prgram. If the supply vltage als drps belw the lwer threshld, a hardware reset will be released. The n-bard watch-dg timer can be activated thrugh the sftware. It must then be retriggered within 200 ms. If this is nt dne, an NMI will als be requested. RTC, timer The Real Time Clck (RTC) cnfrms t the standard PC architecture, and is cmpatible with the MC146818A with 114 bytes f user RAM. The interrupt utput is cnnected t IRQ-8. The RTC can be buffered using an external battery. The 3 timers, t, are PC-cmpatible, thugh the input frequency is 0.3 % lwer than with a standard PC. Channel 0 has interrupt capability, and is cnnected t IRQ0; Channel 1 can be used as a sftware timer. The utput f Channel 2 is available at Pin SPKR (ludspeaker utput). In additin, Channel 2, in cntrast t a standard PC, has interrupt capability. The sftware can be used t cnnect it t any f the MAX-PC s 15 interrupts. PCMCIA slts A and B The MAX-PC is prvided with a standard cntrller fr PCMCIA cards, which is cmpatible, with expansins fr up t 5 memry windws and 2 I/O windws fr each PCMCIA-Slt. DMA is nt supprted. Bth slts supprt pwer cntrl, aut pwer-dwn, if n card is inserted, and autmatic detectin if a card is inserted. Sme signals fr the PCMCIA slts are led ut directly (at Cnnectr C), thers via the X-Bus. Fr this reasn, an X-Bus chip and the buffers/switches fr ht-plugging are required n the carrier bard int which the MAX-PC is plugged. Page 4 SORCUS Cmputer GmbH

5 Varius digital inputs/utputs The MAX-PC puts sme digital inputs and utputs at the user s dispsal. In additin, there are severa thers nes, available nly if ther functins are nt required and have been deactivated (using the sftware), if the system is reprgrammed in the factry r if different cmpnents have been prvided. The inputs and utputs can be tabulated as fllws: Pin name SPKR PIRQ6 HOST LEDint GPIOCS0 Functin Ludspeaker utput resp. Timer Channel 2 utput Interrupt input Interrupt input, digital input/utput, used fr the serial debug interface Output f the n-bard LED Input/utput Sme functins preclude the simultaneus use f certain ther functins. In sme cases users can switch ver using the sftware, thers have t be reprgrammed in the factry. When the parallel prt is being used, then PCMCIA-Slt B is n lnger available. When neither the parallel prt nr PCMCIA-Slt B is in use, the pins can be utilized as digital inputs/utputs. If the X-Bus cnnectin is nt required, then anther 25 pins are available as digital inputs/utputs. They can be reprgrammed individually in the factry. Each f them can be prgrammed as a digital input, utput r as a bidirectinal input/utput. Inputs can als be given interrupt capability. In additin, digital functins, such as cunters, SSI r async. serial interfaces, pulse-width-mdulated utputs, anther parallel prt, etc. can be implemented in the n-bard CPLD`s. Functins yu give up Signals yu get What has t be dne? PCMCIA-Slt A 4 I/O Cnfiguratin by sftware PCMCIA-Slt B 3 I/O Cnfiguratin by sftware Parallel prt and PCMCIA-Slt B 12 I/O, 8 Outputs Cnfiguratin by sftware 20 I/O Reprgram the CPLD`s in the factry RS-232 and irda 5 interrupts Cnfiguratin by sftware Debug interface 1 interrupt, 1 utput Cnfiguratin by sftware X-Bus 25 I/O and interrupts Reprgram the CPLD`s in the factry Pwer cnsumptin The X-Bus and all mdules wrk with 3.3 V as their supply vltage. But +/- 12 V are als carried n the X-Bus. This ptin is required nly when a mdule actually needs these vltage. The pwer cnsumptin will depend n a number f factrs. It will be influenced by the sftware-settable clck frequency f the CPU, by the devices activated n the mdule (the graphics cntrller can be switched ff, fr instance), and als by the sftware currently being run. Pwer Management The CPU can assume the fllwing perating mdes: Hyper-Speed, High-Speed, Temprary Lw-Speed, Standby, Suspend, Critical Suspend SORCUS Cmputer GmbH Page 5

6 The X-Bus The X-Bus is a synchrnus 8-, 16- r 32-bit-wide bus with an active bus terminatin. In the case f the mdule, it is running at 33 MHz and is 16 bits wide. The bus has plug-and-play and multi-prcessr capabilities. After pwer-up r after a system reset, each mdule first receives a slt number. This is determined autmatically, and can lie between 0 and 255 (8 bits). In the subsequent initializatin phase, first f all an initializatin master is determined (if mre than ne bus master is present) and then each mdule is cnfigured. Each mdule nw, fr example, is assigned ne r mre memry and/r I/O address ranges, which are entered as what are called base addresses in the cnfiguratin area f each mdule. These ranges can basically be any size desired. They are used fr cntrlling each mdule s actual functins. In additin, all mdule als have what is called an infrmatin area, cntaining everything which the mdule cncerned wants and can. In particular, these data are used during the cnfiguratin phase. Virtual Interface Lines (VILs) Virtual Interface Lines can link X-Bus mdules with each ther ver any desired number f lines. The MAX-PC utilizes this, fre example, by receiving 4 interrupts ver VILs. Each mdule can request an interrupt via a VIL; mre than ne mdule can als share the same VIL, and thus share an interrupt (interrupt-sharing). The X-Bus DMA channel (DMA-Request and DMA-Acknwledge) f the MAX-PC is als handled via VILs, as is master arbitratin. Multi-prcessr systems The X-Bus enables several CPU mdules r bus masters t wrk n the same bus. In principle, the number f masters can be as large as the maximum permitted number f mdules. Due t the architecture f the mdule, hwever, the number f bus masters is restricted here at present t 4. Nte that each bus master can access all ther mdules. In the MAX-PC and in all I/O and PC peripheral mdules, care has been taken t ensure that mre than ne CPU mdule can als access the same mdule. An intelligent piece f sftware called mdule device drivers makes sure that n cnflicts arise. Cmmunicatin between bus masters 29 mm RBS PRESS98 Seite 1-2 B = Bus Stackability 58 mm A = utside wrld e.g.: X-DRAM-32 r X-FLASH-32 Fr this purpse, each bus master, i.e. each mdule as well, pssesses a 16-bit mailbx register in its cnfiguratin area. Anther bus master can write a message int this mailbx, which triggers an interrupt. A faster ptin fr cmmunicatin, particularly when amunts f data are invlved, is btained when the system als incrprates a RAM memry mdule. Then tw masters can als cmmunicate with each ther by this means. First, they allcate an area in the RAM fr interchanging data. If ne f the masters has prvided data fr the ther there, it infrms it by writing a message int the latter s mailbx. Bth cmmunicatin ptins are prvided fr in the libraries supplied by SORCUS. The address ranges f X-Bus and (all figures in bytes) Address range Max. size fr Max. size with On-bard as an X-Bus peripheral X-Bus Memry 4GB+ per master 64M per master 2..16M - I/O 64K+ per master 64K per master 64K - Cnfiguratin 64K per mdule 64K per mdule Inf 32M per mdule 32M per mdule 2..16K 2..16K In the Max. size fr X-Bus" clumn, the maximum addressing range f the X-Bus is specified. The "+" sign here signifies the fllwing: n the X-Bus an ptin is prvided fr individual mdules t be addressed by nly ne r by mre than ne bus master. Each mdule knws wh is currently bus master. When a bus access peratin is perfrmed, each mdule checks whether the current bus master has access permissin. If this is the case, the system checks whether the bus address falls in ne f the areas which has been specified by ne f the mdules cnfigured base addresses. Only when this is als the case will the mdule react. Thus prvisin is made fr an expansin f the addressable memry and I/O spaces, by the 8 bits which identify the current bus master. This means, fr example, Page 6 SORCUS Cmputer GmbH

7 that n ne bus mre than ne mdule can ccupy the same I/O address. Each f these mdule, hwever, is assigned t a different bus master. In the case f the mdule, this ptin fr master tracking is nt prvided, nr is it necessary, because a secnd bus master, e.g. anther mdule, has access nly t the cnfiguratin and infrmatin spaces f the mdule, but nt t the latter s n-bard devices (see the " as X-Bus peripheral" clumn). The "Max. size with " clumn specifies the actual addressing range f this mdule. A part f this is already ccupied by n-bard memry r peripherals. The CPU f the will execute an (external) X-Bus access peratin nly f the address cncerned des nt relate t the n-bard memry r the n-bard peripherals. If an n-bard device is prvided, but has been deactivated by the sftware, e.g. the serial interface, an X-Bus access peratin will be perfrmed. Testability f the mdule s hardware The mdule can be tested in its entirely using JTAG, bth in regard t the CPU and t all ther devices. It is thrugh the JTAG pins TMS, TCK, TDO and TDI at Cnnectr B that the n-bard CPLDs are prgrammed in the factry. A secnd JTAG cnnectin at Cnnectr C, via which the CPU can be tested, must first be activated using a pull-up resistr at the JTAG pin. This causes sme pins f Cnnectr C t alter their functins, and becme a secnd JTAG prt. Hardware expansins Since the MAX-PC pssesses an X-Bus cnnectin, it can (like any ther PC) be expanded by plugging in cards r mdules. When the n-bard peripherals are disabled, e.g. COM1, then the system will autmatically access the addresses invlved via the X-Bus. Practically all custmary PC peripheral functins are prvided n mdules resp. are under preparatin, e.g.: General PC peripherals, cmmunicatin Clr graphics up t 1024x768, CRT and LCD cnnectin (VGA-cmp.) Sund-Blaster-cmpatible mdule IDE cntrller Flppy interface ISDN interface 56K-Mdem 2 serial interfaces 4 serial interfaces Ethernet with 10-BaseT cnnectin Ethernet with 100-BaseTX (10/100 MBit) FireWire IEEE-1394 CAN interface PROFIBUS-Interface Memry expansins RAM 32 MByte (stackable) Flash 32 MByte (stackable) Prcess peripherals, instrumentatin and cntrl Analg inputs, 20 channels, 12-bit reslutin Analg inputs, 4 channels, 16 Bit res., el. islated Analg utputs, 4 channels, 12 Bit res., el. islated Analg utputs, 4 channels, 16 Bit res., el. islated Relay utputs, 8 relays Digital inputs/utputs, 38 channels Digital inputs, 20 channels, pt-isdated Digital utputs, 20 channels, pt-isdated 3-channel cunter and incremental encder interf. (el. islated) SORCUS Cmputer GmbH Page 7

8 Typical applicatins fr and MAX mdules PC/104-carrier bard fr 3 MAX-mdules Same architecture as MAX6isa 4 Windws-cmpatible plug-and-play devices (Device 0 t 3) Can als be cnfigured as intelligent PC/104-bard (with ) DiP = Decentralized Intelligent Peripherals (fr ISDN, PROFIBUS, CAN r Ethernet 10/100) Mdule 1 Mdule 2 Mdule 3 Hst-mdule (ISDN, PROFIBUS, CAN r Ethernet 10/100) CPU-mdule IO-mdule IO-mdule IO-mdule RBS PRESS98 Seite 1-3 ISA- resp. PC/104 Interface RBS PRESS98 Seite 1-4 Embedded PC with LCD and 2 x PCMCIA (fr Windws CE r NT) X-KIT-3: Evaluatin-bard with TFT-display and PCMCIA Pwer RS-232 Parallel-prt LEDs MAX-PC free fr I/O-mdule free fr I/O-mdule PC with 100 MHz 486 further CPUs pt. flash-disk TFT-clr screen 2 PCMCIA-slts RS-232, EPP, RTC COM2 COM3 B B B C A C A A Mdule 2 LCD/Vide- Cnverter Ethernet TFT- Vide-Display (1/4 VGA) Cnnectin fr LCD-Display PC-Card A PC-Card B 2 free X-Bus slts COM4 B Mdule 3 A X-Bus Interface PCMCIA-Slt RBS PRESS98 Seite 1-5 vlumen apprx. 200 cm 3 (= 70x90x35 mm) RBS PRESS98 Seite Pins Mdule 3 40 Pins Mdule 2 (FDC, IDE) Architectur f the "intelligent" MAX6isa-bard MAX6isa ISA- Bus PnP-Cntrller A (5 IO-Devices) Device 1..6 = Mdul 1..6 Device 0 = Bridge X-Bus Mdule 1 (MAX-PC) Mailbx Mdule 2 EEPROM ISA- t X-Bus Bridge Mdule 3 PnP-Cntrller B (2 Memry/IO- Devices) Mailbx Mdule 4 Mdule 5 EEPROM EEPROM Mdule 6 RBS PRESS98 Seite 1-7 Seite 8 SORCUS Cmputer GmbH