Sharp NC Mp, 1.66 µm Pixel Size CCD Image Sensor

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1 Sharp NC Mp, 1.66 µm Pixel Size CCD Image Sensor Imager Process Review For comments, questions, or more information about this report, or for any additional technical needs concerning semiconductor technology, please call Sales at Chipworks Richmond Road, Suite 500, Ottawa, ON K2H 5B7, Canada Tel: Fax:

2 Imager Process Review Table of Contents 1 Overview 1.1 List of Figures 1.2 List of Tables 1.3 Company Profile 1.4 Introduction 1.5 Device Summary 1.6 Process Summary 2 Device Overview 2.1 Teardown Images, Package, and Die 2.2 Functional Blocks and Analysis Sites 2.3 Die Features 3 Process Analysis 3.1 General Device Structure 3.2 Bond Pads 3.3 Dielectrics 3.4 Metallization 3.5 Contacts 3.6 MOS Transistors and Poly 3.7 Isolation 3.8 Wells and Substrate 4 Pixel Analysis 4.1 Overview 4.2 Pixel Plan View and Bevel Analysis 4.3 Pixel Cross-Sectional Analysis Perpendicular to Charge Transfer Channel 4.4 Pixel Cross-Sectional Analysis Parallel to Charge Transfer Channel 5 Critical Dimensions 5.1 Functional Blocks and Analysis Sites 5.2 Die Features 5.3 Dielectrics 5.4 Metallization

3 Imager Process Review 5.5 Contacts 5.6 MOS Transistors and Poly 5.7 Isolation 5.8 Wells and Substrate 5.9 Pixel Horizontal Dimensions 5.10 Pixel Vertical Dimensions 5.11 TEM-EDS Analysis Summary 6 References 7 Statement of Measurement Uncertainty and Scope Variation About Chipworks

4 Overview Overview 1.1 List of Figures 2 Device Overview Camera Module Top Camera Module Bottom Camera Module During Teardown Sharp CCD Imager Assembly Sharp CCD Package Top Sharp CCD Package Bottom (Part 1) Sharp CCD Package Bottom (Part 2) Sharp CCD Package X-Ray NC9670 Die Photograph NC9670 Die Markings (Part 1) NC9670 Die Markings (Part 2) Functional Blocks Analysis Sites Die Corner A (Depot) Die Corner B (Depot) Die Corner C (Depot) Die Corner D (Depot) Die Edge Minimum Pitch Bond Pads Bond Pad Large Test Pad Small Test Pads Corner of Pixel Array Transfer Transistor Transfer Transistor Tilt View 3 Process Analysis Die Thickness Die Edge Die Seal General Structure Bond Pad Bond Pad Edge Passivation and IMD PMD and Interpoly Dielectric Minimum Pitch Aluminum Interconnect Aluminum Metal Thickness Al Light Shield Minimum Pitch Tungsten Metal Tungsten Light Shield

5 Overview Contact To Tungsten Light Shield Contacts to Poly 1 and Poly Detail of Contact to Poly Minimum Pitch Contacts Detail of Contact to Diffusion Poly 1 and Poly 2 Thickness Transfer Transistor Overview SCM of Transfer Transistor Transfer Transistor Gate Length Transfer Transistor Gate Edge Transfer Transistor Gate Dielectric MOS Transistor Overview NMOS Transistor Overview NMOS Transistor Gate Edge PMOS Transistor Overview PMOS Transistor Gate Edge Minimum Width Isolation LOCOS and Bird s Beak SRP Analysis Sites SRP of Pixel Array SRP of Peripheral P-Well SRP of Peripheral N-Well 4 Pixel Analysis Upper Lenses Tilt View Pixel Array Corner (Organics, Lenses, and Color Filters Removed) Pixel Array Edge Pixel at Tungsten Light Shield Pixel at Poly Control Lines Pixel at AR Layer SCM of N-Charge Transfer Channel Substrate Surface SCM of N-Photocathodes Pixel Analysis Sites Pixel Overview (Section B) Right Edge of Pixel Array (Section B) Left Edge of Pixel Array (Section C) Detail of Poly 2 Control Line TEM (Section A) Detail of Poly 2 Control Line Gate Dielectric (Section A) Edge of Poly 2 Control Line TEM (Section A) SCM of Pixel Structure (Section B) SCM of N-Photocathodes (Section B) Microlens Radius of Curvature TEM (Section A)

6 Overview Green Color Filter TEM (Section A) Red Color Filter TEM (Section A) Blue Color Filter (Section B) Pixel Array Top Edge Light Shield Contact (Section D) Pixel Array Top Edge (Section D) Poly Control Lines Above Transfer Channel (Section D) Detail of Poly Control Lines Center of Aperture (Section E) 1.2 List of Tables 1 Overview Device Identification NC9670 Device Summary NC9670 Process Summary 2 Device Overview Bottom Package Markings Die Utilization Die, Bond Pad, and Standard Cell Dimensions 3 Process Analysis Measured Dielectric Thicknesses Metallization Thicknesses Metallization Width and Pitch Contact Dimensions Peripheral MOS Transistor and Poly Dimensions Isolation Critical Dimensions Well Depths and Die Thickness 4 Pixel Analysis Pixel Horizontal Dimensions Pixel Vertical Dimensions TEM-EDS Analysis of Organic Spacers, Color Filters, and Microlenses 5 Critical Dimensions Die Utilization Die, Bond Pad, and Standard Cell Dimensions Measured Dielectric Thicknesses Metallization Thicknesses Metallization Width and Pitch Contact Dimensions Peripheral MOS Transistor and Poly Dimensions Isolation Critical Dimensions Well Depths and Die Thickness Pixel Horizontal Dimensions Pixel Vertical Dimensions TEM-EDS Analysis of Organic Spacers, Color Filters, and Microlenses

7 About Chipworks Chipworks is the recognized leader in reverse engineering and patent infringement analysis of semiconductors and electronic systems. The company s ability to analyze the circuitry and physical composition of these systems makes them a key partner in the success of the world s largest semiconductor and microelectronics companies. Intellectual property groups and their legal counsel trust Chipworks for success in patent licensing and litigation earning hundreds of millions of dollars in patent licenses, and saving as much in royalty payments. Research & Development and Product Management rely on Chipworks for success in new product design and launch, saving hundreds of millions of dollars in design, and earning even more through superior product design and faster launches. Contact Chipworks To find out more information on this report, or any other reports in our library, please contact Chipworks at: Chipworks 3685 Richmond Rd. Suite 500 Ottawa, Ontario K2H 5B7 Canada T: F: Web site: info@chipworks.com Please send any feedback to feedback@chipworks.com