Sony ICX098BL ¼ Inch Optical Format 5.6 µm Pixel Size CCD Image Sensor

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1 Sony ICX098BL ¼ Inch Optical Format 5.6 µm Pixel Size CCD Image Sensor Substrate Dopant Analysis For comments, questions, or more information about this report, or for any additional technical needs concerning semiconductor and electronics technology, please call Sales at Chipworks Richmond Road, Suite 500, Ottawa, ON K2H 5B7, Canada Tel: Fax:

2 Imager Process Review Some of the information is this report may be covered by patents, mask and/or copyright protection. This report should not be taken as an inducement to infringe on these rights Chipworks Inc. This report is provided exclusively for the use of the purchasing organization. It can be freely copied and distributed within the purchasing organization, conditional upon the accompanying Chipworks accreditation remaining attached. Distribution of the entire report outside of the purchasing organization is strictly forbidden. The use of portions of the document for the support of the purchasing organization s corporate interest (e.g., licensing or marketing activities) is permitted, as defined by the fair use provisions of the copyright act. Accreditation to Chipworks must be attached to any portion of the reproduced information. IPR CYRF Revision 1.0 Published: February 26, 2010

3 Imager Process Review Table of Contents 1 Overview 1.1 List of Figures 1.2 List of Tables 1.3 Company Profile 1.4 Introduction 1.5 Device Summary 1.6 Process Summary 2 Device Overview 2.1 Package, and Die 2.2 Die Features 3 Focused Process Analysis 3.1 General Device Structure 3.2 Dielectrics 3.3 Metallization 3.4 Contacts 3.5 Polysilicon 3.6 Wells and Substrate 4 Pixel Analysis 4.1 Pixel Overview and Planar Analysis 4.2 Pixel Cross-Sectional Analysis (Parallel to VCCD) 4.3 Pixel Cross-Sectional Analysis (Parallel to HCCD) 5 Critical Dimensions 5.1 Die and Die Feature Dimensions 5.2 Dielectrics 5.3 Metallization 5.4 Contacts 5.5 Polysilicon 5.6 Wells and Substrate 5.7 Pixels 6 References 7 Statement of Measurement Uncertainty and Scope Variation About Chipworks

4 Overview Overview 1.1 List of Figures 2 Device Overview Package Top Package Bottom Planar Package X-Ray Side-View Package X-Ray Die Photograph Primary Die Markings Secondary Die Markings (Sample A) Section Map Die Corner A Secondary Die Markings (Sample B) Die Corner B Die Corner C Die Corner D Minimum Pitch Bond Pads Output Stage Overview Output Stage Overview at Substrate (DIC) First Stage Amplifier and Reset Transistor Overview First Stage Amplifier at Substrate (DIC) 3 Focused Process Analysis General Structure Pixel Array Die Thickness Die Edge Overview Die Edge Dielectric Etch Back Passivation and PMD FOX and ONO TEM of ONO (Pixel Array) TEM of Oxide Beneath W Light Shield (Pixel Array) Metallization Overview Contacts to Poly 2 and Poly Contact to Poly Contact to Substrate TEM of Poly Stack Pixel Array SEM of Poly Stack SCM of Pixel Array (Parallel to HCCD) SRP of Pixel Array SIMS of Pixel Array

5 Overview Pixel Analysis Pixel Array Corner SEM of Microlenses Tilt View SEM of Microlenses Planar Pixel Bevel Overview (Bottom Edge) Pixel Bevel (Bottom Edge of Pixel Array) Poly 2/Poly 3 Clock Lines Pixel Bevel (Bottom Edge of Pixel Array) Poly 1/ Poly 2/ Poly 3 Clock Lines Pixel Bevel Active Pixels SCM of VCCD Transfer Channel Bevel SCM of N-Photocathodes Pixel Cross Section Reference Top Edge of Pixel Array (Section A) Pixel Dielectric Stack (Section A) SCM of Photocathode (Section A) Poly Control Line Stack (Section A) TEM of Poly Control Line (Section A) Poly Control Lines Over VCCD Channel (Section B) Detail Of Poly Control Lines (Section B) SCM of VCCD Channel (Section B) Bottom Edge of Pixel Array Transition to Shielded Pixels (Section A) Bottom Edge of Pixel Array Transition to Horizontal Shift Register (Section A) Right Edge of Pixel Array (Section C) Active Pixels Poly Control Line Stack (Section D) Active Pixels Poly 2 and Poly 3 Control Lines (Section E) Cross-Sectional SCM Doped Substrate Regions (Section E) Cross-Sectional SCM Pixel Substrate Doping Dimensions (Section E) Active Pixels Poly 3 Control Line (Section F)

6 About Chipworks About Chipworks Chipworks is the recognized leader in reverse engineering and patent infringement analysis of semiconductors and electronic systems. The company s ability to analyze the circuitry and physical composition of these systems makes them a key partner in the success of the world s largest semiconductor and microelectronics companies. Intellectual property groups and their legal counsel trust Chipworks for success in patent licensing and litigation earning hundreds of millions of dollars in patent licenses, and saving as much in royalty payments. Research & Development and Product Management rely on Chipworks for success in new product design and launch, saving hundreds of millions of dollars in design, and earning even more through superior product design and faster launches. Contact Chipworks To find out more information on this report, or any other reports in our library, please contact Chipworks at: Chipworks 3685 Richmond Rd. Suite 500 Ottawa, Ontario K2H 5B7 Canada T: F: Web site: info@chipworks.com Please send any feedback to feedback@chipworks.com