Nan Ya NT5DS32M8BT-6K 256 Mbit DDR SDRAM Structural Analysis

Transcription

1 May 26, 2004 Nan Ya NT5DS32M8BT-6K 256 Mbit DDR SDRAM Structural Analysis For questions, comments, or more information about this report, or for any additional technical needs concerning semiconductor technology, please call Sales at Chipworks.

2 NanYa NT5DS32M8BT-6K 256 Mbit DDR SDRAM Structural Analysis Table of Contents 1 Overview 1.1 List of Figures 1.2 List of Tables 1.3 Introduction 1.4 Major Findings 2 Device Overview 2.1 Package and Die 2.2 Die Features 3 Package Analysis 3.1 Package Cross-Section 3.2 Stitch Bonds and Wire Bonds 4 Process 4.1 General 4.2 Bond Pads 4.3 Passivation 4.4 Inter-Metal Dielectric (IMD) and Pre-Metal Dielectric (PMD) 4.5 Metallization 4.6 Vias and Contacts 4.7 MOS Transistors and Poly 4.8 Capacitors and Resistors 4.9 Isolation 4.10 Wells and Epi 5 Memory Blocks 5.1 DRAM Cross-Sections 5.2 DRAM Bevel Section Rev May 17, :11

3 NanYa NT5DS32M8BT-6K 256 Mbit DDR SDRAM Structural Analysis 6 Selected Layout Features 6.1 Die Layout 6.2 Redundant Vias 6.3 DRAM 7 Critical Dimensions 7.1 Horizontal Dimensions 7.2 Vertical Dimensions and Compositions Rev May 17, :11

4 Nan Ya NT5DS32M8BT- 6K 256 Mbit DDR SDRAM Overview 1 Overview 1.1 List of Figures 1.2 List of Tables 2 Device Overview Top Package Photograph Bottom Package Photograph Package X-Ray Top View Package X-Ray Side View Die Photograph Die Markings Die Markings Die Corner a Die Corner b Die Corner c Die Corner d Bond Pad Capacitors Fuses 3 Package Analysis Package Cross-Section Edge of Package Package Lead Stitch Bond to Lead Ball Bond to Die 4 Process Die Photo Showing Location of Cross-Sections General View of NT5DS32M8BT-6K DRAM Array General Structure in Peripheral Region (Glass Etch) Die Edge Edge Seal Ring Bond Pad Overview Bond Pad Edge Passivation Detail Inter-Metal 2 Dielectric 1-1 Rev May 17, :02

5 Nan Ya NT5DS32M8BT- 6K 256 Mbit DDR SDRAM Overview Inter-Metal 1 Dielectric Pre-Metal Dielectric Minimum Pitch Metal Minimum Pitch Metal TEM Image of Minimum Pitch Metal Minimum Pitch Metal Cross-Section Via 2 s Redundant Minimum Pitch Via 1 s Minimum Pitch Tungsten Contacts to Diffusion Self-Aligned Poly Bitline Contacts TEM Image of Self-Aligned Poly Bit line Contacts NMOS Transistor in Peripheral Region NMOS Transistor in Peripheral Region (Glass Etch) DRAM Access Transistor and Passing Word lines TEM Image of DRAM Access Transistor and Passing Wordlines TEM Image of Gate Oxide PMOS Transistor Gate Detail MIS Capacitors in Plan View MIS Capacitors Cross-Section Plan View Image of Fuses Cross-Section through Fuses Bottom of DRAM Trench Capacitor Showing Oxide Nitride Dielectric STI Isolation Well Structure in Peripheral Region Well Structure in DRAM Region SCM of N-Well in Peripheral Region SCM of Well Structure in the DRAM Array 5 Memory Blocks General Overview of DRAM Array Higher Magnification of Trench Capacitors Upper Portion of DRAM Capacitors DRAM Cross-Section Wordline Direction TEM Image of Access Transistor Gate Plan View Metal 2 Wordline Straps 1-2 Rev May 17, :02

6 Nan Ya NT5DS32M8BT- 6K 256 Mbit DDR SDRAM Overview Plan View of Metal 1 Bitlines Showing Bitline Contacts Plan View of Polycide Wordlines Plan View of Access Transistor Active Regions Plan View of Capacitor Trenches 6 Selected Layout Features Annotated Die Photograph Metal Power Line Redundant Vias on M1, M2 and M3 Photograph of Metal Power Line Redundant Vias on M1, M2 and M3 Photograph of Metal Power Line Redundant Vias on M1, M2 and M3 Photograph of Metal Signal Line Redundant Vias Between M1 and M2 Photograph of Metal Signal Line Redundant Vias Between M1 and M2 Photograph of Metal DRAM Array Metal DRAM Array Metal DRAM Array Metal DRAM Array Polycide 7 Critical Dimensions 7.1 Horizontal Dimensions 7.2 Vertical Dimensions and Compositions 1.2 List of Tables Dielectric Composition and Thicknesses Metallization Vertical Dimensions Minimum Metallization Horizontal Dimensions Via and Contact Dimensions Transistor and Polycide Horizontal Dimensions Transistor and Polycide Vertical Dimensions 7.1 Horizontal Dimensions 7.2 Vertical Dimensions and Compositions 1-3 Rev May 17, :02

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