The Rejuvenation of the Semiconductor Industry Ride the New Wave
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1 The Rejuvenation of the Semiconductor Industry Ride the New Wave Rozalia Beica CTO Yole Developpement 1 1
2 Presentation Outline Yole Intro Market Drivers Advanced Packaging Global Trends Conclusions 2 2
3 Presentation Outline Yole Introduction 3 3
4 YOLE DEVELOPPEMENT Founded in 1998 in Lyon, France 4 44
5 A Group of Companies MEMS & Sensors Microfluidics & Bio Tech Advanced Packaging Manufacturing costs analysis Reverse engineering M&A operations Due diligences Rev. Eng./Costing Finance Photonics Power Electronics Equipment Photovoltaics LED & Compound Semi Materials IP Analysis Patent Assessment Fundraising Maturation of companies IP Portfolio Management Market, technology & strategy consulting Intellectual Property Innovation Mgmt. YOLE DEVELOPPEMENT Founded in 1998 in Lyon, France 5 55
6 Presentation Outline Global Trends 6 6
7 Global Trends Large scale Impact on WW Industries Social Economic Political Environment Technology CHANGES Megatrends High Impact Impact on Global Elecronics & Semiconductor Industries 7 77
8 Global Trends 8 88
9 mega globalization emerging economies human health & well-being Intensified global competition for resources accelerating technological change urbanization trends 9 99
10 Impact on WW industries Environmental Impact Renewable Energy Automotive LED More efficient products.. Emerging Markets / Urbanization Increased Production Increased Consumption Stronger demand of goods New manufacturing markets Health-Care/Well-being Preventive care Benefit of mobility: Home care Patient care Connectivity / Globalization Internet of Things Safety Smart.getting smarter Software Cloud Convergence of industries
11 Global Trends Environmental Impact Renewable Energy Automotive LED More efficient products.. Emerging Markets / Urbanization Increased Production Increased Consumption Stronger demand of goods New manufacturing markets Health-Care/Well-being Preventive care Benefit of mobility: Home care Patient care Connectivity / Globalization Internet of Things Safety Smart.getting smarter Software Cloud Convergence of industries LED MEMS Power Electronics Impact on Semiconductor Industry Increased Integration Sensors Printed & Flexible Electronics Advanced Manufacturing Accelerating Technological Advancements
12 4 Different Waves Impacting Semiconductor Industry More Moore trends Re-use of semiconductor process to make non IC devices is creating totally new opportunities. Module manufacturing is becoming the future of device makers. A supply chain evolution to maximize the added value and provide complete services to customers There is a growing importance of the devices outside the digital IC world, where: analog, mixed signal devices, sensors, power management, embedded memories are becoming increasingly important and reaching significant revenue levels LED MEMS Power Electronics Increased Integration Sensors Printed & Flexible Electronics Advanced Manufacturing Impact on Accelerating Technological Advancements Semiconductor Industry
13 Evolution of More than Moore Applications Key Market Drivers Smartphones/Tables Industrial Applications Automotive Wearables and Health $ M Selected More than Moore applications $90.000M $80.000M $70.000M $60.000M $50.000M $40.000M $30.000M $20.000M $10.000M $60B in 2015 More than Moore Applications will continue to grow! >$85B in 2020 Printed E ufluidic Power MEMS $0M LED CIS MEMS Market Image sensors LED market Power devices market Microfluidic market Printed electronic Market Growth of More than Moore applications (devices, modules, packaging) 13 13
14 Presentation Outline Market Drivers 14 14
15 Computing Trends New Major Technology Cycles 10x More Users, Devices 10Bill+ Lower price Increased functionality Increased performance Miniaturization 1Bill+ 10Bill+ Internet of Things 1MM+ Mainframe 10MM+ Mini-computers 100MM+ PCs Desktop internet Mobile Internet Increased volumes Growing applications Higher diversity of products Increased integration & more flexible technologies
16 The Driving Forces are Changing Wired Wireless Driver Mainframe computers Fixed personal computer Mobile Consumer Internet of Things and the Cloud Key success Parameters 1. Performance 2. Cost 1. Cost 2. Performance 1. Cost 2. Power 3. Performance 4. Size 1. Cost 2. Power 3. Latency 4. Bandwidth density 5. Size Time Adapted after Bill Bottoms ECS 2014, Orlando 16 16
17 Cost per Mil. Gates ($) Silicon / Interconnection Trend The CMOS transistors continue to shrink at the increase of fab expenses. 0,08 0,06 0,0636 0,0521 Wrong trend 0,04 0,02 0,0362 0,0267 0,0275 0,0278 Even if the performance is increasing, it cannot follow the same cost reduction trends 0,00 90nm 65nm 40nm 28nm 20nm 14nm 17 17
18 Going Forward What Options Do We Have? More Moore 2D SOC All-in-One chip system integration Chip area, Cost, Time to Market 18 18
19 Going Forward What Options Do We Have? More Moore 2D SOC All-in-One chip system integration Chip area, Cost, Time to Market More than Moore 3D Packaging Time to Market, Cost, Performance Size, Flexibility 19 19
20 Presentation Outline Advanced Packaging Evolution 20 20
21 Gap Features Si vs PCB Technology Introduction Microelectronics Packaging Evolution Bridging the Gap Between Si and PCB Processing Capabilities Feature sizes of PCBs Through hole DIP, PGA Surface Mount SOP, QFP, PLCC Ball grid arrays SiPs CSPs/BGAs WLCSP FC BGA PoP More SiPs Interposers 3D IC TSV FO WLP Mature Established Feature sizes CMOS Emerging Today 21 21
22 Advanced Packaging Markets Consumer: Gaming / Graphic application engines Industrial: HPC/ Network, Servers Transportation: Automotive, Trains, HEV/EV Medical Military & Aerospace Telecom: Power Supplies Industrial.across several markets Wireless: Connectivity / Network Center Renewable Energy: Photovoltains, Wind Turbines Consumer: High-performance Digital Video Computing: Notebooks / MID connectivity devices High-density Solid State Storage & µ-cards Mobile: High-end Multimedia Smart-phones / PMP 22 22
23 Market Dynamics Consolidation New Applications Evolution of the traditional supply chain Growth and impact of the emerging markets The semiconductor industry is going through an era of consolidation o High M&A activity present The Internet of Things is starting to stir the packaging market o Packaging options are being explored as new applications arise Foundry involvement is no longer a dent in AP production Increased activity of Chinese capital on the market 23 23
24 Presentation Outline 3D Packaging 24 24
25 Advanced Packaging Evolution The growing and diversifying system requirements have continued to drive the development of a variety of new package styles and configurations: Small-form-factor Lightweight technology Low-profile technology High-pin-count technology High-speed technology High Reliability Improved thermal management Through Silicon Via Lower cost Complexity: PoP, PiP FCBGA 3D SiP Lead-frame based Packages Wirebonded 3D Wirebonding. Performance: FCCSP Increased functionality, speed, higher bandwidth, increased I/Os, 25 25
26 Advanced Packaging Platforms Integration:2D 3D Increased functionality, I/Os, integration complexity Leadframes w/o IC substrates IC substrates-based Multiple Dies FO MCP 3D Stacking SiP W/B BGA Flip Chip BGA 3DIC Interposer based (Si, Glass, Org) SiP SiP Single die QFN,QFP Fan-in Fan-out BGA (organic substrate) Embedded die (in substrate) Embedded die (in substrate) PCB substrate Interconnect: Bumping, Pillars, Studs, Through-silicon-via, Bump-less, Embedded Technologies
27 Technologies Enabling 3D Packaging W/B Flip Chip Embedded 2.5D & 3DIC System in Package. FC/PoP / PiP 2.5D & 3DIC Fan-out & Embedded SiP 27 27
28 Technologies Enabling 3D Packaging W/B Flip Chip Fan-Out 2.5D & 3DIC System in Package
29 Flip Chip Market Drivers & Benefits CPUs / GPUs/chipsets, the earlier adopters of flip chip Has transitioned to other devices due to several benefits it can bring 29 29
30 Flip Chip Markets Desktop PC Computing Ultrasonic Handler Medical Consumer Laptops Set-up Box Mobile/wireless Smartphones Tablets Game Station Cars Automotive UHD TV Industrial Servers and more! 30 30
31 Samsung Galaxy S6 Samsung Exynos K3RG3G30MM-DGCH Courtesy System+Consulting Solder bump used to stack the processor onto the organic substrate Courtesy System+Consulting 31 31
32 APU/Memory Packaging in Mobile/Consumer A10 - iphone Source: Source: TSMC Continue to use PoP type package InFO with TIV (Through InFO wafer Vias) Transition to fan-out packaging TSMC info technology Samsung Galaxy S6 Samsung Galaxy S6+ 40% decrease in surface area 32 32
33 Technologies Enabling 3D Packaging W/B Flip Chip Embedded 2.5D & 3DIC System in Package FOWLP FO-MCP / SiP FO-PoP 2.5D FOWLP 33 33
34 Fan-Out WLP Drivers: Integration/SiP Capability.and more complex integration Small dies, large dies, flip chip, stacked or side-byside multi-die 2D solutions in single & multi-chip configurations 2.5D interposer solutions 3D SiP & PoP solutions that could include faceto-back or face-to face options Heterogeneous integration with passives & active components FO PoP FO SiP Digital + memory modules, Sensor modules RF connectivity modules, Audio modules, Sensor modules, Radio modules Source: STATS ChipPAC 34 34
35 Fan-Out Applications Typical view of a smart phone board TODAY TOMORROW Blue: Devices that can be found in FOWLP packages today Digital SiP Drivers RF SiP IPD ESD/EMI Sensor SiP DC/DC converters Mixed Signal SiP SiP Modules: BGA/PoP/QFN/TSOP Stand-alone chips: WL-CSP, SOT, QFN, UTLP, BGA Green: Devices that could be found in the future in FOWLP Grey: Devices that will likely remain on WLCSP or flip-chip package or move to 3DIC or Embedded die Discrete passives Discrete passives 35 35
36 First Fan-out WLP Technologies ewlb RCP Wider adoption Others 16% Main products: - Single Die: Mobile and Wireless - BB and Wireless SoC, RF, PMIC - MCP/SiP products for Mobile (PMU), Industrial, Medical and Security applications 25% 59% Total 2014 $174M Main products: - Mobile and Wireless BB and Wireless SoC - RF Transceivers - ASIC 36 36
37 New Fan-Out Technologies Other manufacturers have entered the market more recently with their own developed technology: OSATs: Deca Technologies Adaptive patterning Amkor FoWLP, SWIFT and SLIM ASE ewlb, FOCLP SPIL SLIT/NTI Foundries: TSMC InFO Samsung Panel based fan-out Adaptive Patterning 2um L/S RDL NTI info 37 37
38 FO-WLP Revenues (M $) FO WLP Market Forecast FOWLP activity Revenues (M$) Overall evolution since ewlb technology introduction $2.500M Yole Developpement Sep 2015 APPLE/TSMC entry $2.000M $1.500M $1.000M $500M Transition plateau CAGR ~ 15% CAGR ~ 55% $0M TOTAL $80 $115 $131 $158 $174 $244 $790 $1.223 $1.573 $1.993 $2.391 TSMC addition Mobile $471 $814 $1.088 $1.391 $1.715 TOTAL without TSMC $80 $115 $131 $158 $174 $244 $318 $409 $485 $602 $676 Entry of A10 APE of iphone7, 7+ and newer from 2016! Previous CAGR was rated at 25%, while new CAGR is estimated at 55%! After the jump, further CAGR estimated at 32% Market estimated to exceed 2B$ by
39 Technologies Enabling 3D Packaging W/B Flip Chip Fan-Out 2.5D & 3DIC System in Package Bumping Cu Pillar Through Silicon Via RDL 39 39
40 TSV Applications Photonic interposer MEMS & Sensors HBM FPGA Photonic CIS Memory HMC FPGA CIS MEMS TSV in Memory is going mainstream for high end application! 40 40
41 2.5/3DIC Commercial Announcements! DDR4 3D Dual Inline Memory Modules (RDIMMs) 2011 HMC 2012 Altera 10 Generation FPGA using HMC HBM Arria Stratix Next Generation PRIMEHPC POST FX10 CPU memory board using 8 HMC DiRAM Stacked NAND Flash AMD R9 390X Graphics product with HBM built with 20nm technology Nvidia Pascal Graphics Module New second generation Xenon Phi processor Knights Landing using HMC First Heterogeneous 3D FPGA Virtex-7 H580T EX-800 Blade Server using HMC More and more products using TSV 41 41
42 Logic n Logic n+1 Logic n+2 Logic n+3 Wide Range of Packaging Technologies Low end Mid end High end FO-MCP / SiP FO-PoP FOWLP 2.5D FOWLP 4 10 IOs IOs IOs IOs s IOs 2x2 mm2 4x4 mm2 8x8 mm2 15x15 mm2 25x25 mm2 I/O# numbers Package body size Embedded die WL CSP FC-CSP / BGA 2.5D interposers (C2W) WB BGA / QFN / TSOP 42 42
43 Technologies Enabling 3D Packaging Bumping Cu Pillar Through Silicon Via RDL W/B Flip Chip Embedded 2.5D & 3DIC System in Package Side-by-side (Fan-Out) Stacked (PoP/PiP) Embedded die in laminate Various Packaging Technologies Source: ASE 43 43
44 What is SiP? Two or more components with different functionalities packaged in a system or sub-system Is a platform that can bring disparate technologies within the same package: IC devices using various technologies: CMOS, BiCMOS technologies GaAs, GaN. Analog devices MEMS & Sensors Optical Devices Power Electronics RF technologies Passive components Resistor Capacitor Inductors filters Discretes IPD Embedded passives Stacked (PoP/PiP) Side-by-side (Fan-Out) Source: ASE Embedded die in laminate 44 44
45 Main Applications for SiP Logic & Memory High speed, high I/Os for CPU, ASIC, GPU RF/FEM: Power amplifiers Switches, Filters, Duplexers Antenna modules Power Management Power modules Embedded passives Controllers Source: ASE Wireless Connectivity Bluetooth Wifi SSD cards Plug-in wireless Sensing Modules MEMS integrated with ASICs Combo systems/fusion MEMS Modules MEMS integrated with ASICs Combo systems/fusion and more 45 45
46 SiP Already a Dominant Packaging Platform in Smartphones Digital SiP RF SiP Sensor SiP Mixed Signal SiP SiP Modules: BGA/PoP/QFN/TSOP Drivers IPD ESD/EMI DC/DC converters Stand-alone chips: WL-CSP, SOT, QFN, UTLP, BGA Discrete passives.with further growth opportunities 46 46
47 SiP Characteristics and Markets Smaller form factor Increased flexibility Integrating different technologies Higher performance: signal propagation, power dissipation, noise and EMC performance Faster time-to-market Lower cost High added value IP protection Suitable across Various Markets Several Advantages Wireless communications Consumer Automotive IoT (connectivity) Medical
48 SiP Positioning in Advance Packaging Integration:2D 3D Increased functionality, performance Platform enabling functionality through the use of various packaging techniques Leadframes w/o IC substrates IC substrates-based Multiple Dies W/B BGA Flip Chip BGA 3DIC Interposer based (Si, Glass, Org) SiP Single die QFN,QFP Fan-in Fan-out BGA (organic substrate) Embedded die (in substrate) Embedded die (in substrate) PCB substrate Interconnect: Bumping, Pillars, Studs, Through-silicon-via, Bump-less, Embedded Technologies
49 Presentation Outline Conclusions 49 49
50 Future Growth of 3D Packaging Platforms Advanced Packaging will continue to grow. 3D-IC 10% Other 0% FOWLP 12% 3D-IC 6% Other 1% FOWLP 2% WLCSP 17% 2020 WLCSP 14% 3D-IC 2% FOWLP Other 2% 1% WLCSP 14% 2014 Flip Chip 64% 2011 Flip Chip 74% Flip Chip 81% Highest growth expected for 3DIC and fan-out. Flip Chip to remain the dominant platform
51 Future Growth of Advanced Packaging REVENUE Other 62% AP 38% Other 56% AP 44% AP Other AP Other AP 19% AP 32% WAFERS Other 81% AP Other Other 68% AP Other 51 51
52 Advanced Packaging: growing in importance in the industry Applications: high growth driven by consumer & IoT Market drivers: performance, miniaturization, cost, functionality Technology trends: smaller pitch sizes, narrower L/S, More than Moore: increased flexibility at lower cost 3D Packaging: high growth (Fan-out, Flip Chip, 3D IC)!
53 The Rejuvenation of the Semiconductor Industry Ride the New Wave THANK YOU! For additional information, please contact us 53 53
54 Critical Aspects to be Considered with SiP Integration of the different technologies and ability to bring the most value out of the package Performance Form factor Reduced cost Design of the system/sub-system to take in consideration: Electrical and thermal performance Structural considerations Miniaturization Cost Verification Design Package layout Functionality Assembly Testing Processing and manufacturing considerations As the number of dies are growing within the package, isolating the root cause of defects within the package becomes more challenging 54 54
55 System in Package Enabled by various packaging platforms & interconnect technologies: Wirebonding Flip-Chip Embedded technologies: Mold (fan-out) Laminate (embedded dies) 2.5D/3DIC Substrates: Lead-frames Laminates LTCC substrates Protective features: Metal lids Overmold encapsulation EMI shielding Side-by-side (Fan-Out) Source: ASE Stacked (PoP/PiP) Embedded die in laminate 55 55
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