Virtuoso - Enabled EPDA framework AIM SUNY Process

Transcription

1 Virtuoso - Enabled EPDA framework AIM SUNY Process CADENCE, LUMERICAL, PHOENIX SOFTWARE

2 Driven by our customers Cadence is the leader with Virtuoso custom design platform for electronics custom and mixed signal designs. Challenges we see customers and foundries running into when it comes to photonics design: Large E customer base attempting to move Photonic IC design from the lab / special project status to general design status Increasingly complex PIC designs with >1000 components Limited system/circuit simulation capabilities Significant chip-level waveguide routing challenges IP protection Integration of electronics and photonics tools Not limited (by construction) to Silicon Photonics Our customers have come to us and have asked for help to provide a unified design platform to enable productive, repeatable, familiar design flows, involving photonics and accessible to their general designer community. 2

3 System Simulation Component-Level Design FDTD Solutions Photonic Integrated Circuit Design Spectre Electrical Simulation Virtuoso Analog Design DEVICE Nanophotonic Design INTERCONNECT Charge and Heat Transport Design MODE Solutions Waveguide Design Mask layers Design rules Symbols Compact models SKILL Pcells and Fab GDSII Final (batch) DRC/LVS Virtuoso Layout Editor XL Virtuoso Custom Design Platform Virtuoso Schematic Editor 3 Curvilinear layout Parameterized primitives Waveguide and component Discretization

4 System Simulation Fab INTERCONNECT GDSII Final (batch) DRC/LVS Photonic Integrated Circuit Design Spectre Electrical Simulation Virtuoso Analog Design Mask layers Design rules Symbols Compact models SKILL Pcells and Virtuoso Layout Editor XL Virtuoso Custom Design Platform Virtuoso Schematic Editor 4 Curvilinear layout Parameterized primitives Waveguide and component Discretization

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6 Fully detailed waveguides/connectors Abstract block of AIM IP 6

7 System Simulation Component-Level Design FDTD Solutions Photonic Integrated Circuit Design Spectre Electrical Simulation Virtuoso Analog Design DEVICE Nanophotonic Design INTERCONNECT Charge and Heat Transport Design MODE Solutions Waveguide Design Mask layers Design rules Symbols Compact models SKILL Pcells and Fab GDSII Final (batch) DRC/LVS Virtuoso Layout Editor XL Virtuoso Custom Design Platform Virtuoso Schematic Editor 7 Curvilinear layout Parameterized primitives Waveguide and component Discretization

8 Component-Level Design FDTD Solutions DEVICE Nanophotonic Design Charge and Heat Transport Design MODE Solutions Waveguide Design Spectre Electrical Simulation Virtuoso Analog Design Mask layers Design rules Symbols Compact models SKILL Pcells and Fab GDSII Final (batch) DRC/LVS Virtuoso Layout Editor XL Virtuoso Custom Design Platform Virtuoso Schematic Editor 8 Curvilinear layout Parameterized primitives Waveguide and component Discretization

9 Photonic IC layout Curvilinear / non-manhattan layout requires all angle design features (location of ports, rotation, smooth curves, connectivity) Advanced gridding and fracturing of polygons Phase aware waveguide routing Generic building blocks supporting customized design Photonic Synthesis 9

10 Virtuoso driven Layout Implementation Virtuoso Layout Editor XL Curvilinear layout Parameterized primitives Waveguide and component Discretization Virtuoso PDA-Link to OptoDesigner Coming as a SKILL context with supporting tools to improve PIC design efficiency Provides proper waveguide stitching, under all angles, to create composite waveguide layouts Adds a complete library of parameterized photonics primitives and components Adds the pxconnector family of waveguide connectors Provides information for back annotation into the circuit simulation 10

11 Component-Level Design FDTD Solutions DEVICE Nanophotonic Design Charge and Heat Transport Design MODE Solutions Waveguide Design Spectre Electrical Simulation Virtuoso Analog Design Mask layers Design rules Symbols Compact models SKILL Pcells and Fab GDSII Final (batch) DRC/LVS Virtuoso Layout Editor XL + mydevice Virtuoso Custom Design Platform Virtuoso Schematic Editor 11 Curvilinear layout Parameterized primitives Waveguide and component Discretization

12 Component-Level Design FDTD Solutions DEVICE Nanophotonic Design Charge and Heat Transport Design MODE Solutions Waveguide Design Spectre Electrical Simulation Virtuoso Analog Design Mask layers Design rules Symbols Compact models SKILL Pcells and Fab GDSII Final (batch) DRC/LVS Virtuoso Layout Editor XL + mydevice Virtuoso Custom Design Platform Virtuoso Schematic Editor 12 Curvilinear layout Parameterized primitives Waveguide and component Discretization

13 Component-level simulation The design and analysis of fundamental passive and active optoelectronic building blocks requires various solvers: Optical Electrical Thermal Extract accurate, and calibrated compact models from simulations and measured data for circuit simulation. 13 CADENCE, LUMERICAL SOLUTIONS INC, PHOENIX SOFTWARE

14 Component-Level Design FDTD Solutions DEVICE Nanophotonic Design Charge and Heat Transport Design MODE Solutions Waveguide Design Spectre Electrical Simulation Virtuoso Analog Design Mask layers Design rules Symbols Compact models SKILL Pcells and Fab GDSII Final (batch) DRC/LVS Virtuoso Layout Editor XL + mydevice Virtuoso Custom Design Platform Virtuoso Schematic Editor 14 Curvilinear layout Parameterized primitives Waveguide and component Discretization

15 System Simulation Component-Level Design FDTD Solutions Photonic Integrated Circuit Design Spectre Electrical Simulation Virtuoso Analog Design DEVICE Nanophotonic Design INTERCONNECT Charge and Heat Transport Design MODE Solutions Waveguide Design Mask layers Design rules Symbols Compact models SKILL Pcells and Fab GDSII Final (batch) DRC/LVS Virtuoso Layout Editor XL + mydevice Virtuoso Custom Design Platform Virtuoso Schematic Editor 15 Curvilinear layout Parameterized primitives Waveguide and component Discretization

16 EPDA Relies on a Complete, Feature and Data-Rich E DA automation requires a complex EP DA is a super set of this: Mask layers Design rules Symbols Compact models SKILL PCells and Modeling for photonics elements with statistical and DFM effects Thermal dependency Electrical model Curvy linear device generation and design rules Active devices Waveguides Photonics connectivity (LVS) Waveguide parameter (s-parameter, n-eff) back-annotation Cadence, PhoeniX and Lumerical are working in close collaboration with AIM & Analog Photonics to assist in developing a feature reach supporting EPDA methodology. 16

17 2017 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, and the other Cadence marks found at are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.