PIPELINING. Pipelining: Natural Phenomenon. Pipelining. Pipelining Lessons

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1 Pipelining: Natral Phenomenon Landry Eample: nn, rian, Cathy, Dave each have one load of clothes to wash, dry, and fold Washer takes 30 mintes C D Dryer takes 0 mintes PIPELINING Folder takes 20 mintes Dean Tllsen Dean Tllsen Pipelining Lessons Pipelining T a s k O r d e r C D 6 P Time Pipelining doesn t help of single task, it helps of entire workload Pipeline rate limited by pipeline stage ltiple tasks operating simltaneosly Potential speedp = Nmber of pipe stages Unbalanced lengths of pipe stages redces speedp Time to fill pipeline and time to drain it redces speedp Dean Tllsen Reqires separable jobs/stages Reqires separate resorces chieves parallelism withot Improves throghpt Often single-task (e.g., instrction, landry load) latency Pipeline efficiency (keeping the pipeline fll) critical to performance Dean Tllsen

2 5 Steps of the IPS path 5 Steps of a IPS Instrction Instrction fetch Instrction decode/ Eecte/ calclation emory Instrction fetch dd Instrction N Instrction decode/ etend Eecte/ calclation otpt emory LD Instrction Fetch (IF) <- [] N <- + Instrction Decode/ (ID) <- [6..10] <- [11..15] Imm <- _etend(16..31) dd Instrction N etend otpt LD Dean Tllsen Dean Tllsen 5 Steps of a IPS Instrction 5 Steps of a IPS Instrction Eecte/Effective ddress (EX) Otpt <- + Imm ( ref) Otpt <- op (register-register al instrction) Otpt <- op Imm (register-immediate al instrction) Otpt <- N + Imm; <- ( op 0) () Instrction fetch dd Instrction N Instrction decode/ etend Eecte/ calclation otpt emory LD Dean Tllsen emory /branch completion (E) LD <- [Otpt] or [Otpt] <- (load or store) if (cond) <- Otpt (branch) else <- N -ack (W) [16..20] <- Otpt (reg-reg al instrction) [11..15] <- Otpt (reg-imm al instrction) [11..15] <- LD Instrction fetch Instrction decode/ dd Instrction N etend Eecte/ calclation otpt emory LD Dean Tllsen

3 DDI R7, R2, #35 5 Steps of a IPS Instrction Instrction fetch Instrction decode/ Eecte/ calclation emory dd Instrction N otpt LD I D etend Dean Tllsen Dean Tllsen Visalizing Pipelining The Pipelined IPS path Time (in clock cycles) CC 1 CC 2 CC 3 CC CC 5 CC 6 CC 7 CC 8 CC 9 Inst 1 Inst 2 Inst 3 Inst Inst 5 Program eection order (in instrctions) I I D I D D I D I D DD Instrction E/W. etend EX/E E/W Dean Tllsen Dean Tllsen

4 The Pipeline in otion The Pipeline In otion addi R5, R1, #35 add R6, R2, R1 addi R5, R1, #35 DD EX/E E/W Instrction E/W. etend Dean Tllsen Dean Tllsen The Pipeline In otion The Pipeline In otion EX/E E/W EX/E E/W DD DD Instrction E/W. etend Instrction E/W. etend Dean Tllsen Dean Tllsen

5 The Pipeline In otion The Pipeline In otion EX/E E/W EX/E E/W DD DD Instrction E/W. etend Instrction E/W. etend Dean Tllsen Dean Tllsen The Pipeline in otion Pipeline Performace addi R5, R1, #35 add R6, R2, R1 Inst Program eection order (in instrctions) Time (in clock cycles) CC 1 CC 2 CC 3 CC CC 5 CC 6 CC 7 I I D I D D I D CC 8 CC 9 ET = IC * CPI * CT single-cycle processor mltiple-cycle processor pipelined processor compleity has a cost e.g., latch overhead neven stage latencies Can t always keep the pipeline fll why not? Inst 5 I D Dean Tllsen Dean Tllsen

6 When Things Go Wrong -- Pipeline Hazards Limits to pipelining: Hazards prevent net instrction from eecting dring its designated clock cycle Strctral hazards: HW cannot spport this combination of instrctions hazards: Instrction depends on reslt of prior instrction still in the pipeline Control hazards: Pipelining of branches & other instrctions that change the Common soltion is to stall the pipeline ntil the hazard is resolved, inserting one or more bbbles in the pipeline Key Points Pipeline improves throghpt rather than latency Pipelining gets parallelism withot replication ET = IC * CPI * CT Keeping the pipeline fll is no easy task strctral hazards data hazards control hazards Dean Tllsen Dean Tllsen